117 	struct intel_display *display = to_intel_display(intel_dp);  in intel_dp_mst_dec_active_streams()  local
119 	drm_dbg_kms(display->drm, "active MST streams %d -> %d\n",  in intel_dp_mst_dec_active_streams()
122 	if (drm_WARN_ON(display->drm, intel_dp->mst.active_streams == 0))  in intel_dp_mst_dec_active_streams()
130 	struct intel_display *display = to_intel_display(intel_dp);  in intel_dp_mst_inc_active_streams()  local
132 	drm_dbg_kms(display->drm, "active MST streams %d -> %d\n",  in intel_dp_mst_inc_active_streams()
141 	struct intel_display *display = to_intel_display(crtc_state);  in intel_dp_mst_max_dpt_bpp()  local
145 	if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc)  in intel_dp_mst_max_dpt_bpp()
158 	 * - DELL U3224KBA display  in intel_dp_mst_max_dpt_bpp()
249 	struct intel_display *display = to_intel_display(intel_dp);  in intel_dp_mtp_tu_compute_config()  local
262 	drm_WARN_ON(display->drm, !dsc && (fxp_q4_to_frac(min_bpp_x16) ||  in intel_dp_mtp_tu_compute_config()
284 		drm_dbg_kms(display->drm, "Limiting bpp to max DPT bpp (" FXP_Q4_FMT " -> " FXP_Q4_FMT ")\n",  in intel_dp_mtp_tu_compute_config()
289 …drm_dbg_kms(display->drm, "Looking for slots in range min bpp " FXP_Q4_FMT " max bpp " FXP_Q4_FMT …  in intel_dp_mtp_tu_compute_config()
295 			drm_dbg_kms(display->drm, "Can't get valid DSC slice count\n");  in intel_dp_mtp_tu_compute_config()
305 		drm_dbg_kms(display->drm, "Trying bpp " FXP_Q4_FMT "\n", FXP_Q4_ARGS(bpp_x16));  in intel_dp_mtp_tu_compute_config()
364 			drm_WARN_ON(display->drm, remote_tu < crtc_state->dp_m_n.tu);  in intel_dp_mtp_tu_compute_config()
385 			drm_WARN_ON(display->drm, slots != crtc_state->dp_m_n.tu);  in intel_dp_mtp_tu_compute_config()
396 		drm_dbg_kms(display->drm, "failed finding vcpi slots:%d\n",  in intel_dp_mtp_tu_compute_config()
406 	drm_dbg_kms(display->drm, "Got %d slots for pipe bpp " FXP_Q4_FMT " dsc %d\n",  in intel_dp_mtp_tu_compute_config()
435 	struct intel_display *display = to_intel_display(intel_dp);  in mst_stream_dsc_compute_link_config()  local
448 	drm_dbg_kms(display->drm, "DSC Source supported min bpp %d max bpp %d\n",  in mst_stream_dsc_compute_link_config()
454 	drm_dbg_kms(display->drm, "DSC Sink supported min bpp %d max bpp %d\n",  in mst_stream_dsc_compute_link_config()
468 	drm_dbg_kms(display->drm, "DSC Sink supported compressed min bpp %d compressed max bpp %d\n",  in mst_stream_dsc_compute_link_config()
472 	max_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, max_compressed_bpp,  in mst_stream_dsc_compute_link_config()
474 	min_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, min_compressed_bpp,  in mst_stream_dsc_compute_link_config()
490 	struct intel_display *display = to_intel_display(intel_dp);  in mst_stream_update_slots()  local
498 		drm_dbg_kms(display->drm, "slot update failed\n");  in mst_stream_update_slots()
547 	struct intel_display *display = to_intel_display(connector);  in adjust_limits_for_dsc_hblank_expansion_quirk()  local
556 			drm_dbg_kms(display->drm,  in adjust_limits_for_dsc_hblank_expansion_quirk()
563 		drm_dbg_kms(display->drm,  in adjust_limits_for_dsc_hblank_expansion_quirk()
576 	drm_WARN_ON(display->drm, limits->min_rate != limits->max_rate);  in adjust_limits_for_dsc_hblank_expansion_quirk()
586 	drm_dbg_kms(display->drm,  in adjust_limits_for_dsc_hblank_expansion_quirk()
623 	struct intel_display *display = to_intel_display(encoder);  in mst_stream_compute_config()  local
653 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);  in mst_stream_compute_config()
671 		drm_dbg_kms(display->drm, "DSC required but not available\n");  in mst_stream_compute_config()
677 		drm_dbg_kms(display->drm, "Try DSC (fallback=%s, joiner=%s, force=%s)\n",  in mst_stream_compute_config()
691 		drm_WARN(display->drm, intel_dp->force_dsc_bpc,  in mst_stream_compute_config()
697 		drm_dbg_kms(display->drm, "Trying to find VCPI slots in DSC mode\n");  in mst_stream_compute_config()
719 	if (display->platform.geminilake || display->platform.broxton)  in mst_stream_compute_config()
747 	struct intel_display *display = to_intel_display(state);  in intel_dp_mst_transcoder_mask()  local
753 	if (DISPLAY_VER(display) < 12)  in intel_dp_mst_transcoder_mask()
807 	struct intel_display *display = to_intel_display(state);  in intel_dp_mst_check_fec_change()  local
815 	for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mst_pipe_mask) {  in intel_dp_mst_check_fec_change()
820 		if (drm_WARN_ON(display->drm, !crtc_state))  in intel_dp_mst_check_fec_change()
930 	struct intel_display *display = to_intel_display(connector);  in mst_connector_atomic_topology_check()  local
938 	drm_connector_list_iter_begin(display->drm, &connector_list_iter);  in mst_connector_atomic_topology_check()
1027 	struct intel_display *display = to_intel_display(encoder);  in mst_stream_post_disable()  local
1047 	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && last_mst_stream &&  in mst_stream_post_disable()
1050 	for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {  in mst_stream_post_disable()
1063 	intel_de_rmw(display,  in mst_stream_post_disable()
1064 		     TRANS_DDI_FUNC_CTL(display, old_crtc_state->cpu_transcoder),  in mst_stream_post_disable()
1077 	for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {  in mst_stream_post_disable()
1083 		if (DISPLAY_VER(display) >= 9)  in mst_stream_post_disable()
1108 	if (DISPLAY_VER(display) < 12 || !last_mst_stream)  in mst_stream_post_disable()
1184 	struct intel_display *display = to_intel_display(state);  in mst_stream_pre_enable()  local
1202 	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && first_mst_stream &&  in mst_stream_pre_enable()
1231 	if (DISPLAY_VER(display) < 12 || !first_mst_stream)  in mst_stream_pre_enable()
1234 	if (DISPLAY_VER(display) >= 13 && !first_mst_stream)  in mst_stream_pre_enable()
1243 	struct intel_display *display = to_intel_display(crtc_state);  in enable_bs_jitter_was()  local
1247 	if (!display->platform.alderlake_p)  in enable_bs_jitter_was()
1250 	if (!IS_DISPLAY_STEP(display, STEP_D0, STEP_FOREVER))  in enable_bs_jitter_was()
1258 	if (IS_DISPLAY_STEP(display, STEP_E0, STEP_FOREVER)) {  in enable_bs_jitter_was()
1271 	intel_de_rmw(display, CHICKEN_MISC_3, clear, set);  in enable_bs_jitter_was()
1279 	struct intel_display *display = to_intel_display(encoder);  in mst_stream_enable()  local
1290 	drm_WARN_ON(display->drm, pipe_config->has_pch_encoder);  in mst_stream_enable()
1297 		intel_de_write(display, TRANS_DP2_VFREQHIGH(pipe_config->cpu_transcoder),  in mst_stream_enable()
1299 		intel_de_write(display, TRANS_DP2_VFREQLOW(pipe_config->cpu_transcoder),  in mst_stream_enable()
1311 	intel_de_rmw(display, TRANS_DDI_FUNC_CTL(display, trans), 0,  in mst_stream_enable()
1326 	if (DISPLAY_VER(display) >= 12)  in mst_stream_enable()
1327 		intel_de_rmw(display, CHICKEN_TRANS(display, trans),  in mst_stream_enable()
1333 	for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config, i) {  in mst_stream_enable()
1372 	struct intel_display *display = to_intel_display(connector);  in mst_connector_get_ddc_modes()  local
1380 	if (!intel_display_driver_check_access(display))  in mst_connector_get_ddc_modes()
1443 	struct intel_display *display = to_intel_display(connector);  in mst_connector_mode_valid_ctx()  local
1448 	int max_dotclk = display->cdclk.max_dotclk_freq;  in mst_connector_mode_valid_ctx()
1462 	*status = intel_cpu_transcoder_mode_valid(display, mode);  in mst_connector_mode_valid_ctx()
1518 				intel_dp_dsc_get_max_compressed_bpp(display,  in mst_connector_mode_valid_ctx()
1536 	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) {  in mst_connector_mode_valid_ctx()
1546 	*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);  in mst_connector_mode_valid_ctx()
1568 	struct intel_display *display = to_intel_display(connector);  in mst_connector_detect_ctx()  local
1571 	if (!intel_display_device_enabled(display))  in mst_connector_detect_ctx()
1577 	if (!intel_display_driver_check_access(display))  in mst_connector_detect_ctx()
1622 	struct intel_display *display = to_intel_display(intel_dp);  in mst_topology_add_connector_properties()  local
1626 				   display->drm->mode_config.path_property, 0);  in mst_topology_add_connector_properties()
1628 				   display->drm->mode_config.tile_property, 0);  in mst_topology_add_connector_properties()
1662 	struct intel_display *display = to_intel_display(connector);  in detect_dsc_hblank_expansion_quirk()  local
1700 	drm_dbg_kms(display->drm,  in detect_dsc_hblank_expansion_quirk()
1713 	struct intel_display *display = to_intel_display(intel_dp);  in mst_topology_add_connector()  local
1729 	ret = drm_connector_dynamic_init(display->drm, &connector->base, &mst_connector_funcs,  in mst_topology_add_connector()
1741 	for_each_pipe(display, pipe) {  in mst_topology_add_connector()
1756 		drm_dbg_kms(display->drm, "[%s:%d] HDCP MST init failed, skipping.\n",  in mst_topology_add_connector()
1787 	struct intel_display *display = to_intel_display(dig_port);  in mst_stream_encoder_create()  local
1801 	drm_encoder_init(display->drm, &encoder->base, &mst_stream_encoder_funcs,  in mst_stream_encoder_create()
1841 	struct intel_display *display = to_intel_display(dig_port);  in mst_stream_encoders_create()  local
1845 	for_each_pipe(display, pipe)  in mst_stream_encoders_create()
1853 	struct intel_display *display = to_intel_display(dig_port);  in intel_dp_mst_encoder_init()  local
1858 	if (!HAS_DP_MST(display) || intel_dp_is_edp(intel_dp))  in intel_dp_mst_encoder_init()
1861 	if (DISPLAY_VER(display) < 12 && port == PORT_A)  in intel_dp_mst_encoder_init()
1864 	if (DISPLAY_VER(display) < 11 && port == PORT_E)  in intel_dp_mst_encoder_init()
1871 	ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst.mgr, display->drm,  in intel_dp_mst_encoder_init()
1873 					   INTEL_NUM_PIPES(display), conn_base_id);  in intel_dp_mst_encoder_init()
2105 	struct intel_display *display = to_intel_display(intel_dp);  in intel_dp_mst_verify_dpcd_state()  local
2119 		drm_dbg_kms(display->drm,  in intel_dp_mst_verify_dpcd_state()