Merge remote-tracking branch 'drm-misc/drm-misc-next-fixes' into drm-misc-fixes

Merge the few remaining patches stuck into drm-misc-next-fixes.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge tag 'drm-next-2025-01-17' of https://gitlab.freedesktop.org/drm/kernel

Pull drm updates from Dave Airlie:
"There are two external interactions of note, the msm tree pull in some
opp tree, h

Merge tag 'drm-next-2025-01-17' of https://gitlab.freedesktop.org/drm/kernel

Pull drm updates from Dave Airlie:
"There are two external interactions of note, the msm tree pull in some
opp tree, hopefully the opp tree arrives from the same git tree
however it normally does.

There is also a new cgroup controller for device memory, that is used
by drm, so is merging through my tree. This will hopefully help open
up gpu cgroup usage a bit more and move us forward.

There is a new accelerator driver for the AMD XDNA Ryzen AI NPUs.

Then the usual xe/amdgpu/i915/msm leaders and lots of changes and
refactors across the board:

core:
- device memory cgroup controller added
- Remove driver date from drm_driver
- Add drm_printer based hex dumper
- drm memory stats docs update
- scheduler documentation improvements

new driver:
- amdxdna - Ryzen AI NPU support

connector:
- add a mutex to protect ELD
- make connector setup two-step

panels:
- Introduce backlight quirks infrastructure
- New panels: KDB KD116N2130B12, Tianma TM070JDHG34-00,
- Multi-Inno Technology MI1010Z1T-1CP11

bridge:
- ti-sn65dsi83: Add ti,lvds-vod-swing optional properties
- Provide default implementation of atomic_check for HDMI bridges
- it605: HDCP improvements, MCCS Support

xe:
- make OA buffer size configurable
- GuC capture fixes
- add ufence and g2h flushes
- restore system memory GGTT mappings
- ioctl fixes
- SRIOV PF scheduling priority
- allow fault injection
- lots of improvements/refactors
- Enable GuC's WA_DUAL_QUEUE for newer platforms
- IRQ related fixes and improvements

i915:
- More accurate engine busyness metrics with GuC submission
- Ensure partial BO segment offset never exceeds allowed max
- Flush GuC CT receive tasklet during reset preparation
- Some DG2 refactor to fix DG2 bugs when operating with certain CPUs
- Fix DG1 power gate sequence
- Enabling uncompressed 128b/132b UHBR SST
- Handle hdmi connector init failures, and no HDMI/DP cases
- More robust engine resets on Haswell and older

i915/xe display:
- HDCP fixes for Xe3Lpd
- New GSC FW ARL-H/ARL-U
- support 3 VDSC engines 12 slices
- MBUS joining sanitisation
- reconcile i915/xe display power mgmt
- Xe3Lpd fixes
- UHBR rates for Thunderbolt

amdgpu:
- DRM panic support
- track BO memory stats at runtime
- Fix max surface handling in DC
- Cleaner shader support for gfx10.3 dGPUs
- fix drm buddy trim handling
- SDMA engine reset updates
- Fix doorbell ttm cleanup
- RAS updates
- ISP updates
- SDMA queue reset support
- Rework DPM powergating interfaces
- Documentation updates and cleanups
- DCN 3.5 updates
- Use a pm notifier to more gracefully handle VRAM eviction on
suspend or hibernate
- Add debugfs interfaces for forcing scheduling to specific engine
instances
- GG 9.5 updates
- IH 4.4 updates
- Make missing optional firmware less noisy
- PSP 13.x updates
- SMU 13.x updates
- VCN 5.x updates
- JPEG 5.x updates
- GC 12.x updates
- DC FAMS updates

amdkfd:
- GG 9.5 updates
- Logging improvements
- Shader debugger fixes
- Trap handler cleanup
- Cleanup includes
- Eviction fence wq fix

msm:
- MDSS:
- properly described UBWC registers
- added SM6150 (aka QCS615) support
- DPU:
- added SM6150 (aka QCS615) support
- enabled wide planes if virtual planes are enabled (by using two
SSPPs for a single plane)
- added CWB hardware blocks support
- DSI:
- added SM6150 (aka QCS615) support
- GPU:
- Print GMU core fw version
- GMU bandwidth voting for a740 and a750
- Expose uche trap base via uapi
- UAPI error reporting

rcar-du:
- Add r8a779h0 Support

ivpu:
- Fix qemu crash when using passthrough

nouveau:
- expose GSP-RM logging buffers via debugfs

panfrost:
- Add MT8188 Mali-G57 MC3 support

rockchip:
- Gamma LUT support

hisilicon:
- new HIBMC support

virtio-gpu:
- convert to helpers
- add prime support for scanout buffers

v3d:
- Add DRM_IOCTL_V3D_PERFMON_SET_GLOBAL

vc4:
- Add support for BCM2712

vkms:
- line-per-line compositing algorithm to improve performance

zynqmp:
- Add DP audio support

mediatek:
- dp: Add sdp path reset
- dp: Support flexible length of DP calibration data

etnaviv:
- add fdinfo memory support
- add explicit reset handling"

* tag 'drm-next-2025-01-17' of https://gitlab.freedesktop.org/drm/kernel: (1070 commits)
drm/bridge: fix documentation for the hdmi_audio_prepare() callback
doc/cgroup: Fix title underline length
drm/doc: Include new drm-compute documentation
cgroup/dmem: Fix parameters documentation
cgroup/dmem: Select PAGE_COUNTER
kernel/cgroup: Remove the unused variable climit
drm/display: hdmi: Do not read EDID on disconnected connectors
drm/tests: hdmi: Add connector disablement test
drm/connector: hdmi: Do atomic check when necessary
drm/amd/display: 3.2.316
drm/amd/display: avoid reset DTBCLK at clock init
drm/amd/display: improve dpia pre-train
drm/amd/display: Apply DML21 Patches
drm/amd/display: Use HW lock mgr for PSR1
drm/amd/display: Revised for Replay Pseudo vblank control
drm/amd/display: Add a new flag for replay low hz
drm/amd/display: Remove unused read_ono_state function from Hwss module
drm/amd/display: Do not elevate mem_type change to full update
drm/amd/display: Do not wait for PSR disable on vbl enable
drm/amd/display: Remove unnecessary eDP power down
...

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Merge drm/drm-next into drm-misc-next-fixes

drm-next has the dmem cgroup patches we need to merge fixes for.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge tag 'drm-intel-next-2025-01-07' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Driver Changes:
- Some DG2 refactor to fix DG2 bugs when operating with certain CPUs (Raag)
-

Merge tag 'drm-intel-next-2025-01-07' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Driver Changes:
- Some DG2 refactor to fix DG2 bugs when operating with certain CPUs (Raag)
- Use hw support for min/interim ddb allocation for async flip (Vinod)
- More general code refactor to allow full display separation (Jani)
- Expose dsc sink max slice count via debugfs (Swati)
- Fix C10 pll programming sequence (Suraj)
- Fix DG1 power gate sequence (Rodrigo)
- Use preemption timeout on selftest cleanup (Janusz)
- DP DSC related fixes (Ankit)
- Fix HDCP compliance test (Suraj)
- Clean and Optimise mtl_ddi_prepare_link_retrain (Suraj)
- Adjust Added Wake Time with PKG_C_LATENCY (Animesh)
- Enabling uncompressed 128b/132b UHBR SST (Jani)
- Handle hdmi connector init failures, and no HDMI/DP cases (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Z31_WPbBoHkwgEA9@intel.com

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Merge tag 'drm-intel-next-2024-12-11' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Core Changes:
- drm/print: add drm_print_hex_dump()

Driver Changes:
- HDCP fixes and updates

Merge tag 'drm-intel-next-2024-12-11' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Core Changes:
- drm/print: add drm_print_hex_dump()

Driver Changes:
- HDCP fixes and updates for Xe3lpd and for HDCP 1.4 (Suraj)
- Add dedicated lock for each sideband (Jani)
- New GSC FW for ARL-H and ARL-U (Daniele)
- Add support for 3 VDSC engines 12 slices (Ankit)
- Sanitize MBUS joining (Ville)
- Fixes in DP MST (Imre)
- Stop using pixel_format_from_register_bits() to parse VBT (Ville)
- Declutter CDCLK code (Ville)
- PSR clean up and fixes (Jouni, Jani, Animesh)
- DMC wakelock - Fixes and enablement for Xe3_LPD (Gustavo)
- Demote source OUI read/write failure logging to debug (Jani)
- Potential boot oops fix and some general cleanups (Ville)
- Scaler code cleanups (Ville)
- More conversion towards struct intel_display and general cleanups (Jani)
- Limit max compressed bpp to 18 when forcing DSC (Ankit)
- Start to reconcile i915's and xe's display power mgt sequences (Rodrigo)
- Some correction in the DP Link Training sequence (Arun)
- Avoid setting YUV420_MODE in PIPE_MISC on Xe3lpd (Ankit)
- MST and DDI cleanups and refactoring (Jani)
- Fixed an typo in i915_gem_gtt.c (Zhang)
- Try to make DPT shrinkable again (Ville)
- Try to fix CPU MMIO fails during legacy LUT updates (Ville)
- Some PPS cleanups (Ville, Jani)
- Use seq buf for printing rates (Jani)
- Flush DMC wakelock release work at the end of runtime suspend (Gustavo)
- Fix NULL pointer dereference in capture_engine (Eugene)
- Fix memory leak by correcting cache object name in error handler (Jiasheng)
- Small refactor in WM/DPKGC for modifying latency programmed into PKG_C_LATENCY (Suraj)
- Add drm_printer based hex dumper and use it (Jani)
- Move g4x code to specific g4x functions (Jani)

Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
[sima: conflict in intel_dp_mst.c due to conversion to
drm_connector_dynamic_init that landed through drm-misc]
Link: https://patchwork.freedesktop.org/patch/msgid/Z1n4VhatZpvT5xKs@intel.com

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drm/i915/display: drop unnecessary i915_drv.h includes

Now that we don't include i915_drv.h via any headers from display, we
can reliably remove unnecessary i915_drv.h includes and be sure they're
n

drm/i915/display: drop unnecessary i915_drv.h includes

Now that we don't include i915_drv.h via any headers from display, we
can reliably remove unnecessary i915_drv.h includes and be sure they're
not indirectly included. Add other includes where needed.

v2: Fix 32-bit build

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241217132147.2008057-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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drm/i915: split out i9xx_wm_regs.h

Very few files need the i9xx watermark related registers. Split them out
to a dedicated file.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://pa

drm/i915: split out i9xx_wm_regs.h

Very few files need the i9xx watermark related registers. Split them out
to a dedicated file.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241213115111.335474-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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drm/i915/dislay: convert i9xx_display_sr.[ch] to struct intel_display

Going forward, struct intel_display is the main device data structure
for display. Switch to it.

Cc: Rodrigo Vivi <rodrigo.vivi

drm/i915/dislay: convert i9xx_display_sr.[ch] to struct intel_display

Going forward, struct intel_display is the main device data structure
for display. Switch to it.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126101222.2671224-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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drm/i915/display: prefer DISPLAY_VER over GRAPHICS_VER in display s/r

Use display version checks for display scratch registers, not graphics
version. And for the older platforms it's the same thing

drm/i915/display: prefer DISPLAY_VER over GRAPHICS_VER in display s/r

Use display version checks for display scratch registers, not graphics
version. And for the older platforms it's the same thing anyway.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126101222.2671224-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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drm/i915/display: Move regfile registers intel_display.restore

The intel_display struct already has a place for save/restore
stuff. Move the i915's regfile there since they are only
related to displ

drm/i915/display: Move regfile registers intel_display.restore

The intel_display struct already has a place for save/restore
stuff. Move the i915's regfile there since they are only
related to display.

Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241113225016.208673-3-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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drm/i915/display: Convert i915_suspend into i9xx_display_sr

These save & restore functions inside i915_suspend are old display
functions to save and restore a bunch of display related registers.

Mo

drm/i915/display: Convert i915_suspend into i9xx_display_sr

These save & restore functions inside i915_suspend are old display
functions to save and restore a bunch of display related registers.

Move it under display and rename accordantly. Just don't move it
entirely towards intel_display struct yet because it depends
on drm_i915_private for the IS_MOBILE.

While doing this conversion also update the MIT header using
the new SPDX ones.

v2: Fix Makefile and include (Jani)
Removed vga and gmbus (Jani, Ville)

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241113225016.208673-2-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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