Lines Matching full:display
40 #include <drm/display/drm_dp_helper.h>
41 #include <drm/display/drm_dp_tunnel.h>
42 #include <drm/display/drm_dsc_helper.h>
43 #include <drm/display/drm_hdmi_helper.h>
176 struct intel_display *display = to_intel_display(intel_dp); in max_dprx_rate() local
191 drm_dbg_kms(display->drm, in max_dprx_rate()
287 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_sink_rates() local
297 drm_err(display->drm, in intel_dp_set_sink_rates()
312 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_max_sink_lane_count() local
326 drm_err(display->drm, in intel_dp_set_max_sink_lane_count()
359 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_common_rate() local
361 if (drm_WARN_ON(display->drm, in intel_dp_common_rate()
488 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_has_joiner() local
496 return DISPLAY_VER(display) >= 12 || in intel_dp_has_joiner()
497 (DISPLAY_VER(display) == 11 && in intel_dp_has_joiner()
526 struct intel_display *display = to_intel_display(intel_dp); in mtl_max_source_rate() local
532 if (DISPLAY_VERx100(display) == 1401) in mtl_max_source_rate()
586 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_source_rates() local
591 drm_WARN_ON(display->drm, in intel_dp_set_source_rates()
594 if (DISPLAY_VER(display) >= 14) { in intel_dp_set_source_rates()
595 if (display->platform.battlemage) { in intel_dp_set_source_rates()
603 } else if (DISPLAY_VER(display) >= 11) { in intel_dp_set_source_rates()
606 if (display->platform.dg2) in intel_dp_set_source_rates()
608 else if (display->platform.alderlake_p || display->platform.alderlake_s || in intel_dp_set_source_rates()
609 display->platform.dg1 || display->platform.rocketlake) in intel_dp_set_source_rates()
611 else if (display->platform.jasperlake || display->platform.elkhartlake) in intel_dp_set_source_rates()
615 } else if (display->platform.geminilake || display->platform.broxton) { in intel_dp_set_source_rates()
618 } else if (DISPLAY_VER(display) == 9) { in intel_dp_set_source_rates()
621 } else if ((display->platform.haswell && !display->platform.haswell_ulx) || in intel_dp_set_source_rates()
622 display->platform.broadwell) { in intel_dp_set_source_rates()
713 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_link_config_init() local
719 if (drm_WARN_ON(display->drm, !is_power_of_2(intel_dp_max_common_lane_count(intel_dp)))) in intel_dp_link_config_init()
724 if (drm_WARN_ON(display->drm, intel_dp->num_common_rates * num_common_lane_configs > in intel_dp_link_config_init()
748 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_link_config_get() local
751 if (drm_WARN_ON(display->drm, idx < 0 || idx >= intel_dp->link.num_configs)) in intel_dp_link_config_get()
780 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_common_rates() local
782 drm_WARN_ON(display->drm, in intel_dp_set_common_rates()
792 if (drm_WARN_ON(display->drm, intel_dp->num_common_rates == 0)) { in intel_dp_set_common_rates()
840 small_joiner_ram_size_bits(struct intel_display *display) in small_joiner_ram_size_bits() argument
842 if (DISPLAY_VER(display) >= 13) in small_joiner_ram_size_bits()
844 else if (DISPLAY_VER(display) >= 11) in small_joiner_ram_size_bits()
850 u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp) in intel_dp_dsc_nearest_valid_bpp() argument
857 drm_dbg_kms(display->drm, "Unsupported BPP %u, min %u\n", in intel_dp_dsc_nearest_valid_bpp()
863 if (DISPLAY_VER(display) >= 13) { in intel_dp_dsc_nearest_valid_bpp()
875 drm_dbg_kms(display->drm, in intel_dp_dsc_nearest_valid_bpp()
887 drm_dbg_kms(display->drm, "Set dsc bpp from %d to VESA %d\n", in intel_dp_dsc_nearest_valid_bpp()
896 static int bigjoiner_interface_bits(struct intel_display *display) in bigjoiner_interface_bits() argument
898 return DISPLAY_VER(display) >= 14 ? 36 : 24; in bigjoiner_interface_bits()
901 static u32 bigjoiner_bw_max_bpp(struct intel_display *display, u32 mode_clock, in bigjoiner_bw_max_bpp() argument
909 max_bpp = display->cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits(display) / in bigjoiner_bw_max_bpp()
918 static u32 small_joiner_ram_max_bpp(struct intel_display *display, in small_joiner_ram_max_bpp() argument
925 max_bpp = small_joiner_ram_size_bits(display) / mode_hdisplay; in small_joiner_ram_max_bpp()
943 u32 get_max_compressed_bpp_with_joiner(struct intel_display *display, in get_max_compressed_bpp_with_joiner() argument
947 u32 max_bpp = small_joiner_ram_max_bpp(display, mode_hdisplay, num_joined_pipes); in get_max_compressed_bpp_with_joiner()
950 max_bpp = min(max_bpp, bigjoiner_bw_max_bpp(display, mode_clock, in get_max_compressed_bpp_with_joiner()
958 u16 intel_dp_dsc_get_max_compressed_bpp(struct intel_display *display, in intel_dp_dsc_get_max_compressed_bpp() argument
1000 drm_dbg_kms(display->drm, "Max link bpp is %u for %u timeslots " in intel_dp_dsc_get_max_compressed_bpp()
1006 joiner_max_bpp = get_max_compressed_bpp_with_joiner(display, mode_clock, in intel_dp_dsc_get_max_compressed_bpp()
1010 bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(display, bits_per_pixel, pipe_bpp); in intel_dp_dsc_get_max_compressed_bpp()
1019 struct intel_display *display = to_intel_display(connector); in intel_dp_dsc_get_slice_count() local
1034 if (mode_clock >= ((display->cdclk.max_cdclk_freq * 85) / 100)) in intel_dp_dsc_get_slice_count()
1039 drm_dbg_kms(display->drm, in intel_dp_dsc_get_slice_count()
1058 (!HAS_DSC_3ENGINES(display) || num_joined_pipes != 4)) in intel_dp_dsc_get_slice_count()
1080 drm_dbg_kms(display->drm, "Unsupported Slice Count %d\n", in intel_dp_dsc_get_slice_count()
1088 struct intel_display *display = to_intel_display(intel_dp); in source_can_output() local
1100 return !HAS_GMCH(display) && !display->platform.ironlake; in source_can_output()
1104 return DISPLAY_VER(display) >= 11; in source_can_output()
1164 struct intel_display *display = to_intel_display(connector); in intel_dp_output_format() local
1176 drm_dbg_kms(display->drm, "Cannot force DSC output format\n"); in intel_dp_output_format()
1190 drm_WARN_ON(display->drm, !source_can_output(intel_dp, output_format)); in intel_dp_output_format()
1241 static bool intel_dp_hdisplay_bad(struct intel_display *display, in intel_dp_hdisplay_bad() argument
1257 return hdisplay == 4096 && !HAS_DDI(display); in intel_dp_hdisplay_bad()
1358 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_needs_joiner() local
1366 hdisplay_limit = DISPLAY_VER(display) >= 30 ? 6144 : 5120; in intel_dp_needs_joiner()
1368 return clock > num_joined_pipes * display->cdclk.max_dotclk_freq || in intel_dp_needs_joiner()
1376 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_num_joined_pipes() local
1381 if (HAS_ULTRAJOINER(display) && in intel_dp_num_joined_pipes()
1385 if ((HAS_BIGJOINER(display) || HAS_UNCOMPRESSED_JOINER(display)) && in intel_dp_num_joined_pipes()
1394 struct intel_display *display = to_intel_display(connector); in intel_dp_has_dsc() local
1396 if (!HAS_DSC(display)) in intel_dp_has_dsc()
1399 if (connector->mst.dp && !HAS_DSC_MST(display)) in intel_dp_has_dsc()
1416 struct intel_display *display = to_intel_display(_connector->dev); in intel_dp_mode_valid() local
1422 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_dp_mode_valid()
1429 status = intel_cpu_transcoder_mode_valid(display, mode); in intel_dp_mode_valid()
1455 if (intel_dp_hdisplay_bad(display, mode->hdisplay)) in intel_dp_mode_valid()
1490 intel_dp_dsc_get_max_compressed_bpp(display, in intel_dp_mode_valid()
1508 if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) in intel_dp_mode_valid()
1518 return intel_mode_valid_max_plane_size(display, mode, num_joined_pipes); in intel_dp_mode_valid()
1521 bool intel_dp_source_supports_tps3(struct intel_display *display) in intel_dp_source_supports_tps3() argument
1523 return DISPLAY_VER(display) >= 9 || in intel_dp_source_supports_tps3()
1524 display->platform.broadwell || display->platform.haswell; in intel_dp_source_supports_tps3()
1527 bool intel_dp_source_supports_tps4(struct intel_display *display) in intel_dp_source_supports_tps4() argument
1529 return DISPLAY_VER(display) >= 10; in intel_dp_source_supports_tps4()
1542 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_print_rates() local
1549 drm_dbg_kms(display->drm, "source rates: %s\n", seq_buf_str(&s)); in intel_dp_print_rates()
1553 drm_dbg_kms(display->drm, "sink rates: %s\n", seq_buf_str(&s)); in intel_dp_print_rates()
1557 drm_dbg_kms(display->drm, "common rates: %s\n", seq_buf_str(&s)); in intel_dp_print_rates()
1594 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_rate_select() local
1598 if (drm_WARN_ON(display->drm, i < 0)) in intel_dp_rate_select()
1628 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_source_supports_fec() local
1631 if (DISPLAY_VER(display) >= 12) in intel_dp_source_supports_fec()
1634 if (DISPLAY_VER(display) == 11 && encoder->port != PORT_A && in intel_dp_source_supports_fec()
1699 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_max_bpp() local
1725 drm_dbg_kms(display->drm, in intel_dp_max_bpp()
1737 struct intel_display *display = to_intel_display(connector); in has_seamless_m_n() local
1743 return HAS_DOUBLE_BUFFERED_M_N(display) && in has_seamless_m_n()
1805 int intel_dp_dsc_max_src_input_bpc(struct intel_display *display) in intel_dp_dsc_max_src_input_bpc() argument
1808 if (DISPLAY_VER(display) >= 12) in intel_dp_dsc_max_src_input_bpc()
1810 if (DISPLAY_VER(display) == 11) in intel_dp_dsc_max_src_input_bpc()
1819 struct intel_display *display = to_intel_display(connector); in intel_dp_dsc_compute_max_bpp() local
1824 dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); in intel_dp_dsc_compute_max_bpp()
1841 static int intel_dp_source_dsc_version_minor(struct intel_display *display) in intel_dp_source_dsc_version_minor() argument
1843 return DISPLAY_VER(display) >= 14 ? 2 : 1; in intel_dp_source_dsc_version_minor()
1877 struct intel_display *display = to_intel_display(connector); in intel_dp_dsc_compute_params() local
1900 min(intel_dp_source_dsc_version_minor(display), in intel_dp_dsc_compute_params()
1910 drm_dbg_kms(display->drm, in intel_dp_dsc_compute_params()
1925 struct intel_display *display = to_intel_display(connector); in intel_dp_dsc_supports_format() local
1936 if (min(intel_dp_source_dsc_version_minor(display), in intel_dp_dsc_supports_format()
2078 struct intel_display *display = to_intel_display(intel_dp); in dsc_src_max_compressed_bpp() local
2093 if (DISPLAY_VER(display) < 13) in dsc_src_max_compressed_bpp()
2100 * Note: for pre-13 display you still need to check the validity of each step.
2104 struct intel_display *display = to_intel_display(connector); in intel_dp_dsc_bpp_step_x16() local
2107 if (DISPLAY_VER(display) < 14 || !incr) in intel_dp_dsc_bpp_step_x16()
2117 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_dsc_valid_bpp() local
2120 if (DISPLAY_VER(display) >= 13) { in intel_dp_dsc_valid_bpp()
2149 struct intel_display *display = to_intel_display(intel_dp); in dsc_compute_compressed_bpp() local
2163 dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(display, adjusted_mode->clock, in dsc_compute_compressed_bpp()
2192 drm_dbg_kms(display->drm, in dsc_compute_compressed_bpp()
2220 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_force_dsc_pipe_bpp() local
2229 drm_dbg_kms(display->drm, "Input DSC BPC forced to %d\n", in intel_dp_force_dsc_pipe_bpp()
2234 drm_dbg_kms(display->drm, in intel_dp_force_dsc_pipe_bpp()
2290 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_dsc_compute_pipe_bpp() local
2307 drm_dbg_kms(display->drm, in intel_edp_dsc_compute_pipe_bpp()
2356 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_dsc_compute_config() local
2382 drm_dbg_kms(display->drm, in intel_dp_dsc_compute_config()
2394 drm_dbg_kms(display->drm, in intel_dp_dsc_compute_config()
2408 drm_dbg_kms(display->drm, in intel_dp_dsc_compute_config()
2432 drm_dbg_kms(display->drm, in intel_dp_dsc_compute_config()
2441 drm_dbg_kms(display->drm, "DP DSC computed with Input Bpp = %d " in intel_dp_dsc_compute_config()
2461 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_compute_config_link_bpp_limits() local
2499 drm_dbg_kms(display->drm, in intel_dp_compute_config_link_bpp_limits()
2517 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_dsc_compute_pipe_bpp_limits() local
2519 int dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(display); in intel_dp_dsc_compute_pipe_bpp_limits()
2598 bool intel_dp_joiner_needs_dsc(struct intel_display *display, in intel_dp_joiner_needs_dsc() argument
2602 * Pipe joiner needs compression up to display 12 due to bandwidth in intel_dp_joiner_needs_dsc()
2607 return (!HAS_UNCOMPRESSED_JOINER(display) && num_joined_pipes == 2) || in intel_dp_joiner_needs_dsc()
2617 struct intel_display *display = to_intel_display(encoder); in intel_dp_compute_link_config() local
2639 joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes); in intel_dp_compute_link_config()
2666 drm_dbg_kms(display->drm, "DSC required but not available\n"); in intel_dp_compute_link_config()
2671 drm_dbg_kms(display->drm, in intel_dp_compute_link_config()
2688 drm_dbg_kms(display->drm, in intel_dp_compute_link_config()
2734 static bool intel_dp_port_has_audio(struct intel_display *display, enum port port) in intel_dp_port_has_audio() argument
2736 if (display->platform.g4x) in intel_dp_port_has_audio()
2738 if (DISPLAY_VER(display) < 12 && port == PORT_A) in intel_dp_port_has_audio()
2748 struct intel_display *display = to_intel_display(crtc_state); in intel_dp_compute_vsc_colorimetry() local
2825 drm_WARN_ON(display->drm, in intel_dp_compute_vsc_colorimetry()
2913 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_compute_hdr_metadata_infoframe_sdp() local
2923 drm_dbg_kms(display->drm, in intel_dp_compute_hdr_metadata_infoframe_sdp()
2936 struct intel_display *display = to_intel_display(connector); in can_enable_drrs() local
2943 * as it allows more power-savings by complete shutting down display, in can_enable_drrs()
2954 if (!intel_cpu_transcoder_has_drrs(display, pipe_config->cpu_transcoder)) in can_enable_drrs()
2966 struct intel_display *display = to_intel_display(connector); in intel_dp_drrs_compute_config() local
2979 if (intel_cpu_transcoder_has_m2_n2(display, pipe_config->cpu_transcoder)) in intel_dp_drrs_compute_config()
2984 if (display->platform.ironlake || display->platform.sandybridge || in intel_dp_drrs_compute_config()
2985 display->platform.ivybridge) in intel_dp_drrs_compute_config()
3007 struct intel_display *display = to_intel_display(encoder); in intel_dp_has_audio() local
3013 if (!intel_dp_port_has_audio(display, encoder->port)) in intel_dp_has_audio()
3028 struct intel_display *display = to_intel_display(encoder); in intel_dp_compute_output_format() local
3039 drm_dbg_kms(display->drm, in intel_dp_compute_output_format()
3112 struct intel_display *display = to_intel_display(crtc_state); in intel_dp_compute_min_hblank() local
3130 if (DISPLAY_VER(display) < 30) in intel_dp_compute_min_hblank()
3143 drm_dbg(display->drm, "failed to calculate dsc slice count\n"); in intel_dp_compute_min_hblank()
3184 struct intel_display *display = to_intel_display(encoder); in intel_dp_compute_config() local
3209 if (intel_dp_hdisplay_bad(display, adjusted_mode->crtc_hdisplay)) in intel_dp_compute_config()
3254 drm_dbg_kms(display->drm, in intel_dp_compute_config()
3322 struct intel_display *display = to_intel_display(crtc_state); in intel_edp_backlight_on() local
3328 drm_dbg_kms(display->drm, "\n"); in intel_edp_backlight_on()
3338 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_backlight_off() local
3343 drm_dbg_kms(display->drm, "\n"); in intel_edp_backlight_off()
3386 struct intel_display *display = to_intel_display(connector); in intel_dp_sink_set_dsc_decompression() local
3390 drm_dbg_kms(display->drm, in intel_dp_sink_set_dsc_decompression()
3399 struct intel_display *display = to_intel_display(connector); in intel_dp_sink_set_dsc_passthrough() local
3408 drm_dbg_kms(display->drm, in intel_dp_sink_set_dsc_passthrough()
3417 struct intel_display *display = to_intel_display(state); in intel_dp_dsc_aux_ref_count() local
3442 drm_WARN_ON(display->drm, in intel_dp_dsc_aux_ref_count()
3489 struct intel_display *display = to_intel_display(state); in intel_dp_sink_enable_decompression() local
3494 if (drm_WARN_ON(display->drm, in intel_dp_sink_enable_decompression()
3520 struct intel_display *display = to_intel_display(state); in intel_dp_sink_disable_decompression() local
3525 if (drm_WARN_ON(display->drm, in intel_dp_sink_disable_decompression()
3540 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_init_source_oui() local
3554 drm_dbg_kms(display->drm, "Failed to read source OUI\n"); in intel_dp_init_source_oui()
3563 drm_dbg_kms(display->drm, "Failed to write source OUI\n"); in intel_dp_init_source_oui()
3577 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_wait_source_oui() local
3580 drm_dbg_kms(display->drm, in intel_dp_wait_source_oui()
3592 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_power() local
3629 drm_dbg_kms(display->drm, in intel_dp_set_power()
3673 struct intel_display *display = to_intel_display(encoder); in intel_dp_initial_fastset_check() local
3683 drm_dbg_kms(display->drm, in intel_dp_initial_fastset_check()
3698 drm_dbg_kms(display->drm, in intel_dp_initial_fastset_check()
3706 drm_dbg_kms(display->drm, in intel_dp_initial_fastset_check()
3718 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_get_pcon_dsc_cap() local
3727 drm_err(display->drm, "Failed to read DPCD register 0x%x\n", in intel_dp_get_pcon_dsc_cap()
3730 drm_dbg_kms(display->drm, "PCON ENCODER DSC DPCD: %*ph\n", in intel_dp_get_pcon_dsc_cap()
3802 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_pcon_start_frl_training() local
3810 drm_dbg(display->drm, "PCON max rate = %d Gbps\n", max_pcon_frl_bw); in intel_dp_pcon_start_frl_training()
3813 drm_dbg(display->drm, "Sink max rate from EDID = %d Gbps\n", in intel_dp_pcon_start_frl_training()
3822 drm_dbg(display->drm, "MAX_FRL_BW_MASK = %u\n", max_frl_bw_mask); in intel_dp_pcon_start_frl_training()
3859 drm_dbg(display->drm, "FRL_TRAINED_MASK = %u\n", frl_trained_mask); in intel_dp_pcon_start_frl_training()
3862 drm_dbg(display->drm, "FRL trained with : %d Gbps\n", in intel_dp_pcon_start_frl_training()
3902 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_check_frl_training() local
3917 drm_dbg(display->drm, in intel_dp_check_frl_training()
3923 drm_dbg(display->drm, in intel_dp_check_frl_training()
3926 drm_dbg(display->drm, "FRL training Completed\n"); in intel_dp_check_frl_training()
3976 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_pcon_dsc_configure() local
4026 drm_dbg_kms(display->drm, "Failed to set pcon DSC\n"); in intel_dp_pcon_dsc_configure()
4032 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_configure_protocol_converter() local
4047 drm_dbg_kms(display->drm, in intel_dp_configure_protocol_converter()
4083 drm_dbg_kms(display->drm, in intel_dp_configure_protocol_converter()
4090 drm_dbg_kms(display->drm, in intel_dp_configure_protocol_converter()
4123 struct intel_display *display = to_intel_display(connector); in intel_dp_get_dsc_sink_cap() local
4142 drm_err(display->drm, "Failed to read FEC DPCD register\n"); in intel_dp_get_dsc_sink_cap()
4146 drm_dbg_kms(display->drm, "FEC CAPABILITY: %x\n", in intel_dp_get_dsc_sink_cap()
4161 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_detect_dsc_caps() local
4164 if (!HAS_DSC(display)) in intel_dp_detect_dsc_caps()
4178 struct intel_display *display = to_intel_display(connector); in intel_edp_mso_mode_fixup() local
4194 drm_dbg_kms(display->drm, in intel_edp_mso_mode_fixup()
4202 struct intel_display *display = to_intel_display(encoder); in intel_edp_fixup_vbt_bpp() local
4220 drm_dbg_kms(display->drm, in intel_edp_fixup_vbt_bpp()
4229 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_mso_init() local
4238 drm_err(display->drm, "Failed to read MSO cap\n"); in intel_edp_mso_init()
4245 drm_err(display->drm, "Invalid MSO link count cap %u\n", mso); in intel_edp_mso_init()
4250 drm_dbg_kms(display->drm, in intel_edp_mso_init()
4254 if (!HAS_MSO(display)) { in intel_edp_mso_init()
4255 drm_err(display->drm, in intel_edp_mso_init()
4268 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_set_sink_rates() local
4300 drm_dbg_kms(display->drm, in intel_edp_set_sink_rates()
4324 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_init_dpcd() local
4327 drm_WARN_ON(display->drm, intel_dp->dpcd[DP_DPCD_REV] != 0); in intel_edp_init_dpcd()
4340 * Read the eDP display control registers. in intel_edp_init_dpcd()
4345 * method). The display control registers should read zero if they're in intel_edp_init_dpcd()
4351 drm_dbg_kms(display->drm, "eDP DPCD: %*ph\n", in intel_edp_init_dpcd()
4435 * a dongle is present but no display. Unless we require to know in intel_dp_get_dpcd()
4462 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mst_mode_choose() local
4464 if (!display->params.enable_dp_mst) in intel_dp_mst_mode_choose()
4480 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mst_detect() local
4489 drm_dbg_kms(display->drm, in intel_dp_mst_detect()
4494 str_yes_no(display->params.enable_dp_mst), in intel_dp_mst_detect()
4520 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mst_disconnect() local
4525 drm_dbg_kms(display->drm, in intel_dp_mst_disconnect()
4535 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_get_sink_irq_esi() local
4538 * Display WA for HSD #13013007775: mtl/arl/lnl in intel_dp_get_sink_irq_esi()
4543 if (IS_DISPLAY_VER(display, 14, 20) && !display->platform.battlemage) { in intel_dp_get_sink_irq_esi()
4624 intel_dp_hdr_metadata_infoframe_sdp_pack(struct intel_display *display, in intel_dp_hdr_metadata_infoframe_sdp_pack() argument
4641 drm_dbg_kms(display->drm, in intel_dp_hdr_metadata_infoframe_sdp_pack()
4647 drm_dbg_kms(display->drm, "wrong static hdr metadata size\n"); in intel_dp_hdr_metadata_infoframe_sdp_pack()
4705 struct intel_display *display = to_intel_display(encoder); in intel_write_dp_sdp() local
4719 len = intel_dp_hdr_metadata_infoframe_sdp_pack(display, in intel_write_dp_sdp()
4732 if (drm_WARN_ON(display->drm, len < 0)) in intel_write_dp_sdp()
4743 struct intel_display *display = to_intel_display(encoder); in intel_dp_set_infoframes() local
4744 i915_reg_t reg = HSW_TVIDEO_DIP_CTL(display, crtc_state->cpu_transcoder); in intel_dp_set_infoframes()
4749 if (HAS_AS_SDP(display)) in intel_dp_set_infoframes()
4752 u32 val = intel_de_read(display, reg) & ~dip_enable; in intel_dp_set_infoframes()
4755 if (!enable && HAS_DSC(display)) in intel_dp_set_infoframes()
4765 intel_de_write(display, reg, val); in intel_dp_set_infoframes()
4766 intel_de_posting_read(display, reg); in intel_dp_set_infoframes()
4887 struct intel_display *display = to_intel_display(encoder); in intel_read_dp_as_sdp() local
4902 drm_dbg_kms(display->drm, "Failed to unpack DP AS SDP\n"); in intel_read_dp_as_sdp()
4955 struct intel_display *display = to_intel_display(encoder); in intel_read_dp_vsc_sdp() local
4970 drm_dbg_kms(display->drm, "Failed to unpack DP VSC SDP\n"); in intel_read_dp_vsc_sdp()
4977 struct intel_display *display = to_intel_display(encoder); in intel_read_dp_hdr_metadata_infoframe_sdp() local
4994 drm_dbg_kms(display->drm, in intel_read_dp_hdr_metadata_infoframe_sdp()
5024 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_link_ok() local
5039 drm_dbg_kms(display->drm, in intel_dp_link_ok()
5062 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_mst_link_status() local
5069 drm_err(display->drm, in intel_dp_mst_link_status()
5095 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_check_mst_status() local
5106 drm_dbg_kms(display->drm, in intel_dp_check_mst_status()
5113 drm_dbg_kms(display->drm, "DPRX ESI: %4ph\n", esi); in intel_dp_check_mst_status()
5125 if (drm_dp_tunnel_handle_irq(display->dp_tunnel_mgr, in intel_dp_check_mst_status()
5135 drm_dbg_kms(display->drm, "Failed to ack ESI\n"); in intel_dp_check_mst_status()
5223 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_has_connector() local
5236 for_each_pipe(display, pipe) { in intel_dp_has_connector()
5248 struct intel_display *display = to_intel_display(connector); in wait_for_connector_hw_done() local
5250 drm_modeset_lock_assert_held(&display->drm->mode_config.connection_mutex); in wait_for_connector_hw_done()
5255 drm_WARN_ON(display->drm, in wait_for_connector_hw_done()
5264 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_get_active_pipes() local
5271 drm_connector_list_iter_begin(display->drm, &conn_iter); in intel_dp_get_active_pipes()
5291 drm_WARN_ON(display->drm, in intel_dp_get_active_pipes()
5322 struct intel_display *display = to_intel_display(encoder); in intel_dp_retrain_link() local
5330 ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, in intel_dp_retrain_link()
5348 drm_dbg_kms(display->drm, in intel_dp_retrain_link()
5353 ret = intel_modeset_commit_pipes(display, pipe_mask, ctx); in intel_dp_retrain_link()
5360 drm_dbg_kms(display->drm, in intel_dp_retrain_link()
5393 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_check_device_service_irq() local
5412 drm_dbg_kms(display->drm, "Sink specific irq unhandled\n"); in intel_dp_check_device_service_irq()
5417 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_check_link_service_irq() local
5429 drm_dp_tunnel_handle_irq(display->dp_tunnel_mgr, in intel_dp_check_link_service_irq()
5503 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_detect_dpcd() local
5508 if (drm_WARN_ON(display->drm, intel_dp_is_edp(intel_dp))) in intel_dp_detect_dpcd()
5551 drm_dbg_kms(display->drm, "Broken DP branch device, ignoring\n"); in intel_dp_detect_dpcd()
5593 struct intel_display *display = to_intel_display(encoder); in intel_digital_port_connected_locked() local
5599 with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) { in intel_digital_port_connected_locked()
5646 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_update_dfp() local
5670 drm_dbg_kms(display->drm, in intel_dp_update_dfp()
5703 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_update_420() local
5721 drm_dbg_kms(display->drm, in intel_dp_update_420()
5732 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_set_edid() local
5741 /* Below we depend on display info having been updated */ in intel_dp_set_edid()
5745 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] VRR capable: %s\n", in intel_dp_set_edid()
5782 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_detect_sdp_caps() local
5784 intel_dp->as_sdp_supported = HAS_AS_SDP(display) && in intel_dp_detect_sdp_caps()
5793 struct intel_display *display = to_intel_display(_connector->dev); in intel_dp_detect() local
5801 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n", in intel_dp_detect()
5803 drm_WARN_ON(display->drm, in intel_dp_detect()
5804 !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex)); in intel_dp_detect()
5806 if (!intel_display_device_enabled(display)) in intel_dp_detect()
5809 if (!intel_display_driver_check_access(display)) in intel_dp_detect()
5931 struct intel_display *display = to_intel_display(connector); in intel_dp_force() local
5934 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n", in intel_dp_force()
5937 if (!intel_display_driver_check_access(display)) in intel_dp_force()
5950 struct intel_display *display = to_intel_display(_connector->dev); in intel_dp_get_modes() local
5968 mode = drm_dp_downstream_mode(display->drm, in intel_dp_get_modes()
5984 struct intel_display *display = to_intel_display(connector); in intel_dp_connector_register() local
5993 drm_dbg_kms(display->drm, "registering %s bus for %s\n", in intel_dp_connector_register()
6030 struct intel_display *display = to_intel_display(connector); in intel_dp_connector_sync_state() local
6033 drm_WARN_ON(display->drm, in intel_dp_connector_sync_state()
6083 struct intel_display *display = to_intel_display(state); in intel_modeset_tile_group() local
6088 drm_connector_list_iter_begin(display->drm, &conn_iter); in intel_modeset_tile_group()
6124 struct intel_display *display = to_intel_display(state); in intel_modeset_affected_transcoders() local
6130 for_each_intel_crtc(display->drm, crtc) { in intel_modeset_affected_transcoders()
6157 drm_WARN_ON(display->drm, transcoders != 0); in intel_modeset_affected_transcoders()
6193 struct intel_display *display = to_intel_display(connector); in intel_dp_connector_atomic_check() local
6223 if (DISPLAY_VER(display) < 9) in intel_dp_connector_atomic_check()
6239 struct intel_display *display = to_intel_display(connector); in intel_dp_oob_hotplug_event() local
6245 spin_lock_irq(&display->irq.lock); in intel_dp_oob_hotplug_event()
6246 if (hpd_high != test_bit(hpd_pin, &display->hotplug.oob_hotplug_last_state)) { in intel_dp_oob_hotplug_event()
6247 display->hotplug.event_bits |= BIT(hpd_pin); in intel_dp_oob_hotplug_event()
6250 &display->hotplug.oob_hotplug_last_state, in intel_dp_oob_hotplug_event()
6254 spin_unlock_irq(&display->irq.lock); in intel_dp_oob_hotplug_event()
6257 intel_hpd_schedule_detection(display); in intel_dp_oob_hotplug_event()
6283 struct intel_display *display = to_intel_display(dig_port); in intel_dp_hpd_pulse() local
6289 intel_display_rpm_suspended(display) || in intel_dp_hpd_pulse()
6297 drm_dbg_kms(display->drm, in intel_dp_hpd_pulse()
6305 drm_dbg_kms(display->drm, "got hpd irq on [ENCODER:%d:%s] - %s\n", in intel_dp_hpd_pulse()
6338 static bool _intel_dp_is_port_edp(struct intel_display *display, in _intel_dp_is_port_edp() argument
6346 if (DISPLAY_VER(display) < 5) in _intel_dp_is_port_edp()
6349 if (DISPLAY_VER(display) < 9 && port == PORT_A) in _intel_dp_is_port_edp()
6355 bool intel_dp_is_port_edp(struct intel_display *display, enum port port) in intel_dp_is_port_edp() argument
6358 intel_bios_encoder_data_lookup(display, port); in intel_dp_is_port_edp()
6360 return _intel_dp_is_port_edp(display, devdata, port); in intel_dp_is_port_edp()
6366 struct intel_display *display = to_intel_display(encoder); in intel_dp_has_gamut_metadata_dip() local
6372 if (DISPLAY_VER(display) >= 11) in intel_dp_has_gamut_metadata_dip()
6378 if (display->platform.haswell || display->platform.broadwell || in intel_dp_has_gamut_metadata_dip()
6379 DISPLAY_VER(display) >= 9) in intel_dp_has_gamut_metadata_dip()
6389 struct intel_display *display = to_intel_display(intel_dp); in intel_dp_add_properties() local
6395 if (!display->platform.g4x && port != PORT_A) in intel_dp_add_properties()
6399 if (HAS_GMCH(display)) in intel_dp_add_properties()
6401 else if (DISPLAY_VER(display) >= 5) in intel_dp_add_properties()
6415 if (HAS_VRR(display)) in intel_dp_add_properties()
6422 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_add_properties() local
6430 display->vbt.orientation, in intel_edp_add_properties()
6438 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_backlight_setup() local
6441 if (display->platform.valleyview || display->platform.cherryview) in intel_edp_backlight_setup()
6450 struct intel_display *display = to_intel_display(intel_dp); in intel_edp_init_connector() local
6465 if (intel_get_lvds_encoder(display)) { in intel_edp_init_connector()
6466 drm_WARN_ON(display->drm, in intel_edp_init_connector()
6467 !(HAS_PCH_IBX(display) || HAS_PCH_CPT(display))); in intel_edp_init_connector()
6468 drm_info(display->drm, in intel_edp_init_connector()
6474 intel_bios_init_panel_early(display, &connector->panel, in intel_edp_init_connector()
6478 drm_info(display->drm, in intel_edp_init_connector()
6505 drm_info(display->drm, in intel_edp_init_connector()
6528 drm_info(display->drm, in intel_edp_init_connector()
6540 if (DISPLAY_VER(display) == 9 && drm_dp_is_branch(intel_dp->dpcd) && in intel_edp_init_connector()
6543 drm_info(display->drm, in intel_edp_init_connector()
6550 mutex_lock(&display->drm->mode_config.mutex); in intel_edp_init_connector()
6556 drm_dbg_kms(display->drm, in intel_edp_init_connector()
6571 intel_bios_init_panel_late(display, &connector->panel, encoder->devdata, in intel_edp_init_connector()
6587 mutex_unlock(&display->drm->mode_config.mutex); in intel_edp_init_connector()
6590 drm_info(display->drm, in intel_edp_init_connector()
6617 struct intel_display *display = to_intel_display(dig_port); in intel_dp_init_connector() local
6633 intel_dp->DP = intel_de_read(display, intel_dp->output_reg); in intel_dp_init_connector()
6636 if (_intel_dp_is_port_edp(display, encoder->devdata, port)) { in intel_dp_init_connector()
6642 DISPLAY_VER(display) < 30); in intel_dp_init_connector()
6647 if (drm_WARN_ON(dev, (display->platform.valleyview || in intel_dp_init_connector()
6648 display->platform.cherryview) && in intel_dp_init_connector()
6658 if (display->platform.valleyview || display->platform.cherryview) in intel_dp_init_connector()
6664 drm_dbg_kms(display->drm, in intel_dp_init_connector()
6673 if (!HAS_GMCH(display) && DISPLAY_VER(display) < 12) in intel_dp_init_connector()
6682 if (HAS_DDI(display)) in intel_dp_init_connector()
6702 if (is_hdcp_supported(display, port) && !intel_dp_is_edp(intel_dp)) { in intel_dp_init_connector()
6705 drm_dbg_kms(display->drm, in intel_dp_init_connector()
6717 intel_display_power_flush_work(display); in intel_dp_init_connector()
6723 void intel_dp_mst_suspend(struct intel_display *display) in intel_dp_mst_suspend() argument
6727 if (!HAS_DISPLAY(display)) in intel_dp_mst_suspend()
6730 for_each_intel_encoder(display->drm, encoder) { in intel_dp_mst_suspend()
6746 void intel_dp_mst_resume(struct intel_display *display) in intel_dp_mst_resume() argument
6750 if (!HAS_DISPLAY(display)) in intel_dp_mst_resume()
6753 for_each_intel_encoder(display->drm, encoder) { in intel_dp_mst_resume()