/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | marvell,prestera.txt | 21 ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>; 23 packet-processor@0 { 25 reg = <0 0x4000000>; 45 ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; 46 reg = <MBUS_ID(0x08, 0x00) 0 0x100000>; 73 that BAR2 is assigned to 0xf6000000 as base address from the PCI IO range: 76 ranges = <0x81000000 0x0 0xfb000000 0x0 0xfb000000 0x0 0xf0000 77 0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0x2000000 78 0x82000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x100000>; 79 phys = <&cp0_comphy0 0>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | pci-armada8k.txt | 32 reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>; 40 bus-range = <0 0xff>; 41 ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */ 42 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */ 43 interrupt-map-mask = <0 0 0 0>; 44 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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H A D | hisilicon,kirin-pcie.yaml | 77 reg = <0x0 0xf4000000 0x0 0x1000>, 78 <0x0 0xff3fe000 0x0 0x1000>, 79 <0x0 0xf3f20000 0x0 0x40000>, 80 <0x0 0xf5000000 0x0 0x2000>; 82 bus-range = <0x0 0xff>; 86 ranges = <0x02000000 0x0 0x00000000 87 0x0 0xf6000000 88 0x0 0x02000000>; 91 interrupts = <0 283 4>; 93 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
H A D | armada-70x0.dtsi | 22 #define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000)) 23 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
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H A D | armada-80x0.dtsi | 24 #define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000)) 25 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 45 #define CP11X_PCIEx_MEM_BASE(iface) (0xfa000000 + (iface * 0x1000000)) 46 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | t208xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t1023rdb.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 1 0 0xf 0xff800000 0x00010000>; 70 nor@0,0 { [all …]
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H A D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
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H A D | t104xd4rdb.dtsi | 42 size = <0 0x1000000>; 43 alignment = <0 0x1000000>; 46 size = <0 0x400000>; 47 alignment = <0 0x400000>; 50 size = <0 0x2000000>; 51 alignment = <0 0x2000000>; 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t104xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t1024qds.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 2 0 0xf 0xff800000 0x00010000 69 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t1024rdb.dts | 54 size = <0 0x1000000>; 55 alignment = <0 0x1000000>; 59 size = <0 0x400000>; 60 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 reg = <0xf 0xfe124000 0 0x2000>; 71 ranges = <0 0 0xf 0xe8000000 0x08000000 72 2 0 0xf 0xff800000 0x00010000 73 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | b4qds.dtsi | 51 reg = <0xf 0xfe124000 0 0x2000>; 52 ranges = <0 0 0xf 0xe8000000 0x08000000 53 2 0 0xf 0xff800000 0x00010000 54 3 0 0xf 0xffdf0000 0x00008000>; 56 nor@0,0 { 60 reg = <0x0 0x0 0x8000000>; 65 nand@2,0 { 69 reg = <0x2 0x0 0x10000>; 71 partition@0 { 74 reg = <0x0 0x00100000>; [all …]
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H A D | t208xqds.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t4240rdb.dts | 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; 61 nor@0,0 { 65 reg = <0x0 0x0 0x8000000>; 71 nand@2,0 { 75 reg = <0x2 0x0 0x10000>; 89 size = <0 0x1000000>; 90 alignment = <0 0x1000000>; [all …]
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H A D | t104xqds.dtsi | 74 size = <0 0x1000000>; 75 alignment = <0 0x1000000>; 78 size = <0 0x400000>; 79 alignment = <0 0x400000>; 82 size = <0 0x2000000>; 83 alignment = <0 0x2000000>; 88 reg = <0xf 0xfe124000 0 0x2000>; 89 ranges = <0 0 0xf 0xe8000000 0x08000000 90 2 0 0xf 0xff800000 0x00010000 91 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t4240qds.dts | 83 reg = <0xf 0xfe124000 0 0x2000>; 84 ranges = <0 0 0xf 0xe8000000 0x08000000 85 2 0 [all...] |
/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | pq2fads.dts | 26 #size-cells = <0>; 28 cpu@0 { 30 reg = <0x0>; 35 timebase-frequency = <0>; 36 clock-frequency = <0>; 42 reg = <0x0 0x0>; 50 reg = <0xf0010100 0x60>; 52 ranges = <0x0 0x0 0xff800000 0x800000 53 0x1 0x0 0xf4500000 0x8000 54 0x8 0x0 0xf8200000 0x8000>; [all …]
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H A D | mpc8272ads.dts | 25 #size-cells = <0>; 27 PowerPC,8272@0 { 29 reg = <0x0>; 34 timebase-frequency = <0>; 35 bus-frequency = <0>; 36 clock-frequency = <0>; 42 reg = <0x0 0x0>; 50 reg = <0xf0010100 0x40>; 52 ranges = <0x0 0x0 0xff800000 0x00800000 53 0x1 0x0 0xf4500000 0x8000 [all …]
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/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/ |
H A D | aestab2.h | 49 0x00000001, 0x00000002, 0x00000004, 0x00000008, 50 0x00000010, 0x00000020, 0x00000040, 0x00000080, 51 0x0000001b, 0x00000036 57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b, 58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5, 59 0x00000030, 0x00000001, 0x00000067, 0x0000002b, 60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076, 61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d, 62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0, 63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af, [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
H A D | hi3660.dtsi | 25 #size-cells = <0>; 58 cpu0: cpu@0 { 61 reg = <0x0 0x0>; 75 reg = <0x0 0x1>; 88 reg = <0x0 0x2>; 101 reg = <0x0 0x3>; 114 reg = <0x0 0x100>; 128 reg = <0x0 0x101>; 141 reg = <0x0 0x102>; 154 reg = <0x0 0x103>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sdm630.dtsi | 34 #clock-cells = <0>; 41 #clock-cells = <0>; 49 #size-cells = <0>; 54 reg = <0x0 0x100>; 74 reg = <0x0 0x101>; 89 reg = <0x0 0x102>; 104 reg = <0x [all...] |
/freebsd/sys/dev/bge/ |
H A D | if_bgereg.h | 54 * device register space at offset 0x8000 to read any 32K chunk 60 * accessed directly. NIC memory addresses are offset by 0x01000000. 64 #define BGE_PAGE_ZERO 0x00000000 65 #define BGE_PAGE_ZERO_END 0x000000FF 66 #define BGE_SEND_RING_RCB 0x00000100 67 #define BGE_SEND_RING_RCB_END 0x000001FF 68 #define BGE_RX_RETURN_RING_RCB 0x00000200 69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF 70 #define BGE_STATS_BLOCK 0x00000300 71 #define BGE_STATS_BLOCK_END 0x00000AFF [all …]
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/freebsd/sys/dev/pms/RefTisa/sallsdk/api/ |
H A D | sa.h | 39 (bitptr)&(((STRUCT_TYPE *)0)->FEILD) 56 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)((((bit16)VALUE16)>>8)&0xFF); \ 57 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)(((bit16)VALUE16)&0xFF); 60 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)((((bit32)VALUE32)>>24)&0xFF); \ 61 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)((((bit32)VALUE32)>>16)&0xFF); \ 62 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+2))) = (bit8)((((bit32)VALUE32)>>8)&0xFF); \ 63 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+3))) = (bit8)(((bit32)VALUE32)&0xFF); 82 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+1))) = (bit8)((((bit16)VALUE16)>>8)&0xFF); \ 83 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit8)(((bit16)VALUE16)&0xFF); 86 (*((bit8 *)(((bit8 *)DMA_ADDR)+(OFFSET)+3))) = (bit8)((((bit32)VALUE32)>>24)&0xFF); \ [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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