Lines Matching +full:0 +full:xf6000000
51 reg = <0xf 0xfe124000 0 0x2000>;
52 ranges = <0 0 0xf 0xe8000000 0x08000000
53 2 0 0xf 0xff800000 0x00010000
54 3 0 0xf 0xffdf0000 0x00008000>;
56 nor@0,0 {
60 reg = <0x0 0x0 0x8000000>;
65 nand@2,0 {
69 reg = <0x2 0x0 0x10000>;
71 partition@0 {
74 reg = <0x0 0x00100000>;
81 reg = <0x00100000 0x00100000>;
87 reg = <0x00200000 0x00A00000>;
93 reg = <0x00c00000 0x1F400000>;
98 board-control@3,0 {
100 reg = <3 0 0x300>;
114 size = <0 0x1000000>;
115 alignment = <0 0x1000000>;
118 size = <0 0x400000>;
119 alignment = <0 0x400000>;
122 size = <0 0x2000000>;
123 alignment = <0 0x2000000>;
128 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
132 ranges = <0x0 0xf 0xf4000000 0x2000000>;
136 ranges = <0x0 0xf 0xf6000000 0x2000000>;
140 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
141 reg = <0xf 0xfe000000 0 0x00001000>;
143 flash@0 {
147 reg = <0>;
160 reg = <0x77>;
162 #size-cells = <0>;
164 i2c@0 {
166 #size-cells = <0>;
167 reg = <0>;
171 reg = <0x50>;
175 reg = <0x51>;
179 reg = <0x53>;
183 reg = <0x57>;
187 reg = <0x68>;
193 #size-cells = <0>;
194 reg = <0x2>;
198 reg = <0x40>;
205 #size-cells = <0>;
206 reg = <0x3>;
210 reg = <0x4c>;
244 reg = <0x10>;
248 reg = <0x11>;
252 reg = <0x1c>;
257 reg = <0x1d>;
265 reg = <0xf 0xfe200000 0 0x10000>;
266 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
267 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
268 pcie@0 {
269 ranges = <0x02000000 0 0xe0000000
270 0x02000000 0 0xe0000000
271 0 0x20000000
273 0x01000000 0 0x00000000
274 0x01000000 0 0x00000000
275 0 0x00010000>;