Lines Matching +full:0 +full:xf6000000
56 reg = <0xf 0xfe124000 0 0x2000>;
57 ranges = <0 0 0xf 0xe8000000 0x08000000
58 2 0 0xf 0xff800000 0x00010000
59 3 0 0xf 0xffdf0000 0x00008000>;
61 nor@0,0 {
65 reg = <0x0 0x0 0x8000000>;
71 nand@2,0 {
75 reg = <0x2 0x0 0x10000>;
89 size = <0 0x1000000>;
90 alignment = <0 0x1000000>;
93 size = <0 0x400000>;
94 alignment = <0 0x400000>;
97 size = <0 0x2000000>;
98 alignment = <0 0x2000000>;
103 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
107 ranges = <0x0 0xf 0xf4000000 0x2000000>;
111 ranges = <0x0 0xf 0xf6000000 0x2000000>;
115 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
116 reg = <0xf 0xfe000000 0 0x00001000>;
118 flash@0 {
122 reg = <0>;
130 reg = <0x2f>;
134 reg = <0x52>;
138 reg = <0x54>;
142 reg = <0x56>;
146 reg = <0x68>;
234 sgmiiphy21: ethernet-phy@0 {
235 reg = <0x0>;
239 reg = <0x1>;
243 reg = <0x2>;
247 reg = <0x3>;
251 reg = <0x4>;
255 reg = <0x5>;
259 reg = <0x6>;
263 reg = <0x7>;
270 reg = <0x10>;
275 reg = <0x11>;
280 reg = <0x13>;
285 reg = <0x12>;
292 reg = <0xf 0xfe240000 0 0x10000>;
293 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
294 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
295 pcie@0 {
296 ranges = <0x02000000 0 0xe0000000
297 0x02000000 0 0xe0000000
298 0 0x20000000
300 0x01000000 0 0x00000000
301 0x01000000 0 0x00000000
302 0 0x00010000>;
307 reg = <0xf 0xfe250000 0 0x10000>;
308 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
309 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
310 pcie@0 {
311 ranges = <0x02000000 0 0xe0000000
312 0x02000000 0 0xe0000000
313 0 0x20000000
315 0x01000000 0 0x00000000
316 0x01000000 0 0x00000000
317 0 0x00010000>;
322 reg = <0xf 0xfe260000 0 0x1000>;
323 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
324 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
325 pcie@0 {
326 ranges = <0x02000000 0 0xe0000000
327 0x02000000 0 0xe0000000
328 0 0x20000000
330 0x01000000 0 0x00000000
331 0x01000000 0 0x00000000
332 0 0x00010000>;
337 reg = <0xf 0xfe270000 0 0x10000>;
338 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
339 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
340 pcie@0 {
341 ranges = <0x02000000 0 0xe0000000
342 0x02000000 0 0xe0000000
343 0 0x20000000
345 0x01000000 0 0x00000000
346 0x01000000 0 0x00000000
347 0 0x00010000>;
352 reg = <0xf 0xfe0c0000 0 0x11000>;
355 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
358 ranges = <0 0 0xc 0x30000000 0 0x10000000>;