Lines Matching +full:0 +full:xf6000000

54  *    device register space at offset 0x8000 to read any 32K chunk
60  *    accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define	BGE_PAGE_ZERO			0x00000000
65 #define	BGE_PAGE_ZERO_END		0x000000FF
66 #define	BGE_SEND_RING_RCB		0x00000100
67 #define	BGE_SEND_RING_RCB_END		0x000001FF
68 #define	BGE_RX_RETURN_RING_RCB		0x00000200
69 #define	BGE_RX_RETURN_RING_RCB_END	0x000002FF
70 #define	BGE_STATS_BLOCK			0x00000300
71 #define	BGE_STATS_BLOCK_END		0x00000AFF
72 #define	BGE_STATUS_BLOCK		0x00000B00
73 #define	BGE_STATUS_BLOCK_END		0x00000B4F
74 #define	BGE_SRAM_FW_MB			0x00000B50
75 #define	BGE_SRAM_DATA_SIG		0x00000B54
76 #define	BGE_SRAM_DATA_CFG		0x00000B58
77 #define	BGE_SRAM_FW_CMD_MB		0x00000B78
78 #define	BGE_SRAM_FW_CMD_LEN_MB		0x00000B7C
79 #define	BGE_SRAM_FW_CMD_DATA_MB		0x00000B80
80 #define	BGE_SRAM_FW_DRV_STATE_MB	0x00000C04
81 #define	BGE_SRAM_MAC_ADDR_HIGH_MB	0x00000C14
82 #define	BGE_SRAM_MAC_ADDR_LOW_MB	0x00000C18
83 #define	BGE_SOFTWARE_GENCOMM_END	0x00000FFF
84 #define	BGE_UNMAPPED			0x00001000
85 #define	BGE_UNMAPPED_END		0x00001FFF
86 #define	BGE_DMA_DESCRIPTORS		0x00002000
87 #define	BGE_DMA_DESCRIPTORS_END		0x00003FFF
88 #define	BGE_SEND_RING_5717		0x00004000
89 #define	BGE_SEND_RING_1_TO_4		0x00004000
90 #define	BGE_SEND_RING_1_TO_4_END	0x00005FFF
93 #define	BGE_SRAM_DATA_SIG_MAGIC		0x4B657654	/* 'KevT' */
95 #define	BGE_FW_CMD_DRV_ALIVE		0x00000001
96 #define	BGE_FW_CMD_PAUSE		0x00000002
97 #define	BGE_FW_CMD_IPV4_ADDR_CHANGE	0x00000003
98 #define	BGE_FW_CMD_IPV6_ADDR_CHANGE	0x00000004
99 #define	BGE_FW_CMD_LINK_UPDATE		0x0000000C
100 #define	BGE_FW_CMD_DRV_ALIVE2		0x0000000D
101 #define	BGE_FW_CMD_DRV_ALIVE3		0x0000000E
105 #define	BGE_FW_DRV_STATE_START		0x00000001
106 #define	BGE_FW_DRV_STATE_START_DONE	0x80000001
107 #define	BGE_FW_DRV_STATE_UNLOAD		0x00000002
108 #define	BGE_FW_DRV_STATE_UNLOAD_DONE	0x80000002
109 #define	BGE_FW_DRV_STATE_WOL		0x00000003
110 #define	BGE_FW_DRV_STATE_SUSPEND	0x00000004
113 #define	BGE_STD_RX_RINGS		0x00006000
114 #define	BGE_STD_RX_RINGS_END		0x00006FFF
115 #define	BGE_JUMBO_RX_RINGS		0x00007000
116 #define	BGE_JUMBO_RX_RINGS_END		0x00007FFF
117 #define	BGE_BUFFPOOL_1			0x00008000
118 #define	BGE_BUFFPOOL_1_END		0x0000FFFF
119 #define	BGE_BUFFPOOL_2			0x00010000 /* or expansion ROM */
120 #define	BGE_BUFFPOOL_2_END		0x00017FFF
121 #define	BGE_BUFFPOOL_3			0x00018000 /* or expansion ROM */
122 #define	BGE_BUFFPOOL_3_END		0x0001FFFF
123 #define	BGE_STD_RX_RINGS_5717		0x00040000
124 #define	BGE_JUMBO_RX_RINGS_5717		0x00044400
127 #define	BGE_SEND_RING_5_TO_6		0x00006000
128 #define	BGE_SEND_RING_5_TO_6_END	0x00006FFF
129 #define	BGE_SEND_RING_7_TO_8		0x00007000
130 #define	BGE_SEND_RING_7_TO_8_END	0x00007FFF
131 #define	BGE_SEND_RING_9_TO_16		0x00008000
132 #define	BGE_SEND_RING_9_TO_16_END	0x0000BFFF
133 #define	BGE_EXT_STD_RX_RINGS		0x0000C000
134 #define	BGE_EXT_STD_RX_RINGS_END	0x0000CFFF
135 #define	BGE_EXT_JUMBO_RX_RINGS		0x0000D000
136 #define	BGE_EXT_JUMBO_RX_RINGS_END	0x0000DFFF
137 #define	BGE_MINI_RX_RINGS		0x0000E000
138 #define	BGE_MINI_RX_RINGS_END		0x0000FFFF
139 #define	BGE_AVAIL_REGION1		0x00010000 /* or expansion ROM */
140 #define	BGE_AVAIL_REGION1_END		0x00017FFF
141 #define	BGE_AVAIL_REGION2		0x00018000 /* or expansion ROM */
142 #define	BGE_AVAIL_REGION2_END		0x0001FFFF
143 #define	BGE_EXT_SSRAM			0x00020000
144 #define	BGE_EXT_SSRAM_END		0x000FFFFF
159 #define	BGE_PCI_VID			0x00
160 #define	BGE_PCI_DID			0x02
161 #define	BGE_PCI_CMD			0x04
162 #define	BGE_PCI_STS			0x06
163 #define	BGE_PCI_REV			0x08
164 #define	BGE_PCI_CLASS			0x09
165 #define	BGE_PCI_CACHESZ			0x0C
166 #define	BGE_PCI_LATTIMER		0x0D
167 #define	BGE_PCI_HDRTYPE			0x0E
168 #define	BGE_PCI_BIST			0x0F
169 #define	BGE_PCI_BAR0			0x10
170 #define	BGE_PCI_BAR1			0x14
171 #define	BGE_PCI_SUBSYS			0x2C
172 #define	BGE_PCI_SUBVID			0x2E
173 #define	BGE_PCI_ROMBASE			0x30
174 #define	BGE_PCI_CAPPTR			0x34
175 #define	BGE_PCI_INTLINE			0x3C
176 #define	BGE_PCI_INTPIN			0x3D
177 #define	BGE_PCI_MINGNT			0x3E
178 #define	BGE_PCI_MAXLAT			0x3F
179 #define	BGE_PCI_PCIXCAP			0x40
180 #define	BGE_PCI_NEXTPTR_PM		0x41
181 #define	BGE_PCI_PCIX_CMD		0x42
182 #define	BGE_PCI_PCIX_STS		0x44
183 #define	BGE_PCI_PWRMGMT_CAPID		0x48
184 #define	BGE_PCI_NEXTPTR_VPD		0x49
185 #define	BGE_PCI_PWRMGMT_CAPS		0x4A
186 #define	BGE_PCI_PWRMGMT_CMD		0x4C
187 #define	BGE_PCI_PWRMGMT_STS		0x4D
188 #define	BGE_PCI_PWRMGMT_DATA		0x4F
189 #define	BGE_PCI_VPD_CAPID		0x50
190 #define	BGE_PCI_NEXTPTR_MSI		0x51
191 #define	BGE_PCI_VPD_ADDR		0x52
192 #define	BGE_PCI_VPD_DATA		0x54
193 #define	BGE_PCI_MSI_CAPID		0x58
194 #define	BGE_PCI_NEXTPTR_NONE		0x59
195 #define	BGE_PCI_MSI_CTL			0x5A
196 #define	BGE_PCI_MSI_ADDR_HI		0x5C
197 #define	BGE_PCI_MSI_ADDR_LO		0x60
198 #define	BGE_PCI_MSI_DATA		0x64
207 #define	BGE_PCIE_DEVCTL			0x08
208 #define	BGE_PCIE_DEVCTL_MAX_READRQ_MASK	0x7000
209 #define	BGE_PCIE_DEVCTL_MAX_READRQ_128	0x0000
210 #define	BGE_PCIE_DEVCTL_MAX_READRQ_256	0x1000
211 #define	BGE_PCIE_DEVCTL_MAX_READRQ_512	0x2000
212 #define	BGE_PCIE_DEVCTL_MAX_READRQ_1024	0x3000
213 #define	BGE_PCIE_DEVCTL_MAX_READRQ_2048	0x4000
214 #define	BGE_PCIE_DEVCTL_MAX_READRQ_4096	0x5000
217 #define	BGE_PCIE_CAPID_REG		0xD0
218 #define	BGE_PCIE_CAPID			0x10
223 #define	BGE_PCI_MISC_CTL		0x68
224 #define	BGE_PCI_DMA_RW_CTL		0x6C
225 #define	BGE_PCI_PCISTATE		0x70
226 #define	BGE_PCI_CLKCTL			0x74
227 #define	BGE_PCI_REG_BASEADDR		0x78
228 #define	BGE_PCI_MEMWIN_BASEADDR		0x7C
229 #define	BGE_PCI_REG_DATA		0x80
230 #define	BGE_PCI_MEMWIN_DATA		0x84
231 #define	BGE_PCI_MODECTL			0x88
232 #define	BGE_PCI_MISC_CFG		0x8C
233 #define	BGE_PCI_MISC_LOCALCTL		0x90
234 #define	BGE_PCI_UNDI_RX_STD_PRODIDX_HI	0x98
235 #define	BGE_PCI_UNDI_RX_STD_PRODIDX_LO	0x9C
236 #define	BGE_PCI_UNDI_RX_RTN_CONSIDX_HI	0xA0
237 #define	BGE_PCI_UNDI_RX_RTN_CONSIDX_LO	0xA4
238 #define	BGE_PCI_UNDI_TX_BD_PRODIDX_HI	0xA8
239 #define	BGE_PCI_UNDI_TX_BD_PRODIDX_LO	0xAC
240 #define	BGE_PCI_ISR_MBX_HI		0xB0
241 #define	BGE_PCI_ISR_MBX_LO		0xB4
242 #define	BGE_PCI_PRODID_ASICREV		0xBC
243 #define	BGE_PCI_GEN2_PRODID_ASICREV	0xF4
244 #define	BGE_PCI_GEN15_PRODID_ASICREV	0xFC
247 #define	BGE_PCIMISCCTL_CLEAR_INTA	0x00000001
248 #define	BGE_PCIMISCCTL_MASK_PCI_INTR	0x00000002
249 #define	BGE_PCIMISCCTL_ENDIAN_BYTESWAP	0x00000004
250 #define	BGE_PCIMISCCTL_ENDIAN_WORDSWAP	0x00000008
251 #define	BGE_PCIMISCCTL_PCISTATE_RW	0x00000010
252 #define	BGE_PCIMISCCTL_CLOCKCTL_RW	0x00000020
253 #define	BGE_PCIMISCCTL_REG_WORDSWAP	0x00000040
254 #define	BGE_PCIMISCCTL_INDIRECT_ACCESS	0x00000080
255 #define	BGE_PCIMISCCTL_TAGGED_STATUS	0x00000200
256 #define	BGE_PCIMISCCTL_ASICREV		0xFFFF0000
265 #define	BGE_CHIPID_TIGON_I		0x4000
266 #define	BGE_CHIPID_TIGON_II		0x6000
267 #define	BGE_CHIPID_BCM5700_A0		0x7000
268 #define	BGE_CHIPID_BCM5700_A1		0x7001
269 #define	BGE_CHIPID_BCM5700_B0		0x7100
270 #define	BGE_CHIPID_BCM5700_B1		0x7101
271 #define	BGE_CHIPID_BCM5700_B2		0x7102
272 #define	BGE_CHIPID_BCM5700_B3		0x7103
273 #define	BGE_CHIPID_BCM5700_ALTIMA	0x7104
274 #define	BGE_CHIPID_BCM5700_C0		0x7200
275 #define	BGE_CHIPID_BCM5701_A0		0x0000	/* grrrr */
276 #define	BGE_CHIPID_BCM5701_B0		0x0100
277 #define	BGE_CHIPID_BCM5701_B2		0x0102
278 #define	BGE_CHIPID_BCM5701_B5		0x0105
279 #define	BGE_CHIPID_BCM5703_A0		0x1000
280 #define	BGE_CHIPID_BCM5703_A1		0x1001
281 #define	BGE_CHIPID_BCM5703_A2		0x1002
282 #define	BGE_CHIPID_BCM5703_A3		0x1003
283 #define	BGE_CHIPID_BCM5703_B0		0x1100
284 #define	BGE_CHIPID_BCM5704_A0		0x2000
285 #define	BGE_CHIPID_BCM5704_A1		0x2001
286 #define	BGE_CHIPID_BCM5704_A2		0x2002
287 #define	BGE_CHIPID_BCM5704_A3		0x2003
288 #define	BGE_CHIPID_BCM5704_B0		0x2100
289 #define	BGE_CHIPID_BCM5705_A0		0x3000
290 #define	BGE_CHIPID_BCM5705_A1		0x3001
291 #define	BGE_CHIPID_BCM5705_A2		0x3002
292 #define	BGE_CHIPID_BCM5705_A3		0x3003
293 #define	BGE_CHIPID_BCM5750_A0		0x4000
294 #define	BGE_CHIPID_BCM5750_A1		0x4001
295 #define	BGE_CHIPID_BCM5750_A3		0x4000
296 #define	BGE_CHIPID_BCM5750_B0		0x4100
297 #define	BGE_CHIPID_BCM5750_B1		0x4101
298 #define	BGE_CHIPID_BCM5750_C0		0x4200
299 #define	BGE_CHIPID_BCM5750_C1		0x4201
300 #define	BGE_CHIPID_BCM5750_C2		0x4202
301 #define	BGE_CHIPID_BCM5714_A0		0x5000
302 #define	BGE_CHIPID_BCM5752_A0		0x6000
303 #define	BGE_CHIPID_BCM5752_A1		0x6001
304 #define	BGE_CHIPID_BCM5752_A2		0x6002
305 #define	BGE_CHIPID_BCM5714_B0		0x8000
306 #define	BGE_CHIPID_BCM5714_B3		0x8003
307 #define	BGE_CHIPID_BCM5715_A0		0x9000
308 #define	BGE_CHIPID_BCM5715_A1		0x9001
309 #define	BGE_CHIPID_BCM5715_A3		0x9003
310 #define	BGE_CHIPID_BCM5755_A0		0xa000
311 #define	BGE_CHIPID_BCM5755_A1		0xa001
312 #define	BGE_CHIPID_BCM5755_A2		0xa002
313 #define	BGE_CHIPID_BCM5722_A0		0xa200
314 #define	BGE_CHIPID_BCM5754_A0		0xb000
315 #define	BGE_CHIPID_BCM5754_A1		0xb001
316 #define	BGE_CHIPID_BCM5754_A2		0xb002
317 #define	BGE_CHIPID_BCM5761_A0		0x5761000
318 #define	BGE_CHIPID_BCM5761_A1		0x5761100
319 #define	BGE_CHIPID_BCM5784_A0		0x5784000
320 #define	BGE_CHIPID_BCM5784_A1		0x5784100
321 #define	BGE_CHIPID_BCM5787_A0		0xb000
322 #define	BGE_CHIPID_BCM5787_A1		0xb001
323 #define	BGE_CHIPID_BCM5787_A2		0xb002
324 #define	BGE_CHIPID_BCM5906_A0		0xc000
325 #define	BGE_CHIPID_BCM5906_A1		0xc001
326 #define	BGE_CHIPID_BCM5906_A2		0xc002
327 #define	BGE_CHIPID_BCM57780_A0		0x57780000
328 #define	BGE_CHIPID_BCM57780_A1		0x57780001
329 #define	BGE_CHIPID_BCM5717_A0		0x05717000
330 #define	BGE_CHIPID_BCM5717_B0		0x05717100
331 #define	BGE_CHIPID_BCM5717_C0		0x05717200
332 #define	BGE_CHIPID_BCM5719_A0		0x05719000
333 #define	BGE_CHIPID_BCM5720_A0		0x05720000
334 #define	BGE_CHIPID_BCM5762_A0		0x05762000
335 #define	BGE_CHIPID_BCM57765_A0		0x57785000
336 #define	BGE_CHIPID_BCM57765_B0		0x57785100
340 #define	BGE_ASICREV_BCM5701		0x00
341 #define	BGE_ASICREV_BCM5703		0x01
342 #define	BGE_ASICREV_BCM5704		0x02
343 #define	BGE_ASICREV_BCM5705		0x03
344 #define	BGE_ASICREV_BCM5750		0x04
345 #define	BGE_ASICREV_BCM5714_A0		0x05
346 #define	BGE_ASICREV_BCM5752		0x06
347 #define	BGE_ASICREV_BCM5700		0x07
348 #define	BGE_ASICREV_BCM5780		0x08
349 #define	BGE_ASICREV_BCM5714		0x09
350 #define	BGE_ASICREV_BCM5755		0x0a
351 #define	BGE_ASICREV_BCM5754		0x0b
352 #define	BGE_ASICREV_BCM5787		0x0b
353 #define	BGE_ASICREV_BCM5906		0x0c
355 #define	BGE_ASICREV_USE_PRODID_REG	0x0f
357 #define	BGE_ASICREV_BCM5717		0x5717
358 #define	BGE_ASICREV_BCM5719		0x5719
359 #define	BGE_ASICREV_BCM5720		0x5720
360 #define	BGE_ASICREV_BCM5761		0x5761
361 #define	BGE_ASICREV_BCM5762		0x5762
362 #define	BGE_ASICREV_BCM5784		0x5784
363 #define	BGE_ASICREV_BCM5785		0x5785
364 #define	BGE_ASICREV_BCM57765		0x57785
365 #define	BGE_ASICREV_BCM57766		0x57766
366 #define	BGE_ASICREV_BCM57780		0x57780
370 #define	BGE_CHIPREV_5700_AX		0x70
371 #define	BGE_CHIPREV_5700_BX		0x71
372 #define	BGE_CHIPREV_5700_CX		0x72
373 #define	BGE_CHIPREV_5701_AX		0x00
374 #define	BGE_CHIPREV_5703_AX		0x10
375 #define	BGE_CHIPREV_5704_AX		0x20
376 #define	BGE_CHIPREV_5704_BX		0x21
377 #define	BGE_CHIPREV_5750_AX		0x40
378 #define	BGE_CHIPREV_5750_BX		0x41
380 #define	BGE_CHIPREV_5717_AX		0x57170
381 #define	BGE_CHIPREV_5717_BX		0x57171
382 #define	BGE_CHIPREV_5761_AX		0x57611
383 #define	BGE_CHIPREV_57765_AX		0x577850
384 #define	BGE_CHIPREV_5784_AX		0x57841
387 #define	BGE_PCIDMARWCTL_MINDMA		0x000000FF
388 #define	BGE_PCIDMARWCTL_DIS_CACHE_ALIGNMENT	0x00000001
389 #define	BGE_PCIDMARWCTL_RDADRR_BNDRY	0x00000700
390 #define	BGE_PCIDMARWCTL_WRADDR_BNDRY	0x00003800
391 #define	BGE_PCIDMARWCTL_ONEDMA_ATONCE	0x0000C000
392 #define	BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL	0x00004000
393 #define	BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL	0x00008000
394 #define	BGE_PCIDMARWCTL_RD_WAT		0x00070000
395 #define	BGE_PCIDMARWCTL_WR_WAT		0x00380000
396 #define	BGE_PCIDMARWCTL_USE_MRM		0x00400000
397 #define	BGE_PCIDMARWCTL_ASRT_ALL_BE	0x00800000
398 #define	BGE_PCIDMARWCTL_DFLT_PCI_RD_CMD	0x0F000000
399 #define	BGE_PCIDMARWCTL_DFLT_PCI_WR_CMD	0xF0000000
406 #define	BGE_PCIDMARWCTL_TAGGED_STATUS_WA	0x00000080
407 #define	BGE_PCIDMARWCTL_CRDRDR_RDMA_MRRS_MSK	0x00000380
409 #define	BGE_PCI_READ_BNDRY_DISABLE	0x00000000
410 #define	BGE_PCI_READ_BNDRY_16BYTES	0x00000100
411 #define	BGE_PCI_READ_BNDRY_32BYTES	0x00000200
412 #define	BGE_PCI_READ_BNDRY_64BYTES	0x00000300
413 #define	BGE_PCI_READ_BNDRY_128BYTES	0x00000400
414 #define	BGE_PCI_READ_BNDRY_256BYTES	0x00000500
415 #define	BGE_PCI_READ_BNDRY_512BYTES	0x00000600
416 #define	BGE_PCI_READ_BNDRY_1024BYTES	0x00000700
418 #define	BGE_PCI_WRITE_BNDRY_DISABLE	0x00000000
419 #define	BGE_PCI_WRITE_BNDRY_16BYTES	0x00000800
420 #define	BGE_PCI_WRITE_BNDRY_32BYTES	0x00001000
421 #define	BGE_PCI_WRITE_BNDRY_64BYTES	0x00001800
422 #define	BGE_PCI_WRITE_BNDRY_128BYTES	0x00002000
423 #define	BGE_PCI_WRITE_BNDRY_256BYTES	0x00002800
424 #define	BGE_PCI_WRITE_BNDRY_512BYTES	0x00003000
425 #define	BGE_PCI_WRITE_BNDRY_1024BYTES	0x00003800
432 #define	BGE_PCISTATE_FORCE_RESET	0x00000001
433 #define	BGE_PCISTATE_INTR_STATE		0x00000002
434 #define	BGE_PCISTATE_PCI_BUSMODE	0x00000004 /* 1 = PCI, 0 = PCI-X */
435 #define	BGE_PCISTATE_PCI_BUSSPEED	0x00000008 /* 1 = 66/133, 0 = 33/66 */
436 #define	BGE_PCISTATE_32BIT_BUS		0x00000010 /* 1 = 32bit, 0 = 64bit */
437 #define	BGE_PCISTATE_ROM_ENABLE		0x00000020
438 #define	BGE_PCISTATE_ROM_RETRY_ENABLE	0x00000040
439 #define	BGE_PCISTATE_FLATVIEW_MODE	0x00000100
440 #define	BGE_PCISTATE_PCI_TGT_RETRY_MAX	0x00000E00
441 #define	BGE_PCISTATE_RETRY_SAME_DMA	0x00002000
442 #define	BGE_PCISTATE_ALLOW_APE_CTLSPC_WR	0x00010000
443 #define	BGE_PCISTATE_ALLOW_APE_SHMEM_WR	0x00020000
444 #define	BGE_PCISTATE_ALLOW_APE_PSPACE_WR	0x00040000
451 #define	BGE_PCICLOCKCTL_DETECTED_SPEED	0x0000000F
452 #define	BGE_PCICLOCKCTL_M66EN		0x00000080
453 #define	BGE_PCICLOCKCTL_LOWPWR_CLKMODE	0x00000200
454 #define	BGE_PCICLOCKCTL_RXCPU_CLK_DIS	0x00000400
455 #define	BGE_PCICLOCKCTL_TXCPU_CLK_DIS	0x00000800
456 #define	BGE_PCICLOCKCTL_ALTCLK		0x00001000
457 #define	BGE_PCICLOCKCTL_ALTCLK_SRC	0x00002000
458 #define	BGE_PCICLOCKCTL_PCIPLL_DISABLE	0x00004000
459 #define	BGE_PCICLOCKCTL_SYSPLL_DISABLE	0x00008000
460 #define	BGE_PCICLOCKCTL_BIST_ENABLE	0x00010000
463 #define	PCIM_CMD_MWIEN			0x0010
466 #define	PCIM_CMD_INTxDIS		0x0400
478 #define	BGE_MBX_IRQ0_HI			0x0200
479 #define	BGE_MBX_IRQ0_LO			0x0204
480 #define	BGE_MBX_IRQ1_HI			0x0208
481 #define	BGE_MBX_IRQ1_LO			0x020C
482 #define	BGE_MBX_IRQ2_HI			0x0210
483 #define	BGE_MBX_IRQ2_LO			0x0214
484 #define	BGE_MBX_IRQ3_HI			0x0218
485 #define	BGE_MBX_IRQ3_LO			0x021C
486 #define	BGE_MBX_GEN0_HI			0x0220
487 #define	BGE_MBX_GEN0_LO			0x0224
488 #define	BGE_MBX_GEN1_HI			0x0228
489 #define	BGE_MBX_GEN1_LO			0x022C
490 #define	BGE_MBX_GEN2_HI			0x0230
491 #define	BGE_MBX_GEN2_LO			0x0234
492 #define	BGE_MBX_GEN3_HI			0x0228
493 #define	BGE_MBX_GEN3_LO			0x022C
494 #define	BGE_MBX_GEN4_HI			0x0240
495 #define	BGE_MBX_GEN4_LO			0x0244
496 #define	BGE_MBX_GEN5_HI			0x0248
497 #define	BGE_MBX_GEN5_LO			0x024C
498 #define	BGE_MBX_GEN6_HI			0x0250
499 #define	BGE_MBX_GEN6_LO			0x0254
500 #define	BGE_MBX_GEN7_HI			0x0258
501 #define	BGE_MBX_GEN7_LO			0x025C
502 #define	BGE_MBX_RELOAD_STATS_HI		0x0260
503 #define	BGE_MBX_RELOAD_STATS_LO		0x0264
504 #define	BGE_MBX_RX_STD_PROD_HI		0x0268
505 #define	BGE_MBX_RX_STD_PROD_LO		0x026C
506 #define	BGE_MBX_RX_JUMBO_PROD_HI	0x0270
507 #define	BGE_MBX_RX_JUMBO_PROD_LO	0x0274
508 #define	BGE_MBX_RX_MINI_PROD_HI		0x0278
509 #define	BGE_MBX_RX_MINI_PROD_LO		0x027C
510 #define	BGE_MBX_RX_CONS0_HI		0x0280
511 #define	BGE_MBX_RX_CONS0_LO		0x0284
512 #define	BGE_MBX_RX_CONS1_HI		0x0288
513 #define	BGE_MBX_RX_CONS1_LO		0x028C
514 #define	BGE_MBX_RX_CONS2_HI		0x0290
515 #define	BGE_MBX_RX_CONS2_LO		0x0294
516 #define	BGE_MBX_RX_CONS3_HI		0x0298
517 #define	BGE_MBX_RX_CONS3_LO		0x029C
518 #define	BGE_MBX_RX_CONS4_HI		0x02A0
519 #define	BGE_MBX_RX_CONS4_LO		0x02A4
520 #define	BGE_MBX_RX_CONS5_HI		0x02A8
521 #define	BGE_MBX_RX_CONS5_LO		0x02AC
522 #define	BGE_MBX_RX_CONS6_HI		0x02B0
523 #define	BGE_MBX_RX_CONS6_LO		0x02B4
524 #define	BGE_MBX_RX_CONS7_HI		0x02B8
525 #define	BGE_MBX_RX_CONS7_LO		0x02BC
526 #define	BGE_MBX_RX_CONS8_HI		0x02C0
527 #define	BGE_MBX_RX_CONS8_LO		0x02C4
528 #define	BGE_MBX_RX_CONS9_HI		0x02C8
529 #define	BGE_MBX_RX_CONS9_LO		0x02CC
530 #define	BGE_MBX_RX_CONS10_HI		0x02D0
531 #define	BGE_MBX_RX_CONS10_LO		0x02D4
532 #define	BGE_MBX_RX_CONS11_HI		0x02D8
533 #define	BGE_MBX_RX_CONS11_LO		0x02DC
534 #define	BGE_MBX_RX_CONS12_HI		0x02E0
535 #define	BGE_MBX_RX_CONS12_LO		0x02E4
536 #define	BGE_MBX_RX_CONS13_HI		0x02E8
537 #define	BGE_MBX_RX_CONS13_LO		0x02EC
538 #define	BGE_MBX_RX_CONS14_HI		0x02F0
539 #define	BGE_MBX_RX_CONS14_LO		0x02F4
540 #define	BGE_MBX_RX_CONS15_HI		0x02F8
541 #define	BGE_MBX_RX_CONS15_LO		0x02FC
542 #define	BGE_MBX_TX_HOST_PROD0_HI	0x0300
543 #define	BGE_MBX_TX_HOST_PROD0_LO	0x0304
544 #define	BGE_MBX_TX_HOST_PROD1_HI	0x0308
545 #define	BGE_MBX_TX_HOST_PROD1_LO	0x030C
546 #define	BGE_MBX_TX_HOST_PROD2_HI	0x0310
547 #define	BGE_MBX_TX_HOST_PROD2_LO	0x0314
548 #define	BGE_MBX_TX_HOST_PROD3_HI	0x0318
549 #define	BGE_MBX_TX_HOST_PROD3_LO	0x031C
550 #define	BGE_MBX_TX_HOST_PROD4_HI	0x0320
551 #define	BGE_MBX_TX_HOST_PROD4_LO	0x0324
552 #define	BGE_MBX_TX_HOST_PROD5_HI	0x0328
553 #define	BGE_MBX_TX_HOST_PROD5_LO	0x032C
554 #define	BGE_MBX_TX_HOST_PROD6_HI	0x0330
555 #define	BGE_MBX_TX_HOST_PROD6_LO	0x0334
556 #define	BGE_MBX_TX_HOST_PROD7_HI	0x0338
557 #define	BGE_MBX_TX_HOST_PROD7_LO	0x033C
558 #define	BGE_MBX_TX_HOST_PROD8_HI	0x0340
559 #define	BGE_MBX_TX_HOST_PROD8_LO	0x0344
560 #define	BGE_MBX_TX_HOST_PROD9_HI	0x0348
561 #define	BGE_MBX_TX_HOST_PROD9_LO	0x034C
562 #define	BGE_MBX_TX_HOST_PROD10_HI	0x0350
563 #define	BGE_MBX_TX_HOST_PROD10_LO	0x0354
564 #define	BGE_MBX_TX_HOST_PROD11_HI	0x0358
565 #define	BGE_MBX_TX_HOST_PROD11_LO	0x035C
566 #define	BGE_MBX_TX_HOST_PROD12_HI	0x0360
567 #define	BGE_MBX_TX_HOST_PROD12_LO	0x0364
568 #define	BGE_MBX_TX_HOST_PROD13_HI	0x0368
569 #define	BGE_MBX_TX_HOST_PROD13_LO	0x036C
570 #define	BGE_MBX_TX_HOST_PROD14_HI	0x0370
571 #define	BGE_MBX_TX_HOST_PROD14_LO	0x0374
572 #define	BGE_MBX_TX_HOST_PROD15_HI	0x0378
573 #define	BGE_MBX_TX_HOST_PROD15_LO	0x037C
574 #define	BGE_MBX_TX_NIC_PROD0_HI		0x0380
575 #define	BGE_MBX_TX_NIC_PROD0_LO		0x0384
576 #define	BGE_MBX_TX_NIC_PROD1_HI		0x0388
577 #define	BGE_MBX_TX_NIC_PROD1_LO		0x038C
578 #define	BGE_MBX_TX_NIC_PROD2_HI		0x0390
579 #define	BGE_MBX_TX_NIC_PROD2_LO		0x0394
580 #define	BGE_MBX_TX_NIC_PROD3_HI		0x0398
581 #define	BGE_MBX_TX_NIC_PROD3_LO		0x039C
582 #define	BGE_MBX_TX_NIC_PROD4_HI		0x03A0
583 #define	BGE_MBX_TX_NIC_PROD4_LO		0x03A4
584 #define	BGE_MBX_TX_NIC_PROD5_HI		0x03A8
585 #define	BGE_MBX_TX_NIC_PROD5_LO		0x03AC
586 #define	BGE_MBX_TX_NIC_PROD6_HI		0x03B0
587 #define	BGE_MBX_TX_NIC_PROD6_LO		0x03B4
588 #define	BGE_MBX_TX_NIC_PROD7_HI		0x03B8
589 #define	BGE_MBX_TX_NIC_PROD7_LO		0x03BC
590 #define	BGE_MBX_TX_NIC_PROD8_HI		0x03C0
591 #define	BGE_MBX_TX_NIC_PROD8_LO		0x03C4
592 #define	BGE_MBX_TX_NIC_PROD9_HI		0x03C8
593 #define	BGE_MBX_TX_NIC_PROD9_LO		0x03CC
594 #define	BGE_MBX_TX_NIC_PROD10_HI	0x03D0
595 #define	BGE_MBX_TX_NIC_PROD10_LO	0x03D4
596 #define	BGE_MBX_TX_NIC_PROD11_HI	0x03D8
597 #define	BGE_MBX_TX_NIC_PROD11_LO	0x03DC
598 #define	BGE_MBX_TX_NIC_PROD12_HI	0x03E0
599 #define	BGE_MBX_TX_NIC_PROD12_LO	0x03E4
600 #define	BGE_MBX_TX_NIC_PROD13_HI	0x03E8
601 #define	BGE_MBX_TX_NIC_PROD13_LO	0x03EC
602 #define	BGE_MBX_TX_NIC_PROD14_HI	0x03F0
603 #define	BGE_MBX_TX_NIC_PROD14_LO	0x03F4
604 #define	BGE_MBX_TX_NIC_PROD15_HI	0x03F8
605 #define	BGE_MBX_TX_NIC_PROD15_LO	0x03FC
613 #define	BGE_MAC_MODE			0x0400
614 #define	BGE_MAC_STS			0x0404
615 #define	BGE_MAC_EVT_ENB			0x0408
616 #define	BGE_MAC_LED_CTL			0x040C
617 #define	BGE_MAC_ADDR1_LO		0x0410
618 #define	BGE_MAC_ADDR1_HI		0x0414
619 #define	BGE_MAC_ADDR2_LO		0x0418
620 #define	BGE_MAC_ADDR2_HI		0x041C
621 #define	BGE_MAC_ADDR3_LO		0x0420
622 #define	BGE_MAC_ADDR3_HI		0x0424
623 #define	BGE_MAC_ADDR4_LO		0x0428
624 #define	BGE_MAC_ADDR4_HI		0x042C
625 #define	BGE_WOL_PATPTR			0x0430
626 #define	BGE_WOL_PATCFG			0x0434
627 #define	BGE_TX_RANDOM_BACKOFF		0x0438
628 #define	BGE_RX_MTU			0x043C
629 #define	BGE_GBIT_PCS_TEST		0x0440
630 #define	BGE_TX_TBI_AUTONEG		0x0444
631 #define	BGE_RX_TBI_AUTONEG		0x0448
632 #define	BGE_MI_COMM			0x044C
633 #define	BGE_MI_STS			0x0450
634 #define	BGE_MI_MODE			0x0454
635 #define	BGE_AUTOPOLL_STS		0x0458
636 #define	BGE_TX_MODE			0x045C
637 #define	BGE_TX_STS			0x0460
638 #define	BGE_TX_LENGTHS			0x0464
639 #define	BGE_RX_MODE			0x0468
640 #define	BGE_RX_STS			0x046C
641 #define	BGE_MAR0			0x0470
642 #define	BGE_MAR1			0x0474
643 #define	BGE_MAR2			0x0478
644 #define	BGE_MAR3			0x047C
645 #define	BGE_RX_BD_RULES_CTL0		0x0480
646 #define	BGE_RX_BD_RULES_MASKVAL0	0x0484
647 #define	BGE_RX_BD_RULES_CTL1		0x0488
648 #define	BGE_RX_BD_RULES_MASKVAL1	0x048C
649 #define	BGE_RX_BD_RULES_CTL2		0x0490
650 #define	BGE_RX_BD_RULES_MASKVAL2	0x0494
651 #define	BGE_RX_BD_RULES_CTL3		0x0498
652 #define	BGE_RX_BD_RULES_MASKVAL3	0x049C
653 #define	BGE_RX_BD_RULES_CTL4		0x04A0
654 #define	BGE_RX_BD_RULES_MASKVAL4	0x04A4
655 #define	BGE_RX_BD_RULES_CTL5		0x04A8
656 #define	BGE_RX_BD_RULES_MASKVAL5	0x04AC
657 #define	BGE_RX_BD_RULES_CTL6		0x04B0
658 #define	BGE_RX_BD_RULES_MASKVAL6	0x04B4
659 #define	BGE_RX_BD_RULES_CTL7		0x04B8
660 #define	BGE_RX_BD_RULES_MASKVAL7	0x04BC
661 #define	BGE_RX_BD_RULES_CTL8		0x04C0
662 #define	BGE_RX_BD_RULES_MASKVAL8	0x04C4
663 #define	BGE_RX_BD_RULES_CTL9		0x04C8
664 #define	BGE_RX_BD_RULES_MASKVAL9	0x04CC
665 #define	BGE_RX_BD_RULES_CTL10		0x04D0
666 #define	BGE_RX_BD_RULES_MASKVAL10	0x04D4
667 #define	BGE_RX_BD_RULES_CTL11		0x04D8
668 #define	BGE_RX_BD_RULES_MASKVAL11	0x04DC
669 #define	BGE_RX_BD_RULES_CTL12		0x04E0
670 #define	BGE_RX_BD_RULES_MASKVAL12	0x04E4
671 #define	BGE_RX_BD_RULES_CTL13		0x04E8
672 #define	BGE_RX_BD_RULES_MASKVAL13	0x04EC
673 #define	BGE_RX_BD_RULES_CTL14		0x04F0
674 #define	BGE_RX_BD_RULES_MASKVAL14	0x04F4
675 #define	BGE_RX_BD_RULES_CTL15		0x04F8
676 #define	BGE_RX_BD_RULES_MASKVAL15	0x04FC
677 #define	BGE_RX_RULES_CFG		0x0500
678 #define	BGE_MAX_RX_FRAME_LOWAT		0x0504
679 #define	BGE_SERDES_CFG			0x0590
680 #define	BGE_SERDES_STS			0x0594
681 #define	BGE_SGDIG_CFG			0x05B0
682 #define	BGE_SGDIG_STS			0x05B4
683 #define	BGE_TX_MAC_STATS_OCTETS		0x0800
684 #define	BGE_TX_MAC_STATS_RESERVE_0	0x0804
685 #define	BGE_TX_MAC_STATS_COLLS		0x0808
686 #define	BGE_TX_MAC_STATS_XON_SENT	0x080C
687 #define	BGE_TX_MAC_STATS_XOFF_SENT	0x0810
688 #define	BGE_TX_MAC_STATS_RESERVE_1	0x0814
689 #define	BGE_TX_MAC_STATS_ERRORS		0x0818
690 #define	BGE_TX_MAC_STATS_SINGLE_COLL	0x081C
691 #define	BGE_TX_MAC_STATS_MULTI_COLL	0x0820
692 #define	BGE_TX_MAC_STATS_DEFERRED	0x0824
693 #define	BGE_TX_MAC_STATS_RESERVE_2	0x0828
694 #define	BGE_TX_MAC_STATS_EXCESS_COLL	0x082C
695 #define	BGE_TX_MAC_STATS_LATE_COLL	0x0830
696 #define	BGE_TX_MAC_STATS_RESERVE_3	0x0834
697 #define	BGE_TX_MAC_STATS_RESERVE_4	0x0838
698 #define	BGE_TX_MAC_STATS_RESERVE_5	0x083C
699 #define	BGE_TX_MAC_STATS_RESERVE_6	0x0840
700 #define	BGE_TX_MAC_STATS_RESERVE_7	0x0844
701 #define	BGE_TX_MAC_STATS_RESERVE_8	0x0848
702 #define	BGE_TX_MAC_STATS_RESERVE_9	0x084C
703 #define	BGE_TX_MAC_STATS_RESERVE_10	0x0850
704 #define	BGE_TX_MAC_STATS_RESERVE_11	0x0854
705 #define	BGE_TX_MAC_STATS_RESERVE_12	0x0858
706 #define	BGE_TX_MAC_STATS_RESERVE_13	0x085C
707 #define	BGE_TX_MAC_STATS_RESERVE_14	0x0860
708 #define	BGE_TX_MAC_STATS_RESERVE_15	0x0864
709 #define	BGE_TX_MAC_STATS_RESERVE_16	0x0868
710 #define	BGE_TX_MAC_STATS_UCAST		0x086C
711 #define	BGE_TX_MAC_STATS_MCAST		0x0870
712 #define	BGE_TX_MAC_STATS_BCAST		0x0874
713 #define	BGE_TX_MAC_STATS_RESERVE_17	0x0878
714 #define	BGE_TX_MAC_STATS_RESERVE_18	0x087C
715 #define	BGE_RX_MAC_STATS_OCTESTS	0x0880
716 #define	BGE_RX_MAC_STATS_RESERVE_0	0x0884
717 #define	BGE_RX_MAC_STATS_FRAGMENTS	0x0888
718 #define	BGE_RX_MAC_STATS_UCAST		0x088C
719 #define	BGE_RX_MAC_STATS_MCAST		0x0890
720 #define	BGE_RX_MAC_STATS_BCAST		0x0894
721 #define	BGE_RX_MAC_STATS_FCS_ERRORS	0x0898
722 #define	BGE_RX_MAC_STATS_ALGIN_ERRORS	0x089C
723 #define	BGE_RX_MAC_STATS_XON_RCVD	0x08A0
724 #define	BGE_RX_MAC_STATS_XOFF_RCVD	0x08A4
725 #define	BGE_RX_MAC_STATS_CTRL_RCVD	0x08A8
726 #define	BGE_RX_MAC_STATS_XOFF_ENTERED	0x08AC
727 #define	BGE_RX_MAC_STATS_FRAME_TOO_LONG	0x08B0
728 #define	BGE_RX_MAC_STATS_JABBERS	0x08B4
729 #define	BGE_RX_MAC_STATS_UNDERSIZE	0x08B8
732 #define	BGE_MACMODE_RESET		0x00000001
733 #define	BGE_MACMODE_HALF_DUPLEX		0x00000002
734 #define	BGE_MACMODE_PORTMODE		0x0000000C
735 #define	BGE_MACMODE_LOOPBACK		0x00000010
736 #define	BGE_MACMODE_RX_TAGGEDPKT	0x00000080
737 #define	BGE_MACMODE_TX_BURST_ENB	0x00000100
738 #define	BGE_MACMODE_MAX_DEFER		0x00000200
739 #define	BGE_MACMODE_LINK_POLARITY	0x00000400
740 #define	BGE_MACMODE_RX_STATS_ENB	0x00000800
741 #define	BGE_MACMODE_RX_STATS_CLEAR	0x00001000
742 #define	BGE_MACMODE_RX_STATS_FLUSH	0x00002000
743 #define	BGE_MACMODE_TX_STATS_ENB	0x00004000
744 #define	BGE_MACMODE_TX_STATS_CLEAR	0x00008000
745 #define	BGE_MACMODE_TX_STATS_FLUSH	0x00010000
746 #define	BGE_MACMODE_TBI_SEND_CFGS	0x00020000
747 #define	BGE_MACMODE_MAGIC_PKT_ENB	0x00040000
748 #define	BGE_MACMODE_ACPI_PWRON_ENB	0x00080000
749 #define	BGE_MACMODE_MIP_ENB		0x00100000
750 #define	BGE_MACMODE_TXDMA_ENB		0x00200000
751 #define	BGE_MACMODE_RXDMA_ENB		0x00400000
752 #define	BGE_MACMODE_FRMHDR_DMA_ENB	0x00800000
753 #define	BGE_MACMODE_APE_RX_EN		0x08000000
754 #define	BGE_MACMODE_APE_TX_EN		0x10000000
756 #define	BGE_PORTMODE_NONE		0x00000000
757 #define	BGE_PORTMODE_MII		0x00000004
758 #define	BGE_PORTMODE_GMII		0x00000008
759 #define	BGE_PORTMODE_TBI		0x0000000C
762 #define	BGE_MACSTAT_TBI_PCS_SYNCHED	0x00000001
763 #define	BGE_MACSTAT_TBI_SIGNAL_DETECT	0x00000002
764 #define	BGE_MACSTAT_RX_CFG		0x00000004
765 #define	BGE_MACSTAT_CFG_CHANGED		0x00000008
766 #define	BGE_MACSTAT_SYNC_CHANGED	0x00000010
767 #define	BGE_MACSTAT_PORT_DECODE_ERROR	0x00000400
768 #define	BGE_MACSTAT_LINK_CHANGED	0x00001000
769 #define	BGE_MACSTAT_MI_COMPLETE		0x00400000
770 #define	BGE_MACSTAT_MI_INTERRUPT	0x00800000
771 #define	BGE_MACSTAT_AUTOPOLL_ERROR	0x01000000
772 #define	BGE_MACSTAT_ODI_ERROR		0x02000000
773 #define	BGE_MACSTAT_RXSTAT_OFLOW	0x04000000
774 #define	BGE_MACSTAT_TXSTAT_OFLOW	0x08000000
777 #define	BGE_EVTENB_PORT_DECODE_ERROR	0x00000400
778 #define	BGE_EVTENB_LINK_CHANGED		0x00001000
779 #define	BGE_EVTENB_MI_COMPLETE		0x00400000
780 #define	BGE_EVTENB_MI_INTERRUPT		0x00800000
781 #define	BGE_EVTENB_AUTOPOLL_ERROR	0x01000000
782 #define	BGE_EVTENB_ODI_ERROR		0x02000000
783 #define	BGE_EVTENB_RXSTAT_OFLOW		0x04000000
784 #define	BGE_EVTENB_TXSTAT_OFLOW		0x08000000
787 #define	BGE_LEDCTL_LINKLED_OVERRIDE	0x00000001
788 #define	BGE_LEDCTL_1000MBPS_LED		0x00000002
789 #define	BGE_LEDCTL_100MBPS_LED		0x00000004
790 #define	BGE_LEDCTL_10MBPS_LED		0x00000008
791 #define	BGE_LEDCTL_TRAFLED_OVERRIDE	0x00000010
792 #define	BGE_LEDCTL_TRAFLED_BLINK	0x00000020
793 #define	BGE_LEDCTL_TRAFLED_BLINK_2	0x00000040
794 #define	BGE_LEDCTL_1000MBPS_STS		0x00000080
795 #define	BGE_LEDCTL_100MBPS_STS		0x00000100
796 #define	BGE_LEDCTL_10MBPS_STS		0x00000200
797 #define	BGE_LEDCTL_TRAFLED_STS		0x00000400
798 #define	BGE_LEDCTL_BLINKPERIOD		0x7FF80000
799 #define	BGE_LEDCTL_BLINKPERIOD_OVERRIDE	0x80000000
802 #define	BGE_TX_BACKOFF_SEED_MASK	0x3FF
805 #define	BGE_AUTOPOLLSTS_ERROR		0x00000001
808 #define	BGE_TXMODE_RESET		0x00000001
809 #define	BGE_TXMODE_ENABLE		0x00000002
810 #define	BGE_TXMODE_FLOWCTL_ENABLE	0x00000010
811 #define	BGE_TXMODE_BIGBACKOFF_ENABLE	0x00000020
812 #define	BGE_TXMODE_LONGPAUSE_ENABLE	0x00000040
813 #define	BGE_TXMODE_MBUF_LOCKUP_FIX	0x00000100
814 #define	BGE_TXMODE_JMB_FRM_LEN		0x00400000
815 #define	BGE_TXMODE_CNT_DN_MODE		0x00800000
818 #define	BGE_TXSTAT_RX_XOFFED		0x00000001
819 #define	BGE_TXSTAT_SENT_XOFF		0x00000002
820 #define	BGE_TXSTAT_SENT_XON		0x00000004
821 #define	BGE_TXSTAT_LINK_UP		0x00000008
822 #define	BGE_TXSTAT_ODI_UFLOW		0x00000010
823 #define	BGE_TXSTAT_ODI_OFLOW		0x00000020
826 #define	BGE_TXLEN_SLOTTIME		0x000000FF
827 #define	BGE_TXLEN_IPG			0x00000F00
828 #define	BGE_TXLEN_CRS			0x00003000
829 #define	BGE_TXLEN_JMB_FRM_LEN_MSK	0x00FF0000
830 #define	BGE_TXLEN_CNT_DN_VAL_MSK	0xFF000000
833 #define	BGE_RXMODE_RESET		0x00000001
834 #define	BGE_RXMODE_ENABLE		0x00000002
835 #define	BGE_RXMODE_FLOWCTL_ENABLE	0x00000004
836 #define	BGE_RXMODE_RX_GIANTS		0x00000020
837 #define	BGE_RXMODE_RX_RUNTS		0x00000040
838 #define	BGE_RXMODE_8022_LENCHECK	0x00000080
839 #define	BGE_RXMODE_RX_PROMISC		0x00000100
840 #define	BGE_RXMODE_RX_NO_CRC_CHECK	0x00000200
841 #define	BGE_RXMODE_RX_KEEP_VLAN_DIAG	0x00000400
842 #define	BGE_RXMODE_IPV6_ENABLE		0x01000000
843 #define	BGE_RXMODE_IPV4_FRAG_FIX	0x02000000
846 #define	BGE_RXSTAT_REMOTE_XOFFED	0x00000001
847 #define	BGE_RXSTAT_RCVD_XOFF		0x00000002
848 #define	BGE_RXSTAT_RCVD_XON		0x00000004
851 #define	BGE_RXRULECTL_OFFSET		0x000000FF
852 #define	BGE_RXRULECTL_CLASS		0x00001F00
853 #define	BGE_RXRULECTL_HDRTYPE		0x0000E000
854 #define	BGE_RXRULECTL_COMPARE_OP	0x00030000
855 #define	BGE_RXRULECTL_MAP		0x01000000
856 #define	BGE_RXRULECTL_DISCARD		0x02000000
857 #define	BGE_RXRULECTL_MASK		0x04000000
858 #define	BGE_RXRULECTL_ACTIVATE_PROC3	0x08000000
859 #define	BGE_RXRULECTL_ACTIVATE_PROC2	0x10000000
860 #define	BGE_RXRULECTL_ACTIVATE_PROC1	0x20000000
861 #define	BGE_RXRULECTL_ANDWITHNEXT	0x40000000
864 #define	BGE_RXRULEMASK_VALUE		0x0000FFFF
865 #define	BGE_RXRULEMASK_MASKVAL		0xFFFF0000
868 #define	BGE_SERDESCFG_RXR		0x00000007 /* phase interpolator */
869 #define	BGE_SERDESCFG_RXG		0x00000018 /* rx gain setting */
870 #define	BGE_SERDESCFG_RXEDGESEL		0x00000040 /* rising/falling egde */
871 #define	BGE_SERDESCFG_TX_BIAS		0x00000380 /* TXDAC bias setting */
872 #define	BGE_SERDESCFG_IBMAX		0x00000400 /* bias current +25% */
873 #define	BGE_SERDESCFG_IBMIN		0x00000800 /* bias current -25% */
874 #define	BGE_SERDESCFG_TXMODE		0x00001000
875 #define	BGE_SERDESCFG_TXEDGESEL		0x00002000 /* rising/falling edge */
876 #define	BGE_SERDESCFG_MODE		0x00004000 /* TXCP/TXCN disabled */
877 #define	BGE_SERDESCFG_PLLTEST		0x00008000 /* PLL test mode */
878 #define	BGE_SERDESCFG_CDET		0x00010000 /* comma detect enable */
879 #define	BGE_SERDESCFG_TBILOOP		0x00020000 /* local loopback */
880 #define	BGE_SERDESCFG_REMLOOP		0x00040000 /* remote loopback */
881 #define	BGE_SERDESCFG_INVPHASE		0x00080000 /* Reverse 125Mhz clock */
882 #define	BGE_SERDESCFG_12REGCTL		0x00300000 /* 1.2v regulator ctl */
883 #define	BGE_SERDESCFG_REGCTL		0x00C00000 /* regulator ctl (2.5v) */
886 #define	BGE_SERDESSTS_RXSTAT		0x0000000F /* receive status bits */
887 #define	BGE_SERDESSTS_CDET		0x00000010 /* comma code detected */
890 #define	BGE_SGDIGCFG_PAUSE_CAP		0x00000800
891 #define	BGE_SGDIGCFG_ASYM_PAUSE		0x00001000
892 #define	BGE_SGDIGCFG_SEND		0x40000000
893 #define	BGE_SGDIGCFG_AUTO		0x80000000
896 #define	BGE_SGDIGSTS_DONE		0x00000002
897 #define	BGE_SGDIGSTS_IS_SERDES		0x00000100
898 #define	BGE_SGDIGSTS_PAUSE_CAP		0x00080000
899 #define	BGE_SGDIGSTS_ASYM_PAUSE		0x00100000
902 #define	BGE_MICOMM_DATA			0x0000FFFF
903 #define	BGE_MICOMM_REG			0x001F0000
904 #define	BGE_MICOMM_PHY			0x03E00000
905 #define	BGE_MICOMM_CMD			0x0C000000
906 #define	BGE_MICOMM_READFAIL		0x10000000
907 #define	BGE_MICOMM_BUSY			0x20000000
909 #define	BGE_MIREG(x)	((x & 0x1F) << 16)
910 #define	BGE_MIPHY(x)	((x & 0x1F) << 21)
911 #define	BGE_MICMD_WRITE			0x04000000
912 #define	BGE_MICMD_READ			0x08000000
915 #define	BGE_MISTS_LINK			0x00000001
916 #define	BGE_MISTS_10MBPS		0x00000002
918 #define	BGE_MIMODE_CLK_10MHZ		0x00000001
919 #define	BGE_MIMODE_SHORTPREAMBLE	0x00000002
920 #define	BGE_MIMODE_AUTOPOLL		0x00000010
921 #define	BGE_MIMODE_CLKCNT		0x001F0000
922 #define	BGE_MIMODE_500KHZ_CONST		0x00008000
923 #define	BGE_MIMODE_BASE			0x000C0000
928 #define	BGE_SDI_MODE			0x0C00
929 #define	BGE_SDI_STATUS			0x0C04
930 #define	BGE_SDI_STATS_CTL		0x0C08
931 #define	BGE_SDI_STATS_ENABLE_MASK	0x0C0C
932 #define	BGE_SDI_STATS_INCREMENT_MASK	0x0C10
933 #define	BGE_ISO_PKT_TX			0x0C20
934 #define	BGE_LOCSTATS_COS0		0x0C80
935 #define	BGE_LOCSTATS_COS1		0x0C84
936 #define	BGE_LOCSTATS_COS2		0x0C88
937 #define	BGE_LOCSTATS_COS3		0x0C8C
938 #define	BGE_LOCSTATS_COS4		0x0C90
939 #define	BGE_LOCSTATS_COS5		0x0C84
940 #define	BGE_LOCSTATS_COS6		0x0C98
941 #define	BGE_LOCSTATS_COS7		0x0C9C
942 #define	BGE_LOCSTATS_COS8		0x0CA0
943 #define	BGE_LOCSTATS_COS9		0x0CA4
944 #define	BGE_LOCSTATS_COS10		0x0CA8
945 #define	BGE_LOCSTATS_COS11		0x0CAC
946 #define	BGE_LOCSTATS_COS12		0x0CB0
947 #define	BGE_LOCSTATS_COS13		0x0CB4
948 #define	BGE_LOCSTATS_COS14		0x0CB8
949 #define	BGE_LOCSTATS_COS15		0x0CBC
950 #define	BGE_LOCSTATS_DMA_RQ_FULL	0x0CC0
951 #define	BGE_LOCSTATS_DMA_HIPRIO_RQ_FULL	0x0CC4
952 #define	BGE_LOCSTATS_SDC_QUEUE_FULL	0x0CC8
953 #define	BGE_LOCSTATS_NIC_SENDPROD_SET	0x0CCC
954 #define	BGE_LOCSTATS_STATS_UPDATED	0x0CD0
955 #define	BGE_LOCSTATS_IRQS		0x0CD4
956 #define	BGE_LOCSTATS_AVOIDED_IRQS	0x0CD8
957 #define	BGE_LOCSTATS_TX_THRESH_HIT	0x0CDC
960 #define	BGE_SDIMODE_RESET		0x00000001
961 #define	BGE_SDIMODE_ENABLE		0x00000002
962 #define	BGE_SDIMODE_STATS_OFLOW_ATTN	0x00000004
963 #define	BGE_SDIMODE_HW_LSO_PRE_DMA	0x00000008
966 #define	BGE_SDISTAT_STATS_OFLOW_ATTN	0x00000004
969 #define	BGE_SDISTATSCTL_ENABLE		0x00000001
970 #define	BGE_SDISTATSCTL_FASTER		0x00000002
971 #define	BGE_SDISTATSCTL_CLEAR		0x00000004
972 #define	BGE_SDISTATSCTL_FORCEFLUSH	0x00000008
973 #define	BGE_SDISTATSCTL_FORCEZERO	0x00000010
978 #define	BGE_SDC_MODE			0x1000
979 #define	BGE_SDC_STATUS			0x1004
982 #define	BGE_SDCMODE_RESET		0x00000001
983 #define	BGE_SDCMODE_ENABLE		0x00000002
984 #define	BGE_SDCMODE_ATTN		0x00000004
985 #define	BGE_SDCMODE_CDELAY		0x00000010
988 #define	BGE_SDCSTAT_ATTN		0x00000004
993 #define	BGE_SRS_MODE			0x1400
994 #define	BGE_SRS_STATUS			0x1404
995 #define	BGE_SRS_HWDIAG			0x1408
996 #define	BGE_SRS_LOC_NIC_CONS0		0x1440
997 #define	BGE_SRS_LOC_NIC_CONS1		0x1444
998 #define	BGE_SRS_LOC_NIC_CONS2		0x1448
999 #define	BGE_SRS_LOC_NIC_CONS3		0x144C
1000 #define	BGE_SRS_LOC_NIC_CONS4		0x1450
1001 #define	BGE_SRS_LOC_NIC_CONS5		0x1454
1002 #define	BGE_SRS_LOC_NIC_CONS6		0x1458
1003 #define	BGE_SRS_LOC_NIC_CONS7		0x145C
1004 #define	BGE_SRS_LOC_NIC_CONS8		0x1460
1005 #define	BGE_SRS_LOC_NIC_CONS9		0x1464
1006 #define	BGE_SRS_LOC_NIC_CONS10		0x1468
1007 #define	BGE_SRS_LOC_NIC_CONS11		0x146C
1008 #define	BGE_SRS_LOC_NIC_CONS12		0x1470
1009 #define	BGE_SRS_LOC_NIC_CONS13		0x1474
1010 #define	BGE_SRS_LOC_NIC_CONS14		0x1478
1011 #define	BGE_SRS_LOC_NIC_CONS15		0x147C
1014 #define	BGE_SRSMODE_RESET		0x00000001
1015 #define	BGE_SRSMODE_ENABLE		0x00000002
1016 #define	BGE_SRSMODE_ATTN		0x00000004
1019 #define	BGE_SRSSTAT_ERROR		0x00000004
1022 #define	BGE_SRSHWDIAG_STATE		0x0000000F
1023 #define	BGE_SRSHWDIAG_CURRINGNUM	0x000000F0
1024 #define	BGE_SRSHWDIAG_STAGEDRINGNUM	0x00000F00
1025 #define	BGE_SRSHWDIAG_RINGNUM_IN_MBX	0x0000F000
1030 #define	BGE_SBDI_MODE			0x1800
1031 #define	BGE_SBDI_STATUS			0x1804
1032 #define	BGE_SBDI_LOC_NIC_PROD0		0x1808
1033 #define	BGE_SBDI_LOC_NIC_PROD1		0x180C
1034 #define	BGE_SBDI_LOC_NIC_PROD2		0x1810
1035 #define	BGE_SBDI_LOC_NIC_PROD3		0x1814
1036 #define	BGE_SBDI_LOC_NIC_PROD4		0x1818
1037 #define	BGE_SBDI_LOC_NIC_PROD5		0x181C
1038 #define	BGE_SBDI_LOC_NIC_PROD6		0x1820
1039 #define	BGE_SBDI_LOC_NIC_PROD7		0x1824
1040 #define	BGE_SBDI_LOC_NIC_PROD8		0x1828
1041 #define	BGE_SBDI_LOC_NIC_PROD9		0x182C
1042 #define	BGE_SBDI_LOC_NIC_PROD10		0x1830
1043 #define	BGE_SBDI_LOC_NIC_PROD11		0x1834
1044 #define	BGE_SBDI_LOC_NIC_PROD12		0x1838
1045 #define	BGE_SBDI_LOC_NIC_PROD13		0x183C
1046 #define	BGE_SBDI_LOC_NIC_PROD14		0x1840
1047 #define	BGE_SBDI_LOC_NIC_PROD15		0x1844
1050 #define	BGE_SBDIMODE_RESET		0x00000001
1051 #define	BGE_SBDIMODE_ENABLE		0x00000002
1052 #define	BGE_SBDIMODE_ATTN		0x00000004
1055 #define	BGE_SBDISTAT_ERROR		0x00000004
1060 #define	BGE_SBDC_MODE			0x1C00
1061 #define	BGE_SBDC_STATUS			0x1C04
1064 #define	BGE_SBDCMODE_RESET		0x00000001
1065 #define	BGE_SBDCMODE_ENABLE		0x00000002
1066 #define	BGE_SBDCMODE_ATTN		0x00000004
1069 #define	BGE_SBDCSTAT_ATTN		0x00000004
1074 #define	BGE_RXLP_MODE			0x2000
1075 #define	BGE_RXLP_STATUS			0x2004
1076 #define	BGE_RXLP_SEL_LIST_LOCK		0x2008
1077 #define	BGE_RXLP_SEL_NON_EMPTY_BITS	0x200C
1078 #define	BGE_RXLP_CFG			0x2010
1079 #define	BGE_RXLP_STATS_CTL		0x2014
1080 #define	BGE_RXLP_STATS_ENABLE_MASK	0x2018
1081 #define	BGE_RXLP_STATS_INCREMENT_MASK	0x201C
1082 #define	BGE_RXLP_HEAD0			0x2100
1083 #define	BGE_RXLP_TAIL0			0x2104
1084 #define	BGE_RXLP_COUNT0			0x2108
1085 #define	BGE_RXLP_HEAD1			0x2110
1086 #define	BGE_RXLP_TAIL1			0x2114
1087 #define	BGE_RXLP_COUNT1			0x2118
1088 #define	BGE_RXLP_HEAD2			0x2120
1089 #define	BGE_RXLP_TAIL2			0x2124
1090 #define	BGE_RXLP_COUNT2			0x2128
1091 #define	BGE_RXLP_HEAD3			0x2130
1092 #define	BGE_RXLP_TAIL3			0x2134
1093 #define	BGE_RXLP_COUNT3			0x2138
1094 #define	BGE_RXLP_HEAD4			0x2140
1095 #define	BGE_RXLP_TAIL4			0x2144
1096 #define	BGE_RXLP_COUNT4			0x2148
1097 #define	BGE_RXLP_HEAD5			0x2150
1098 #define	BGE_RXLP_TAIL5			0x2154
1099 #define	BGE_RXLP_COUNT5			0x2158
1100 #define	BGE_RXLP_HEAD6			0x2160
1101 #define	BGE_RXLP_TAIL6			0x2164
1102 #define	BGE_RXLP_COUNT6			0x2168
1103 #define	BGE_RXLP_HEAD7			0x2170
1104 #define	BGE_RXLP_TAIL7			0x2174
1105 #define	BGE_RXLP_COUNT7			0x2178
1106 #define	BGE_RXLP_HEAD8			0x2180
1107 #define	BGE_RXLP_TAIL8			0x2184
1108 #define	BGE_RXLP_COUNT8			0x2188
1109 #define	BGE_RXLP_HEAD9			0x2190
1110 #define	BGE_RXLP_TAIL9			0x2194
1111 #define	BGE_RXLP_COUNT9			0x2198
1112 #define	BGE_RXLP_HEAD10			0x21A0
1113 #define	BGE_RXLP_TAIL10			0x21A4
1114 #define	BGE_RXLP_COUNT10		0x21A8
1115 #define	BGE_RXLP_HEAD11			0x21B0
1116 #define	BGE_RXLP_TAIL11			0x21B4
1117 #define	BGE_RXLP_COUNT11		0x21B8
1118 #define	BGE_RXLP_HEAD12			0x21C0
1119 #define	BGE_RXLP_TAIL12			0x21C4
1120 #define	BGE_RXLP_COUNT12		0x21C8
1121 #define	BGE_RXLP_HEAD13			0x21D0
1122 #define	BGE_RXLP_TAIL13			0x21D4
1123 #define	BGE_RXLP_COUNT13		0x21D8
1124 #define	BGE_RXLP_HEAD14			0x21E0
1125 #define	BGE_RXLP_TAIL14			0x21E4
1126 #define	BGE_RXLP_COUNT14		0x21E8
1127 #define	BGE_RXLP_HEAD15			0x21F0
1128 #define	BGE_RXLP_TAIL15			0x21F4
1129 #define	BGE_RXLP_COUNT15		0x21F8
1130 #define	BGE_RXLP_LOCSTAT_COS0		0x2200
1131 #define	BGE_RXLP_LOCSTAT_COS1		0x2204
1132 #define	BGE_RXLP_LOCSTAT_COS2		0x2208
1133 #define	BGE_RXLP_LOCSTAT_COS3		0x220C
1134 #define	BGE_RXLP_LOCSTAT_COS4		0x2210
1135 #define	BGE_RXLP_LOCSTAT_COS5		0x2214
1136 #define	BGE_RXLP_LOCSTAT_COS6		0x2218
1137 #define	BGE_RXLP_LOCSTAT_COS7		0x221C
1138 #define	BGE_RXLP_LOCSTAT_COS8		0x2220
1139 #define	BGE_RXLP_LOCSTAT_COS9		0x2224
1140 #define	BGE_RXLP_LOCSTAT_COS10		0x2228
1141 #define	BGE_RXLP_LOCSTAT_COS11		0x222C
1142 #define	BGE_RXLP_LOCSTAT_COS12		0x2230
1143 #define	BGE_RXLP_LOCSTAT_COS13		0x2234
1144 #define	BGE_RXLP_LOCSTAT_COS14		0x2238
1145 #define	BGE_RXLP_LOCSTAT_COS15		0x223C
1146 #define	BGE_RXLP_LOCSTAT_FILTDROP	0x2240
1147 #define	BGE_RXLP_LOCSTAT_DMA_WRQ_FULL	0x2244
1148 #define	BGE_RXLP_LOCSTAT_DMA_HPWRQ_FULL	0x2248
1149 #define	BGE_RXLP_LOCSTAT_OUT_OF_BDS	0x224C
1150 #define	BGE_RXLP_LOCSTAT_IFIN_DROPS	0x2250
1151 #define	BGE_RXLP_LOCSTAT_IFIN_ERRORS	0x2254
1152 #define	BGE_RXLP_LOCSTAT_RXTHRESH_HIT	0x2258
1155 #define	BGE_RXLPMODE_RESET		0x00000001
1156 #define	BGE_RXLPMODE_ENABLE		0x00000002
1157 #define	BGE_RXLPMODE_CLASS0_ATTN	0x00000004
1158 #define	BGE_RXLPMODE_MAPOUTRANGE_ATTN	0x00000008
1159 #define	BGE_RXLPMODE_STATSOFLOW_ATTN	0x00000010
1162 #define	BGE_RXLPSTAT_CLASS0_ATTN	0x00000004
1163 #define	BGE_RXLPSTAT_MAPOUTRANGE_ATTN	0x00000008
1164 #define	BGE_RXLPSTAT_STATSOFLOW_ATTN	0x00000010
1169 #define	BGE_RDBDI_MODE			0x2400
1170 #define	BGE_RDBDI_STATUS		0x2404
1171 #define	BGE_RX_JUMBO_RCB_HADDR_HI	0x2440
1172 #define	BGE_RX_JUMBO_RCB_HADDR_LO	0x2444
1173 #define	BGE_RX_JUMBO_RCB_MAXLEN_FLAGS	0x2448
1174 #define	BGE_RX_JUMBO_RCB_NICADDR	0x244C
1175 #define	BGE_RX_STD_RCB_HADDR_HI		0x2450
1176 #define	BGE_RX_STD_RCB_HADDR_LO		0x2454
1177 #define	BGE_RX_STD_RCB_MAXLEN_FLAGS	0x2458
1178 #define	BGE_RX_STD_RCB_NICADDR		0x245C
1179 #define	BGE_RX_MINI_RCB_HADDR_HI	0x2460
1180 #define	BGE_RX_MINI_RCB_HADDR_LO	0x2464
1181 #define	BGE_RX_MINI_RCB_MAXLEN_FLAGS	0x2468
1182 #define	BGE_RX_MINI_RCB_NICADDR		0x246C
1183 #define	BGE_RDBDI_JUMBO_RX_CONS		0x2470
1184 #define	BGE_RDBDI_STD_RX_CONS		0x2474
1185 #define	BGE_RDBDI_MINI_RX_CONS		0x2478
1186 #define	BGE_RDBDI_RETURN_PROD0		0x2480
1187 #define	BGE_RDBDI_RETURN_PROD1		0x2484
1188 #define	BGE_RDBDI_RETURN_PROD2		0x2488
1189 #define	BGE_RDBDI_RETURN_PROD3		0x248C
1190 #define	BGE_RDBDI_RETURN_PROD4		0x2490
1191 #define	BGE_RDBDI_RETURN_PROD5		0x2494
1192 #define	BGE_RDBDI_RETURN_PROD6		0x2498
1193 #define	BGE_RDBDI_RETURN_PROD7		0x249C
1194 #define	BGE_RDBDI_RETURN_PROD8		0x24A0
1195 #define	BGE_RDBDI_RETURN_PROD9		0x24A4
1196 #define	BGE_RDBDI_RETURN_PROD10		0x24A8
1197 #define	BGE_RDBDI_RETURN_PROD11		0x24AC
1198 #define	BGE_RDBDI_RETURN_PROD12		0x24B0
1199 #define	BGE_RDBDI_RETURN_PROD13		0x24B4
1200 #define	BGE_RDBDI_RETURN_PROD14		0x24B8
1201 #define	BGE_RDBDI_RETURN_PROD15		0x24BC
1202 #define	BGE_RDBDI_HWDIAG		0x24C0
1205 #define	BGE_RDBDIMODE_RESET		0x00000001
1206 #define	BGE_RDBDIMODE_ENABLE		0x00000002
1207 #define	BGE_RDBDIMODE_JUMBO_ATTN	0x00000004
1208 #define	BGE_RDBDIMODE_GIANT_ATTN	0x00000008
1209 #define	BGE_RDBDIMODE_BADRINGSZ_ATTN	0x00000010
1212 #define	BGE_RDBDISTAT_JUMBO_ATTN	0x00000004
1213 #define	BGE_RDBDISTAT_GIANT_ATTN	0x00000008
1214 #define	BGE_RDBDISTAT_BADRINGSZ_ATTN	0x00000010
1219 #define	BGE_RDC_MODE			0x2800
1222 #define	BGE_RDCMODE_RESET		0x00000001
1223 #define	BGE_RDCMODE_ENABLE		0x00000002
1224 #define	BGE_RDCMODE_ATTN		0x00000004
1229 #define	BGE_RBDI_MODE			0x2C00
1230 #define	BGE_RBDI_STATUS			0x2C04
1231 #define	BGE_RBDI_NIC_JUMBO_BD_PROD	0x2C08
1232 #define	BGE_RBDI_NIC_STD_BD_PROD	0x2C0C
1233 #define	BGE_RBDI_NIC_MINI_BD_PROD	0x2C10
1234 #define	BGE_RBDI_MINI_REPL_THRESH	0x2C14
1235 #define	BGE_RBDI_STD_REPL_THRESH	0x2C18
1236 #define	BGE_RBDI_JUMBO_REPL_THRESH	0x2C1C
1238 #define	BGE_STD_REPLENISH_LWM		0x2D00
1239 #define	BGE_JMB_REPLENISH_LWM		0x2D04
1242 #define	BGE_RBDIMODE_RESET		0x00000001
1243 #define	BGE_RBDIMODE_ENABLE		0x00000002
1244 #define	BGE_RBDIMODE_ATTN		0x00000004
1247 #define	BGE_RBDISTAT_ATTN		0x00000004
1252 #define	BGE_RBDC_MODE			0x3000
1253 #define	BGE_RBDC_STATUS			0x3004
1254 #define	BGE_RBDC_JUMBO_BD_PROD		0x3008
1255 #define	BGE_RBDC_STD_BD_PROD		0x300C
1256 #define	BGE_RBDC_MINI_BD_PROD		0x3010
1259 #define	BGE_RBDCMODE_RESET		0x00000001
1260 #define	BGE_RBDCMODE_ENABLE		0x00000002
1261 #define	BGE_RBDCMODE_ATTN		0x00000004
1264 #define	BGE_RBDCSTAT_ERROR		0x00000004
1269 #define	BGE_RXLS_MODE			0x3400
1270 #define	BGE_RXLS_STATUS			0x3404
1273 #define	BGE_RXLSMODE_RESET		0x00000001
1274 #define	BGE_RXLSMODE_ENABLE		0x00000002
1275 #define	BGE_RXLSMODE_ATTN		0x00000004
1278 #define	BGE_RXLSSTAT_ERROR		0x00000004
1280 #define	BGE_CPMU_CTRL			0x3600
1281 #define	BGE_CPMU_LSPD_10MB_CLK		0x3604
1282 #define	BGE_CPMU_LSPD_1000MB_CLK	0x360C
1283 #define	BGE_CPMU_LNK_AWARE_PWRMD	0x3610
1284 #define	BGE_CPMU_HST_ACC		0x361C
1285 #define	BGE_CPMU_CLCK_ORIDE		0x3624
1286 #define	BGE_CPMU_CLCK_STAT		0x3630
1287 #define	BGE_CPMU_MUTEX_REQ		0x365C
1288 #define	BGE_CPMU_MUTEX_GNT		0x3660
1289 #define	BGE_CPMU_PHY_STRAP		0x3664
1290 #define	BGE_CPMU_PADRNG_CTL		0x3668
1293 #define	BGE_CPMU_CTRL_LINK_IDLE_MODE	0x00000200
1294 #define	BGE_CPMU_CTRL_LINK_AWARE_MODE	0x00000400
1295 #define	BGE_CPMU_CTRL_LINK_SPEED_MODE	0x00004000
1296 #define	BGE_CPMU_CTRL_GPHY_10MB_RXONLY	0x00010000
1299 #define	BGE_CPMU_LSPD_10MB_MACCLK_MASK	0x001F0000
1300 #define	BGE_CPMU_LSPD_10MB_MACCLK_6_25	0x00130000
1303 #define	BGE_CPMU_LSPD_1000MB_MACCLK_62_5	0x00000000
1304 #define	BGE_CPMU_LSPD_1000MB_MACCLK_12_5	0x00110000
1305 #define	BGE_CPMU_LSPD_1000MB_MACCLK_MASK	0x001F0000
1308 #define	BGE_CPMU_LNK_AWARE_MACCLK_MASK	0x001F0000
1309 #define	BGE_CPMU_LNK_AWARE_MACCLK_6_25	0x00130000
1311 #define	BGE_CPMU_HST_ACC_MACCLK_MASK	0x001F0000
1312 #define	BGE_CPMU_HST_ACC_MACCLK_6_25	0x00130000
1315 #define	CPMU_CLCK_ORIDE_MAC_ORIDE_EN	0x80000000
1318 #define	BGE_CPMU_CLCK_STAT_MAC_CLCK_MASK	0x001F0000
1319 #define	BGE_CPMU_CLCK_STAT_MAC_CLCK_62_5	0x00000000
1320 #define	BGE_CPMU_CLCK_STAT_MAC_CLCK_12_5	0x00110000
1321 #define	BGE_CPMU_CLCK_STAT_MAC_CLCK_6_25	0x00130000
1324 #define	BGE_CPMU_MUTEX_REQ_DRIVER	0x00001000
1325 #define	BGE_CPMU_MUTEX_GNT_DRIVER	0x00001000
1328 #define	BGE_CPMU_PHY_STRAP_IS_SERDES	0x00000020
1331 #define	BGE_CPMU_PADRNG_CTL_RDIV2	0x00040000
1336 #define	BGE_MBCF_MODE			0x3800
1337 #define	BGE_MBCF_STATUS			0x3804
1340 #define	BGE_MBCFMODE_RESET		0x00000001
1341 #define	BGE_MBCFMODE_ENABLE		0x00000002
1342 #define	BGE_MBCFMODE_ATTN		0x00000004
1345 #define	BGE_MBCFSTAT_ERROR		0x00000004
1350 #define	BGE_HCC_MODE			0x3C00
1351 #define	BGE_HCC_STATUS			0x3C04
1352 #define	BGE_HCC_RX_COAL_TICKS		0x3C08
1353 #define	BGE_HCC_TX_COAL_TICKS		0x3C0C
1354 #define	BGE_HCC_RX_MAX_COAL_BDS		0x3C10
1355 #define	BGE_HCC_TX_MAX_COAL_BDS		0x3C14
1356 #define	BGE_HCC_RX_COAL_TICKS_INT	0x3C18 /* ticks during interrupt */
1357 #define	BGE_HCC_TX_COAL_TICKS_INT	0x3C1C /* ticks during interrupt */
1358 #define	BGE_HCC_RX_MAX_COAL_BDS_INT	0x3C20 /* BDs during interrupt */
1359 #define	BGE_HCC_TX_MAX_COAL_BDS_INT	0x3C24 /* BDs during interrupt */
1360 #define	BGE_HCC_STATS_TICKS		0x3C28
1361 #define	BGE_HCC_STATS_ADDR_HI		0x3C30
1362 #define	BGE_HCC_STATS_ADDR_LO		0x3C34
1363 #define	BGE_HCC_STATUSBLK_ADDR_HI	0x3C38
1364 #define	BGE_HCC_STATUSBLK_ADDR_LO	0x3C3C
1365 #define	BGE_HCC_STATS_BASEADDR		0x3C40 /* address in NIC memory */
1366 #define	BGE_HCC_STATUSBLK_BASEADDR	0x3C44 /* address in NIC memory */
1367 #define	BGE_FLOW_ATTN			0x3C48
1368 #define	BGE_HCC_JUMBO_BD_CONS		0x3C50
1369 #define	BGE_HCC_STD_BD_CONS		0x3C54
1370 #define	BGE_HCC_MINI_BD_CONS		0x3C58
1371 #define	BGE_HCC_RX_RETURN_PROD0		0x3C80
1372 #define	BGE_HCC_RX_RETURN_PROD1		0x3C84
1373 #define	BGE_HCC_RX_RETURN_PROD2		0x3C88
1374 #define	BGE_HCC_RX_RETURN_PROD3		0x3C8C
1375 #define	BGE_HCC_RX_RETURN_PROD4		0x3C90
1376 #define	BGE_HCC_RX_RETURN_PROD5		0x3C94
1377 #define	BGE_HCC_RX_RETURN_PROD6		0x3C98
1378 #define	BGE_HCC_RX_RETURN_PROD7		0x3C9C
1379 #define	BGE_HCC_RX_RETURN_PROD8		0x3CA0
1380 #define	BGE_HCC_RX_RETURN_PROD9		0x3CA4
1381 #define	BGE_HCC_RX_RETURN_PROD10	0x3CA8
1382 #define	BGE_HCC_RX_RETURN_PROD11	0x3CAC
1383 #define	BGE_HCC_RX_RETURN_PROD12	0x3CB0
1384 #define	BGE_HCC_RX_RETURN_PROD13	0x3CB4
1385 #define	BGE_HCC_RX_RETURN_PROD14	0x3CB8
1386 #define	BGE_HCC_RX_RETURN_PROD15	0x3CBC
1387 #define	BGE_HCC_TX_BD_CONS0		0x3CC0
1388 #define	BGE_HCC_TX_BD_CONS1		0x3CC4
1389 #define	BGE_HCC_TX_BD_CONS2		0x3CC8
1390 #define	BGE_HCC_TX_BD_CONS3		0x3CCC
1391 #define	BGE_HCC_TX_BD_CONS4		0x3CD0
1392 #define	BGE_HCC_TX_BD_CONS5		0x3CD4
1393 #define	BGE_HCC_TX_BD_CONS6		0x3CD8
1394 #define	BGE_HCC_TX_BD_CONS7		0x3CDC
1395 #define	BGE_HCC_TX_BD_CONS8		0x3CE0
1396 #define	BGE_HCC_TX_BD_CONS9		0x3CE4
1397 #define	BGE_HCC_TX_BD_CONS10		0x3CE8
1398 #define	BGE_HCC_TX_BD_CONS11		0x3CEC
1399 #define	BGE_HCC_TX_BD_CONS12		0x3CF0
1400 #define	BGE_HCC_TX_BD_CONS13		0x3CF4
1401 #define	BGE_HCC_TX_BD_CONS14		0x3CF8
1402 #define	BGE_HCC_TX_BD_CONS15		0x3CFC
1405 #define	BGE_HCCMODE_RESET		0x00000001
1406 #define	BGE_HCCMODE_ENABLE		0x00000002
1407 #define	BGE_HCCMODE_ATTN		0x00000004
1408 #define	BGE_HCCMODE_COAL_NOW		0x00000008
1409 #define	BGE_HCCMODE_MSI_BITS		0x00000070
1410 #define	BGE_HCCMODE_STATBLK_SIZE	0x00000180
1412 #define	BGE_STATBLKSZ_FULL		0x00000000
1413 #define	BGE_STATBLKSZ_64BYTE		0x00000080
1414 #define	BGE_STATBLKSZ_32BYTE		0x00000100
1417 #define	BGE_HCCSTAT_ERROR		0x00000004
1420 #define	BGE_FLOWATTN_MB_LOWAT		0x00000040
1421 #define	BGE_FLOWATTN_MEMARB		0x00000080
1422 #define	BGE_FLOWATTN_HOSTCOAL		0x00008000
1423 #define	BGE_FLOWATTN_DMADONE_DISCARD	0x00010000
1424 #define	BGE_FLOWATTN_RCB_INVAL		0x00020000
1425 #define	BGE_FLOWATTN_RXDATA_CORRUPT	0x00040000
1426 #define	BGE_FLOWATTN_RDBDI		0x00080000
1427 #define	BGE_FLOWATTN_RXLS		0x00100000
1428 #define	BGE_FLOWATTN_RXLP		0x00200000
1429 #define	BGE_FLOWATTN_RBDC		0x00400000
1430 #define	BGE_FLOWATTN_RBDI		0x00800000
1431 #define	BGE_FLOWATTN_SDC		0x08000000
1432 #define	BGE_FLOWATTN_SDI		0x10000000
1433 #define	BGE_FLOWATTN_SRS		0x20000000
1434 #define	BGE_FLOWATTN_SBDC		0x40000000
1435 #define	BGE_FLOWATTN_SBDI		0x80000000
1440 #define	BGE_MARB_MODE			0x4000
1441 #define	BGE_MARB_STATUS			0x4004
1442 #define	BGE_MARB_TRAPADDR_HI		0x4008
1443 #define	BGE_MARB_TRAPADDR_LO		0x400C
1446 #define	BGE_MARBMODE_RESET		0x00000001
1447 #define	BGE_MARBMODE_ENABLE		0x00000002
1448 #define	BGE_MARBMODE_TX_ADDR_TRAP	0x00000004
1449 #define	BGE_MARBMODE_RX_ADDR_TRAP	0x00000008
1450 #define	BGE_MARBMODE_DMAW1_TRAP		0x00000010
1451 #define	BGE_MARBMODE_DMAR1_TRAP		0x00000020
1452 #define	BGE_MARBMODE_RXRISC_TRAP	0x00000040
1453 #define	BGE_MARBMODE_TXRISC_TRAP	0x00000080
1454 #define	BGE_MARBMODE_PCI_TRAP		0x00000100
1455 #define	BGE_MARBMODE_DMAR2_TRAP		0x00000200
1456 #define	BGE_MARBMODE_RXQ_TRAP		0x00000400
1457 #define	BGE_MARBMODE_RXDI1_TRAP		0x00000800
1458 #define	BGE_MARBMODE_RXDI2_TRAP		0x00001000
1459 #define	BGE_MARBMODE_DC_GRPMEM_TRAP	0x00002000
1460 #define	BGE_MARBMODE_HCOAL_TRAP		0x00004000
1461 #define	BGE_MARBMODE_MBUF_TRAP		0x00008000
1462 #define	BGE_MARBMODE_TXDI_TRAP		0x00010000
1463 #define	BGE_MARBMODE_SDC_DMAC_TRAP	0x00020000
1464 #define	BGE_MARBMODE_TXBD_TRAP		0x00040000
1465 #define	BGE_MARBMODE_BUFFMAN_TRAP	0x00080000
1466 #define	BGE_MARBMODE_DMAW2_TRAP		0x00100000
1467 #define	BGE_MARBMODE_XTSSRAM_ROFLO_TRAP	0x00200000
1468 #define	BGE_MARBMODE_XTSSRAM_RUFLO_TRAP 0x00400000
1469 #define	BGE_MARBMODE_XTSSRAM_WOFLO_TRAP	0x00800000
1470 #define	BGE_MARBMODE_XTSSRAM_WUFLO_TRAP	0x01000000
1471 #define	BGE_MARBMODE_XTSSRAM_PERR_TRAP	0x02000000
1474 #define	BGE_MARBSTAT_TX_ADDR_TRAP	0x00000004
1475 #define	BGE_MARBSTAT_RX_ADDR_TRAP	0x00000008
1476 #define	BGE_MARBSTAT_DMAW1_TRAP		0x00000010
1477 #define	BGE_MARBSTAT_DMAR1_TRAP		0x00000020
1478 #define	BGE_MARBSTAT_RXRISC_TRAP	0x00000040
1479 #define	BGE_MARBSTAT_TXRISC_TRAP	0x00000080
1480 #define	BGE_MARBSTAT_PCI_TRAP		0x00000100
1481 #define	BGE_MARBSTAT_DMAR2_TRAP		0x00000200
1482 #define	BGE_MARBSTAT_RXQ_TRAP		0x00000400
1483 #define	BGE_MARBSTAT_RXDI1_TRAP		0x00000800
1484 #define	BGE_MARBSTAT_RXDI2_TRAP		0x00001000
1485 #define	BGE_MARBSTAT_DC_GRPMEM_TRAP	0x00002000
1486 #define	BGE_MARBSTAT_HCOAL_TRAP		0x00004000
1487 #define	BGE_MARBSTAT_MBUF_TRAP		0x00008000
1488 #define	BGE_MARBSTAT_TXDI_TRAP		0x00010000
1489 #define	BGE_MARBSTAT_SDC_DMAC_TRAP	0x00020000
1490 #define	BGE_MARBSTAT_TXBD_TRAP		0x00040000
1491 #define	BGE_MARBSTAT_BUFFMAN_TRAP	0x00080000
1492 #define	BGE_MARBSTAT_DMAW2_TRAP		0x00100000
1493 #define	BGE_MARBSTAT_XTSSRAM_ROFLO_TRAP	0x00200000
1494 #define	BGE_MARBSTAT_XTSSRAM_RUFLO_TRAP 0x00400000
1495 #define	BGE_MARBSTAT_XTSSRAM_WOFLO_TRAP	0x00800000
1496 #define	BGE_MARBSTAT_XTSSRAM_WUFLO_TRAP	0x01000000
1497 #define	BGE_MARBSTAT_XTSSRAM_PERR_TRAP	0x02000000
1502 #define	BGE_BMAN_MODE			0x4400
1503 #define	BGE_BMAN_STATUS			0x4404
1504 #define	BGE_BMAN_MBUFPOOL_BASEADDR	0x4408
1505 #define	BGE_BMAN_MBUFPOOL_LEN		0x440C
1506 #define	BGE_BMAN_MBUFPOOL_READDMA_LOWAT	0x4410
1507 #define	BGE_BMAN_MBUFPOOL_MACRX_LOWAT	0x4414
1508 #define	BGE_BMAN_MBUFPOOL_HIWAT		0x4418
1509 #define	BGE_BMAN_RXCPU_MBALLOC_REQ	0x441C
1510 #define	BGE_BMAN_RXCPU_MBALLOC_RESP	0x4420
1511 #define	BGE_BMAN_TXCPU_MBALLOC_REQ	0x4424
1512 #define	BGE_BMAN_TXCPU_MBALLOC_RESP	0x4428
1513 #define	BGE_BMAN_DMA_DESCPOOL_BASEADDR	0x442C
1514 #define	BGE_BMAN_DMA_DESCPOOL_LEN	0x4430
1515 #define	BGE_BMAN_DMA_DESCPOOL_LOWAT	0x4434
1516 #define	BGE_BMAN_DMA_DESCPOOL_HIWAT	0x4438
1517 #define	BGE_BMAN_RXCPU_DMAALLOC_REQ	0x443C
1518 #define	BGE_BMAN_RXCPU_DMAALLOC_RESP	0x4440
1519 #define	BGE_BMAN_TXCPU_DMAALLOC_REQ	0x4444
1520 #define	BGE_BMAN_TXCPU_DMALLLOC_RESP	0x4448
1521 #define	BGE_BMAN_HWDIAG_1		0x444C
1522 #define	BGE_BMAN_HWDIAG_2		0x4450
1523 #define	BGE_BMAN_HWDIAG_3		0x4454
1526 #define	BGE_BMANMODE_RESET		0x00000001
1527 #define	BGE_BMANMODE_ENABLE		0x00000002
1528 #define	BGE_BMANMODE_ATTN		0x00000004
1529 #define	BGE_BMANMODE_TESTMODE		0x00000008
1530 #define	BGE_BMANMODE_LOMBUF_ATTN	0x00000010
1531 #define	BGE_BMANMODE_NO_TX_UNDERRUN	0x80000000
1534 #define	BGE_BMANSTAT_ERRO		0x00000004
1535 #define	BGE_BMANSTAT_LOWMBUF_ERROR	0x00000010
1540 #define	BGE_RDMA_MODE			0x4800
1541 #define	BGE_RDMA_STATUS			0x4804
1542 #define	BGE_RDMA_RSRVCTRL_REG2		0x4890
1543 #define	BGE_RDMA_LSO_CRPTEN_CTRL_REG2	0x48A0
1544 #define	BGE_RDMA_RSRVCTRL		0x4900
1545 #define	BGE_RDMA_LSO_CRPTEN_CTRL	0x4910
1548 #define	BGE_RDMAMODE_RESET		0x00000001
1549 #define	BGE_RDMAMODE_ENABLE		0x00000002
1550 #define	BGE_RDMAMODE_PCI_TGT_ABRT_ATTN	0x00000004
1551 #define	BGE_RDMAMODE_PCI_MSTR_ABRT_ATTN	0x00000008
1552 #define	BGE_RDMAMODE_PCI_PERR_ATTN	0x00000010
1553 #define	BGE_RDMAMODE_PCI_ADDROFLOW_ATTN	0x00000020
1554 #define	BGE_RDMAMODE_PCI_FIFOOFLOW_ATTN	0x00000040
1555 #define	BGE_RDMAMODE_PCI_FIFOUFLOW_ATTN	0x00000080
1556 #define	BGE_RDMAMODE_PCI_FIFOOREAD_ATTN	0x00000100
1557 #define	BGE_RDMAMODE_LOCWRITE_TOOBIG	0x00000200
1558 #define	BGE_RDMAMODE_ALL_ATTNS		0x000003FC
1559 #define	BGE_RDMAMODE_BD_SBD_CRPT_ATTN	0x00000800
1560 #define	BGE_RDMAMODE_MBUF_RBD_CRPT_ATTN	0x00001000
1561 #define	BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN	0x00002000
1562 #define	BGE_RDMAMODE_FIFO_SIZE_128	0x00020000
1563 #define	BGE_RDMAMODE_FIFO_LONG_BURST	0x00030000
1564 #define	BGE_RDMAMODE_MULT_DMA_RD_DIS	0x01000000
1565 #define	BGE_RDMAMODE_TSO4_ENABLE	0x08000000
1566 #define	BGE_RDMAMODE_TSO6_ENABLE	0x10000000
1567 #define	BGE_RDMAMODE_H2BNC_VLAN_DET	0x20000000
1570 #define	BGE_RDMASTAT_PCI_TGT_ABRT_ATTN	0x00000004
1571 #define	BGE_RDMASTAT_PCI_MSTR_ABRT_ATTN	0x00000008
1572 #define	BGE_RDMASTAT_PCI_PERR_ATTN	0x00000010
1573 #define	BGE_RDMASTAT_PCI_ADDROFLOW_ATTN	0x00000020
1574 #define	BGE_RDMASTAT_PCI_FIFOOFLOW_ATTN	0x00000040
1575 #define	BGE_RDMASTAT_PCI_FIFOUFLOW_ATTN	0x00000080
1576 #define	BGE_RDMASTAT_PCI_FIFOOREAD_ATTN	0x00000100
1577 #define	BGE_RDMASTAT_LOCWRITE_TOOBIG	0x00000200
1580 #define	BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX	0x00000004
1581 #define	BGE_RDMA_RSRVCTRL_FIFO_LWM_1_5K	0x00000C00
1582 #define	BGE_RDMA_RSRVCTRL_FIFO_HWM_1_5K	0x000C0000
1583 #define	BGE_RDMA_RSRVCTRL_TXMRGN_320B	0x28000000
1584 #define	BGE_RDMA_RSRVCTRL_FIFO_LWM_MASK	0x00000FF0
1585 #define	BGE_RDMA_RSRVCTRL_FIFO_HWM_MASK	0x000FF000
1586 #define	BGE_RDMA_RSRVCTRL_TXMRGN_MASK	0xFFE00000
1588 #define	BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_BD_512	0x00020000
1589 #define	BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_BD_4K	0x00030000
1590 #define	BGE_RDMA_LSO_CRPTEN_CTRL_BLEN_LSO_4K	0x000C0000
1591 #define	BGE_RDMA_TX_LENGTH_WA_5719		0x02000000
1592 #define	BGE_RDMA_TX_LENGTH_WA_5720		0x00200000
1595 #define	BGE_RDMA_BD_MODE		0x4A00
1597 #define	BGE_RDMA_BD_STATUS		0x4A04
1599 #define	BGE_RDMA_BD_MODE_RESET		0x00000001
1600 #define	BGE_RDMA_BD_MODE_ENABLE		0x00000002
1603 #define	BGE_RDMA_NON_LSO_MODE		0x4B00
1605 #define	BGE_RDMA_NON_LSO_STATUS		0x4B04
1607 #define	BGE_RDMA_NON_LSO_MODE_RESET	0x00000001
1608 #define	BGE_RDMA_NON_LSO_MODE_ENABLE	0x00000002
1610 #define	BGE_RDMA_LENGTH			0x4BE0
1616 #define	BGE_WDMA_MODE			0x4C00
1617 #define	BGE_WDMA_STATUS			0x4C04
1620 #define	BGE_WDMAMODE_RESET		0x00000001
1621 #define	BGE_WDMAMODE_ENABLE		0x00000002
1622 #define	BGE_WDMAMODE_PCI_TGT_ABRT_ATTN	0x00000004
1623 #define	BGE_WDMAMODE_PCI_MSTR_ABRT_ATTN	0x00000008
1624 #define	BGE_WDMAMODE_PCI_PERR_ATTN	0x00000010
1625 #define	BGE_WDMAMODE_PCI_ADDROFLOW_ATTN	0x00000020
1626 #define	BGE_WDMAMODE_PCI_FIFOOFLOW_ATTN	0x00000040
1627 #define	BGE_WDMAMODE_PCI_FIFOUFLOW_ATTN	0x00000080
1628 #define	BGE_WDMAMODE_PCI_FIFOOREAD_ATTN	0x00000100
1629 #define	BGE_WDMAMODE_LOCREAD_TOOBIG	0x00000200
1630 #define	BGE_WDMAMODE_ALL_ATTNS		0x000003FC
1631 #define	BGE_WDMAMODE_STATUS_TAG_FIX	0x20000000
1632 #define	BGE_WDMAMODE_BURST_ALL_DATA	0xC0000000
1635 #define	BGE_WDMASTAT_PCI_TGT_ABRT_ATTN	0x00000004
1636 #define	BGE_WDMASTAT_PCI_MSTR_ABRT_ATTN	0x00000008
1637 #define	BGE_WDMASTAT_PCI_PERR_ATTN	0x00000010
1638 #define	BGE_WDMASTAT_PCI_ADDROFLOW_ATTN	0x00000020
1639 #define	BGE_WDMASTAT_PCI_FIFOOFLOW_ATTN	0x00000040
1640 #define	BGE_WDMASTAT_PCI_FIFOUFLOW_ATTN	0x00000080
1641 #define	BGE_WDMASTAT_PCI_FIFOOREAD_ATTN	0x00000100
1642 #define	BGE_WDMASTAT_LOCREAD_TOOBIG	0x00000200
1647 #define	BGE_RXCPU_MODE			0x5000
1648 #define	BGE_RXCPU_STATUS		0x5004
1649 #define	BGE_RXCPU_PC			0x501C
1652 #define	BGE_RXCPUMODE_RESET		0x00000001
1653 #define	BGE_RXCPUMODE_SINGLESTEP	0x00000002
1654 #define	BGE_RXCPUMODE_P0_DATAHLT_ENB	0x00000004
1655 #define	BGE_RXCPUMODE_P0_INSTRHLT_ENB	0x00000008
1656 #define	BGE_RXCPUMODE_WR_POSTBUF_ENB	0x00000010
1657 #define	BGE_RXCPUMODE_DATACACHE_ENB	0x00000020
1658 #define	BGE_RXCPUMODE_ROMFAIL		0x00000040
1659 #define	BGE_RXCPUMODE_WATCHDOG_ENB	0x00000080
1660 #define	BGE_RXCPUMODE_INSTRCACHE_PRF	0x00000100
1661 #define	BGE_RXCPUMODE_INSTRCACHE_FLUSH	0x00000200
1662 #define	BGE_RXCPUMODE_HALTCPU		0x00000400
1663 #define	BGE_RXCPUMODE_INVDATAHLT_ENB	0x00000800
1664 #define	BGE_RXCPUMODE_MADDRTRAPHLT_ENB	0x00001000
1665 #define	BGE_RXCPUMODE_RADDRTRAPHLT_ENB	0x00002000
1668 #define	BGE_RXCPUSTAT_HW_BREAKPOINT	0x00000001
1669 #define	BGE_RXCPUSTAT_HLTINSTR_EXECUTED	0x00000002
1670 #define	BGE_RXCPUSTAT_INVALID_INSTR	0x00000004
1671 #define	BGE_RXCPUSTAT_P0_DATAREF	0x00000008
1672 #define	BGE_RXCPUSTAT_P0_INSTRREF	0x00000010
1673 #define	BGE_RXCPUSTAT_INVALID_DATAACC	0x00000020
1674 #define	BGE_RXCPUSTAT_INVALID_INSTRFTCH	0x00000040
1675 #define	BGE_RXCPUSTAT_BAD_MEMALIGN	0x00000080
1676 #define	BGE_RXCPUSTAT_MADDR_TRAP	0x00000100
1677 #define	BGE_RXCPUSTAT_REGADDR_TRAP	0x00000200
1678 #define	BGE_RXCPUSTAT_DATAACC_STALL	0x00001000
1679 #define	BGE_RXCPUSTAT_INSTRFETCH_STALL	0x00002000
1680 #define	BGE_RXCPUSTAT_MA_WR_FIFOOFLOW	0x08000000
1681 #define	BGE_RXCPUSTAT_MA_RD_FIFOOFLOW	0x10000000
1682 #define	BGE_RXCPUSTAT_MA_DATAMASK_OFLOW	0x20000000
1683 #define	BGE_RXCPUSTAT_MA_REQ_FIFOOFLOW	0x40000000
1684 #define	BGE_RXCPUSTAT_BLOCKING_READ	0x80000000
1689 #define	BGE_VCPU_STATUS			0x5100
1690 #define	BGE_VCPU_EXT_CTRL		0x6890
1692 #define	BGE_VCPU_STATUS_INIT_DONE	0x04000000
1693 #define	BGE_VCPU_STATUS_DRV_RESET 	0x08000000
1695 #define	BGE_VCPU_EXT_CTRL_HALT_CPU	0x00400000
1696 #define	BGE_VCPU_EXT_CTRL_DISABLE_WOL	0x20000000
1701 #define	BGE_TXCPU_MODE			0x5400
1702 #define	BGE_TXCPU_STATUS		0x5404
1703 #define	BGE_TXCPU_PC			0x541C
1706 #define	BGE_TXCPUMODE_RESET		0x00000001
1707 #define	BGE_TXCPUMODE_SINGLESTEP	0x00000002
1708 #define	BGE_TXCPUMODE_P0_DATAHLT_ENB	0x00000004
1709 #define	BGE_TXCPUMODE_P0_INSTRHLT_ENB	0x00000008
1710 #define	BGE_TXCPUMODE_WR_POSTBUF_ENB	0x00000010
1711 #define	BGE_TXCPUMODE_DATACACHE_ENB	0x00000020
1712 #define	BGE_TXCPUMODE_ROMFAIL		0x00000040
1713 #define	BGE_TXCPUMODE_WATCHDOG_ENB	0x00000080
1714 #define	BGE_TXCPUMODE_INSTRCACHE_PRF	0x00000100
1715 #define	BGE_TXCPUMODE_INSTRCACHE_FLUSH	0x00000200
1716 #define	BGE_TXCPUMODE_HALTCPU		0x00000400
1717 #define	BGE_TXCPUMODE_INVDATAHLT_ENB	0x00000800
1718 #define	BGE_TXCPUMODE_MADDRTRAPHLT_ENB	0x00001000
1721 #define	BGE_TXCPUSTAT_HW_BREAKPOINT	0x00000001
1722 #define	BGE_TXCPUSTAT_HLTINSTR_EXECUTED	0x00000002
1723 #define	BGE_TXCPUSTAT_INVALID_INSTR	0x00000004
1724 #define	BGE_TXCPUSTAT_P0_DATAREF	0x00000008
1725 #define	BGE_TXCPUSTAT_P0_INSTRREF	0x00000010
1726 #define	BGE_TXCPUSTAT_INVALID_DATAACC	0x00000020
1727 #define	BGE_TXCPUSTAT_INVALID_INSTRFTCH	0x00000040
1728 #define	BGE_TXCPUSTAT_BAD_MEMALIGN	0x00000080
1729 #define	BGE_TXCPUSTAT_MADDR_TRAP	0x00000100
1730 #define	BGE_TXCPUSTAT_REGADDR_TRAP	0x00000200
1731 #define	BGE_TXCPUSTAT_DATAACC_STALL	0x00001000
1732 #define	BGE_TXCPUSTAT_INSTRFETCH_STALL	0x00002000
1733 #define	BGE_TXCPUSTAT_MA_WR_FIFOOFLOW	0x08000000
1734 #define	BGE_TXCPUSTAT_MA_RD_FIFOOFLOW	0x10000000
1735 #define	BGE_TXCPUSTAT_MA_DATAMASK_OFLOW	0x20000000
1736 #define	BGE_TXCPUSTAT_MA_REQ_FIFOOFLOW	0x40000000
1737 #define	BGE_TXCPUSTAT_BLOCKING_READ	0x80000000
1742 #define	BGE_LPMBX_IRQ0_HI		0x5800
1743 #define	BGE_LPMBX_IRQ0_LO		0x5804
1744 #define	BGE_LPMBX_IRQ1_HI		0x5808
1745 #define	BGE_LPMBX_IRQ1_LO		0x580C
1746 #define	BGE_LPMBX_IRQ2_HI		0x5810
1747 #define	BGE_LPMBX_IRQ2_LO		0x5814
1748 #define	BGE_LPMBX_IRQ3_HI		0x5818
1749 #define	BGE_LPMBX_IRQ3_LO		0x581C
1750 #define	BGE_LPMBX_GEN0_HI		0x5820
1751 #define	BGE_LPMBX_GEN0_LO		0x5824
1752 #define	BGE_LPMBX_GEN1_HI		0x5828
1753 #define	BGE_LPMBX_GEN1_LO		0x582C
1754 #define	BGE_LPMBX_GEN2_HI		0x5830
1755 #define	BGE_LPMBX_GEN2_LO		0x5834
1756 #define	BGE_LPMBX_GEN3_HI		0x5828
1757 #define	BGE_LPMBX_GEN3_LO		0x582C
1758 #define	BGE_LPMBX_GEN4_HI		0x5840
1759 #define	BGE_LPMBX_GEN4_LO		0x5844
1760 #define	BGE_LPMBX_GEN5_HI		0x5848
1761 #define	BGE_LPMBX_GEN5_LO		0x584C
1762 #define	BGE_LPMBX_GEN6_HI		0x5850
1763 #define	BGE_LPMBX_GEN6_LO		0x5854
1764 #define	BGE_LPMBX_GEN7_HI		0x5858
1765 #define	BGE_LPMBX_GEN7_LO		0x585C
1766 #define	BGE_LPMBX_RELOAD_STATS_HI	0x5860
1767 #define	BGE_LPMBX_RELOAD_STATS_LO	0x5864
1768 #define	BGE_LPMBX_RX_STD_PROD_HI	0x5868
1769 #define	BGE_LPMBX_RX_STD_PROD_LO	0x586C
1770 #define	BGE_LPMBX_RX_JUMBO_PROD_HI	0x5870
1771 #define	BGE_LPMBX_RX_JUMBO_PROD_LO	0x5874
1772 #define	BGE_LPMBX_RX_MINI_PROD_HI	0x5878
1773 #define	BGE_LPMBX_RX_MINI_PROD_LO	0x587C
1774 #define	BGE_LPMBX_RX_CONS0_HI		0x5880
1775 #define	BGE_LPMBX_RX_CONS0_LO		0x5884
1776 #define	BGE_LPMBX_RX_CONS1_HI		0x5888
1777 #define	BGE_LPMBX_RX_CONS1_LO		0x588C
1778 #define	BGE_LPMBX_RX_CONS2_HI		0x5890
1779 #define	BGE_LPMBX_RX_CONS2_LO		0x5894
1780 #define	BGE_LPMBX_RX_CONS3_HI		0x5898
1781 #define	BGE_LPMBX_RX_CONS3_LO		0x589C
1782 #define	BGE_LPMBX_RX_CONS4_HI		0x58A0
1783 #define	BGE_LPMBX_RX_CONS4_LO		0x58A4
1784 #define	BGE_LPMBX_RX_CONS5_HI		0x58A8
1785 #define	BGE_LPMBX_RX_CONS5_LO		0x58AC
1786 #define	BGE_LPMBX_RX_CONS6_HI		0x58B0
1787 #define	BGE_LPMBX_RX_CONS6_LO		0x58B4
1788 #define	BGE_LPMBX_RX_CONS7_HI		0x58B8
1789 #define	BGE_LPMBX_RX_CONS7_LO		0x58BC
1790 #define	BGE_LPMBX_RX_CONS8_HI		0x58C0
1791 #define	BGE_LPMBX_RX_CONS8_LO		0x58C4
1792 #define	BGE_LPMBX_RX_CONS9_HI		0x58C8
1793 #define	BGE_LPMBX_RX_CONS9_LO		0x58CC
1794 #define	BGE_LPMBX_RX_CONS10_HI		0x58D0
1795 #define	BGE_LPMBX_RX_CONS10_LO		0x58D4
1796 #define	BGE_LPMBX_RX_CONS11_HI		0x58D8
1797 #define	BGE_LPMBX_RX_CONS11_LO		0x58DC
1798 #define	BGE_LPMBX_RX_CONS12_HI		0x58E0
1799 #define	BGE_LPMBX_RX_CONS12_LO		0x58E4
1800 #define	BGE_LPMBX_RX_CONS13_HI		0x58E8
1801 #define	BGE_LPMBX_RX_CONS13_LO		0x58EC
1802 #define	BGE_LPMBX_RX_CONS14_HI		0x58F0
1803 #define	BGE_LPMBX_RX_CONS14_LO		0x58F4
1804 #define	BGE_LPMBX_RX_CONS15_HI		0x58F8
1805 #define	BGE_LPMBX_RX_CONS15_LO		0x58FC
1806 #define	BGE_LPMBX_TX_HOST_PROD0_HI	0x5900
1807 #define	BGE_LPMBX_TX_HOST_PROD0_LO	0x5904
1808 #define	BGE_LPMBX_TX_HOST_PROD1_HI	0x5908
1809 #define	BGE_LPMBX_TX_HOST_PROD1_LO	0x590C
1810 #define	BGE_LPMBX_TX_HOST_PROD2_HI	0x5910
1811 #define	BGE_LPMBX_TX_HOST_PROD2_LO	0x5914
1812 #define	BGE_LPMBX_TX_HOST_PROD3_HI	0x5918
1813 #define	BGE_LPMBX_TX_HOST_PROD3_LO	0x591C
1814 #define	BGE_LPMBX_TX_HOST_PROD4_HI	0x5920
1815 #define	BGE_LPMBX_TX_HOST_PROD4_LO	0x5924
1816 #define	BGE_LPMBX_TX_HOST_PROD5_HI	0x5928
1817 #define	BGE_LPMBX_TX_HOST_PROD5_LO	0x592C
1818 #define	BGE_LPMBX_TX_HOST_PROD6_HI	0x5930
1819 #define	BGE_LPMBX_TX_HOST_PROD6_LO	0x5934
1820 #define	BGE_LPMBX_TX_HOST_PROD7_HI	0x5938
1821 #define	BGE_LPMBX_TX_HOST_PROD7_LO	0x593C
1822 #define	BGE_LPMBX_TX_HOST_PROD8_HI	0x5940
1823 #define	BGE_LPMBX_TX_HOST_PROD8_LO	0x5944
1824 #define	BGE_LPMBX_TX_HOST_PROD9_HI	0x5948
1825 #define	BGE_LPMBX_TX_HOST_PROD9_LO	0x594C
1826 #define	BGE_LPMBX_TX_HOST_PROD10_HI	0x5950
1827 #define	BGE_LPMBX_TX_HOST_PROD10_LO	0x5954
1828 #define	BGE_LPMBX_TX_HOST_PROD11_HI	0x5958
1829 #define	BGE_LPMBX_TX_HOST_PROD11_LO	0x595C
1830 #define	BGE_LPMBX_TX_HOST_PROD12_HI	0x5960
1831 #define	BGE_LPMBX_TX_HOST_PROD12_LO	0x5964
1832 #define	BGE_LPMBX_TX_HOST_PROD13_HI	0x5968
1833 #define	BGE_LPMBX_TX_HOST_PROD13_LO	0x596C
1834 #define	BGE_LPMBX_TX_HOST_PROD14_HI	0x5970
1835 #define	BGE_LPMBX_TX_HOST_PROD14_LO	0x5974
1836 #define	BGE_LPMBX_TX_HOST_PROD15_HI	0x5978
1837 #define	BGE_LPMBX_TX_HOST_PROD15_LO	0x597C
1838 #define	BGE_LPMBX_TX_NIC_PROD0_HI	0x5980
1839 #define	BGE_LPMBX_TX_NIC_PROD0_LO	0x5984
1840 #define	BGE_LPMBX_TX_NIC_PROD1_HI	0x5988
1841 #define	BGE_LPMBX_TX_NIC_PROD1_LO	0x598C
1842 #define	BGE_LPMBX_TX_NIC_PROD2_HI	0x5990
1843 #define	BGE_LPMBX_TX_NIC_PROD2_LO	0x5994
1844 #define	BGE_LPMBX_TX_NIC_PROD3_HI	0x5998
1845 #define	BGE_LPMBX_TX_NIC_PROD3_LO	0x599C
1846 #define	BGE_LPMBX_TX_NIC_PROD4_HI	0x59A0
1847 #define	BGE_LPMBX_TX_NIC_PROD4_LO	0x59A4
1848 #define	BGE_LPMBX_TX_NIC_PROD5_HI	0x59A8
1849 #define	BGE_LPMBX_TX_NIC_PROD5_LO	0x59AC
1850 #define	BGE_LPMBX_TX_NIC_PROD6_HI	0x59B0
1851 #define	BGE_LPMBX_TX_NIC_PROD6_LO	0x59B4
1852 #define	BGE_LPMBX_TX_NIC_PROD7_HI	0x59B8
1853 #define	BGE_LPMBX_TX_NIC_PROD7_LO	0x59BC
1854 #define	BGE_LPMBX_TX_NIC_PROD8_HI	0x59C0
1855 #define	BGE_LPMBX_TX_NIC_PROD8_LO	0x59C4
1856 #define	BGE_LPMBX_TX_NIC_PROD9_HI	0x59C8
1857 #define	BGE_LPMBX_TX_NIC_PROD9_LO	0x59CC
1858 #define	BGE_LPMBX_TX_NIC_PROD10_HI	0x59D0
1859 #define	BGE_LPMBX_TX_NIC_PROD10_LO	0x59D4
1860 #define	BGE_LPMBX_TX_NIC_PROD11_HI	0x59D8
1861 #define	BGE_LPMBX_TX_NIC_PROD11_LO	0x59DC
1862 #define	BGE_LPMBX_TX_NIC_PROD12_HI	0x59E0
1863 #define	BGE_LPMBX_TX_NIC_PROD12_LO	0x59E4
1864 #define	BGE_LPMBX_TX_NIC_PROD13_HI	0x59E8
1865 #define	BGE_LPMBX_TX_NIC_PROD13_LO	0x59EC
1866 #define	BGE_LPMBX_TX_NIC_PROD14_HI	0x59F0
1867 #define	BGE_LPMBX_TX_NIC_PROD14_LO	0x59F4
1868 #define	BGE_LPMBX_TX_NIC_PROD15_HI	0x59F8
1869 #define	BGE_LPMBX_TX_NIC_PROD15_LO	0x59FC
1874 #define	BGE_FTQ_RESET			0x5C00
1876 #define	BGE_FTQRESET_DMAREAD		0x00000002
1877 #define	BGE_FTQRESET_DMAHIPRIO_RD	0x00000004
1878 #define	BGE_FTQRESET_DMADONE		0x00000010
1879 #define	BGE_FTQRESET_SBDC		0x00000020
1880 #define	BGE_FTQRESET_SDI		0x00000040
1881 #define	BGE_FTQRESET_WDMA		0x00000080
1882 #define	BGE_FTQRESET_DMAHIPRIO_WR	0x00000100
1883 #define	BGE_FTQRESET_TYPE1_SOFTWARE	0x00000200
1884 #define	BGE_FTQRESET_SDC		0x00000400
1885 #define	BGE_FTQRESET_HCC		0x00000800
1886 #define	BGE_FTQRESET_TXFIFO		0x00001000
1887 #define	BGE_FTQRESET_MBC		0x00002000
1888 #define	BGE_FTQRESET_RBDC		0x00004000
1889 #define	BGE_FTQRESET_RXLP		0x00008000
1890 #define	BGE_FTQRESET_RDBDI		0x00010000
1891 #define	BGE_FTQRESET_RDC		0x00020000
1892 #define	BGE_FTQRESET_TYPE2_SOFTWARE	0x00040000
1897 #define	BGE_MSI_MODE			0x6000
1898 #define	BGE_MSI_STATUS			0x6004
1899 #define	BGE_MSI_FIFOACCESS		0x6008
1902 #define	BGE_MSIMODE_RESET		0x00000001
1903 #define	BGE_MSIMODE_ENABLE		0x00000002
1904 #define	BGE_MSIMODE_ONE_SHOT_DISABLE	0x00000020
1905 #define	BGE_MSIMODE_MULTIVEC_ENABLE	0x00000080
1908 #define	BGE_MSISTAT_PCI_TGT_ABRT_ATTN	0x00000004
1909 #define	BGE_MSISTAT_PCI_MSTR_ABRT_ATTN	0x00000008
1910 #define	BGE_MSISTAT_PCI_PERR_ATTN	0x00000010
1911 #define	BGE_MSISTAT_MSI_FIFOUFLOW_ATTN	0x00000020
1912 #define	BGE_MSISTAT_MSI_FIFOOFLOW_ATTN	0x00000040
1917 #define	BGE_DMAC_MODE			0x6400
1920 #define	BGE_DMACMODE_RESET		0x00000001
1921 #define	BGE_DMACMODE_ENABLE		0x00000002
1926 #define	BGE_MODE_CTL			0x6800
1927 #define	BGE_MISC_CFG			0x6804
1928 #define	BGE_MISC_LOCAL_CTL		0x6808
1929 #define	BGE_RX_CPU_EVENT		0x6810
1930 #define	BGE_TX_CPU_EVENT		0x6820
1931 #define	BGE_EE_ADDR			0x6838
1932 #define	BGE_EE_DATA			0x683C
1933 #define	BGE_EE_CTL			0x6840
1934 #define	BGE_MDI_CTL			0x6844
1935 #define	BGE_EE_DELAY			0x6848
1936 #define	BGE_FASTBOOT_PC			0x6894
1938 #define	BGE_RX_CPU_DRV_EVENT		0x00004000
1943 #define	BGE_NVRAM_CMD			0x7000
1944 #define	BGE_NVRAM_STAT			0x7004
1945 #define	BGE_NVRAM_WRDATA		0x7008
1946 #define	BGE_NVRAM_ADDR			0x700c
1947 #define	BGE_NVRAM_RDDATA		0x7010
1948 #define	BGE_NVRAM_CFG1			0x7014
1949 #define	BGE_NVRAM_CFG2			0x7018
1950 #define	BGE_NVRAM_CFG3			0x701c
1951 #define	BGE_NVRAM_SWARB			0x7020
1952 #define	BGE_NVRAM_ACCESS		0x7024
1953 #define	BGE_NVRAM_WRITE1		0x7028
1955 #define	BGE_NVRAMCMD_RESET		0x00000001
1956 #define	BGE_NVRAMCMD_DONE		0x00000008
1957 #define	BGE_NVRAMCMD_START		0x00000010
1958 #define	BGE_NVRAMCMD_WR			0x00000020 /* 1 = wr, 0 = rd */
1959 #define	BGE_NVRAMCMD_ERASE		0x00000040
1960 #define	BGE_NVRAMCMD_FIRST		0x00000080
1961 #define	BGE_NVRAMCMD_LAST		0x00000100
1970 #define	BGE_NVRAMSWARB_SET0		0x00000001
1971 #define	BGE_NVRAMSWARB_SET1		0x00000002
1972 #define	BGE_NVRAMSWARB_SET2		0x00000003
1973 #define	BGE_NVRAMSWARB_SET3		0x00000004
1974 #define	BGE_NVRAMSWARB_CLR0		0x00000010
1975 #define	BGE_NVRAMSWARB_CLR1		0x00000020
1976 #define	BGE_NVRAMSWARB_CLR2		0x00000040
1977 #define	BGE_NVRAMSWARB_CLR3		0x00000080
1978 #define	BGE_NVRAMSWARB_GNT0		0x00000100
1979 #define	BGE_NVRAMSWARB_GNT1		0x00000200
1980 #define	BGE_NVRAMSWARB_GNT2		0x00000400
1981 #define	BGE_NVRAMSWARB_GNT3		0x00000800
1982 #define	BGE_NVRAMSWARB_REQ0		0x00001000
1983 #define	BGE_NVRAMSWARB_REQ1		0x00002000
1984 #define	BGE_NVRAMSWARB_REQ2		0x00004000
1985 #define	BGE_NVRAMSWARB_REQ3		0x00008000
1987 #define	BGE_NVRAMACC_ENABLE		0x00000001
1988 #define	BGE_NVRAMACC_WRENABLE		0x00000002
1991 #define	BGE_MODECTL_INT_SNDCOAL_ONLY	0x00000001
1992 #define	BGE_MODECTL_BYTESWAP_NONFRAME	0x00000002
1993 #define	BGE_MODECTL_WORDSWAP_NONFRAME	0x00000004
1994 #define	BGE_MODECTL_BYTESWAP_DATA	0x00000010
1995 #define	BGE_MODECTL_WORDSWAP_DATA	0x00000020
1996 #define	BGE_MODECTL_BYTESWAP_B2HRX_DATA	0x00000040
1997 #define	BGE_MODECTL_WORDSWAP_B2HRX_DATA	0x00000080
1998 #define	BGE_MODECTL_NO_FRAME_CRACKING	0x00000200
1999 #define	BGE_MODECTL_NO_RX_CRC		0x00000400
2000 #define	BGE_MODECTL_RX_BADFRAMES	0x00000800
2001 #define	BGE_MODECTL_NO_TX_INTR		0x00002000
2002 #define	BGE_MODECTL_NO_RX_INTR		0x00004000
2003 #define	BGE_MODECTL_FORCE_PCI32		0x00008000
2004 #define	BGE_MODECTL_B2HRX_ENABLE	0x00008000
2005 #define	BGE_MODECTL_STACKUP		0x00010000
2006 #define	BGE_MODECTL_HOST_SEND_BDS	0x00020000
2007 #define	BGE_MODECTL_HTX2B_ENABLE	0x00040000
2008 #define	BGE_MODECTL_TX_NO_PHDR_CSUM	0x00100000
2009 #define	BGE_MODECTL_RX_NO_PHDR_CSUM	0x00800000
2010 #define	BGE_MODECTL_TX_ATTN_INTR	0x01000000
2011 #define	BGE_MODECTL_RX_ATTN_INTR	0x02000000
2012 #define	BGE_MODECTL_MAC_ATTN_INTR	0x04000000
2013 #define	BGE_MODECTL_DMA_ATTN_INTR	0x08000000
2014 #define	BGE_MODECTL_FLOWCTL_ATTN_INTR	0x10000000
2015 #define	BGE_MODECTL_4X_SENDRING_SZ	0x20000000
2016 #define	BGE_MODECTL_FW_PROCESS_MCASTS	0x40000000
2019 #define	BGE_MISCCFG_RESET_CORE_CLOCKS	0x00000001
2020 #define	BGE_MISCCFG_TIMER_PRESCALER	0x000000FE
2021 #define	BGE_MISCCFG_BOARD_ID_MASK	0x0001E000
2022 #define	BGE_MISCCFG_BOARD_ID_5704	0x00000000
2023 #define	BGE_MISCCFG_BOARD_ID_5704CIOBE	0x00004000
2024 #define	BGE_MISCCFG_BOARD_ID_5788	0x00010000
2025 #define	BGE_MISCCFG_BOARD_ID_5788M	0x00018000
2026 #define	BGE_MISCCFG_EPHY_IDDQ		0x00200000
2027 #define	BGE_MISCCFG_GPHY_PD_OVERRIDE	0x04000000
2029 #define	BGE_32BITTIME_66MHZ		(0x41 << 1)
2032 #define	BGE_MLC_INTR_STATE		0x00000001
2033 #define	BGE_MLC_INTR_CLR		0x00000002
2034 #define	BGE_MLC_INTR_SET		0x00000004
2035 #define	BGE_MLC_INTR_ONATTN		0x00000008
2036 #define	BGE_MLC_MISCIO_IN0		0x00000100
2037 #define	BGE_MLC_MISCIO_IN1		0x00000200
2038 #define	BGE_MLC_MISCIO_IN2		0x00000400
2039 #define	BGE_MLC_MISCIO_OUTEN0		0x00000800
2040 #define	BGE_MLC_MISCIO_OUTEN1		0x00001000
2041 #define	BGE_MLC_MISCIO_OUTEN2		0x00002000
2042 #define	BGE_MLC_MISCIO_OUT0		0x00004000
2043 #define	BGE_MLC_MISCIO_OUT1		0x00008000
2044 #define	BGE_MLC_MISCIO_OUT2		0x00010000
2045 #define	BGE_MLC_EXTRAM_ENB		0x00020000
2046 #define	BGE_MLC_SRAM_SIZE		0x001C0000
2047 #define	BGE_MLC_BANK_SEL		0x00200000 /* 0 = 2 banks, 1 == 1 */
2048 #define	BGE_MLC_SSRAM_TYPE		0x00400000 /* 1 = ZBT, 0 = standard */
2049 #define	BGE_MLC_SSRAM_CYC_DESEL		0x00800000
2050 #define	BGE_MLC_AUTO_EEPROM		0x01000000
2052 #define	BGE_SSRAMSIZE_256KB		0x00000000
2053 #define	BGE_SSRAMSIZE_512KB		0x00040000
2054 #define	BGE_SSRAMSIZE_1MB		0x00080000
2055 #define	BGE_SSRAMSIZE_2MB		0x000C0000
2056 #define	BGE_SSRAMSIZE_4MB		0x00100000
2057 #define	BGE_SSRAMSIZE_8MB		0x00140000
2058 #define	BGE_SSRAMSIZE_16M		0x00180000
2061 #define	BGE_EEADDR_ADDRESS		0x0000FFFC
2062 #define	BGE_EEADDR_HALFCLK		0x01FF0000
2063 #define	BGE_EEADDR_START		0x02000000
2064 #define	BGE_EEADDR_DEVID		0x1C000000
2065 #define	BGE_EEADDR_RESET		0x20000000
2066 #define	BGE_EEADDR_DONE			0x40000000
2067 #define	BGE_EEADDR_RW			0x80000000 /* 1 = rd, 0 = wr */
2070 #define	BGE_EEHALFCLK(x)		((x & 0x1FF) << 16)
2071 #define	BGE_HALFCLK_384SCL		0x60
2073 	(BGE_EEHALFCLK(BGE_HALFCLK_384SCL)|BGE_EEDEVID(0)|	\
2076 	(BGE_EEHALFCLK(BGE_HALFCLK_384SCL)|BGE_EEDEVID(0)|	\
2080 #define	BGE_EECTL_CLKOUT_TRISTATE	0x00000001
2081 #define	BGE_EECTL_CLKOUT		0x00000002
2082 #define	BGE_EECTL_CLKIN			0x00000004
2083 #define	BGE_EECTL_DATAOUT_TRISTATE	0x00000008
2084 #define	BGE_EECTL_DATAOUT		0x00000010
2085 #define	BGE_EECTL_DATAIN		0x00000020
2088 #define	BGE_MDI_DATA			0x00000001
2089 #define	BGE_MDI_DIR			0x00000002
2090 #define	BGE_MDI_SEL			0x00000004
2091 #define	BGE_MDI_CLK			0x00000008
2093 #define	BGE_MEMWIN_START		0x00008000
2094 #define	BGE_MEMWIN_END			0x0000FFFF
2098 #define	BGE_APE_GPIO_MSG		0x0008
2099 #define	BGE_APE_EVENT			0x000C
2100 #define	BGE_APE_LOCK_REQ		0x002C
2101 #define	BGE_APE_LOCK_GRANT		0x004C
2105 #define	BGE_APE_EVENT_1			0x00000001
2107 #define	BGE_APE_LOCK_REQ_DRIVER0	0x00001000
2109 #define	BGE_APE_LOCK_GRANT_DRIVER0	0x00001000
2112 #define	BGE_APE_SEG_SIG			0x4000
2113 #define	BGE_APE_FW_STATUS		0x400C
2114 #define	BGE_APE_FW_FEATURES		0x4010
2115 #define	BGE_APE_FW_BEHAVIOR		0x4014
2116 #define	BGE_APE_FW_VERSION		0x4018
2117 #define	BGE_APE_FW_HEARTBEAT_INTERVAL	0x4024
2118 #define	BGE_APE_FW_HEARTBEAT		0x4028
2119 #define	BGE_APE_FW_ERROR_FLAGS		0x4074
2121 #define	BGE_APE_SEG_SIG_MAGIC		0x41504521
2123 #define	BGE_APE_FW_STATUS_READY		0x00000100
2125 #define	BGE_APE_FW_FEATURE_DASH		0x00000001
2126 #define	BGE_APE_FW_FEATURE_NCSI		0x00000002
2128 #define	BGE_APE_FW_VERSION_MAJMSK	0xFF000000
2130 #define	BGE_APE_FW_VERSION_MINMSK	0x00FF0000
2132 #define	BGE_APE_FW_VERSION_REVMSK	0x0000FF00
2134 #define	BGE_APE_FW_VERSION_BLDMSK	0x000000FF
2137 #define	BGE_APE_HOST_SEG_SIG		0x4200
2138 #define	BGE_APE_HOST_SEG_LEN		0x4204
2139 #define	BGE_APE_HOST_INIT_COUNT		0x4208
2140 #define	BGE_APE_HOST_DRIVER_ID		0x420C
2141 #define	BGE_APE_HOST_BEHAVIOR		0x4210
2142 #define	BGE_APE_HOST_HEARTBEAT_INT_MS	0x4214
2143 #define	BGE_APE_HOST_HEARTBEAT_COUNT	0x4218
2144 #define	BGE_APE_HOST_DRVR_STATE		0x421C
2145 #define	BGE_APE_HOST_WOL_SPEED		0x4224
2147 #define	BGE_APE_HOST_SEG_SIG_MAGIC	0x484F5354
2149 #define	BGE_APE_HOST_SEG_LEN_MAGIC	0x00000020
2151 #define	BGE_APE_HOST_DRIVER_ID_FBSD	0xF6000000
2154 	((maj) & 0xffd) << 16 | ((min) & 0xff) << 8)
2156 #define	BGE_APE_HOST_BEHAV_NO_PHYLOCK	0x00000001
2158 #define	BGE_APE_HOST_HEARTBEAT_INT_DISABLE	0
2161 #define	BGE_APE_HOST_DRVR_STATE_START	0x00000001
2162 #define	BGE_APE_HOST_DRVR_STATE_UNLOAD	0x00000002
2163 #define	BGE_APE_HOST_DRVR_STATE_WOL	0x00000003
2164 #define	BGE_APE_HOST_DRVR_STATE_SUSPEND	0x00000004
2166 #define	BGE_APE_HOST_WOL_SPEED_AUTO	0x00008000
2168 #define	BGE_APE_EVENT_STATUS		0x4300
2170 #define	BGE_APE_EVENT_STATUS_DRIVER_EVNT	0x00000010
2171 #define	BGE_APE_EVENT_STATUS_STATE_CHNGE	0x00000500
2172 #define	BGE_APE_EVENT_STATUS_STATE_START	0x00010000
2173 #define	BGE_APE_EVENT_STATUS_STATE_UNLOAD	0x00020000
2174 #define	BGE_APE_EVENT_STATUS_STATE_WOL		0x00030000
2175 #define	BGE_APE_EVENT_STATUS_STATE_SUSPEND	0x00040000
2176 #define	BGE_APE_EVENT_STATUS_EVENT_PENDING	0x80000000
2178 #define	BGE_APE_DEBUG_LOG		0x4E00
2179 #define	BGE_APE_DEBUG_LOG_LEN		0x0100
2181 #define	BGE_APE_PER_LOCK_REQ		0x8400
2182 #define	BGE_APE_PER_LOCK_GRANT		0x8420
2184 #define	BGE_APE_LOCK_PER_REQ_DRIVER0	0x00001000
2185 #define	BGE_APE_LOCK_PER_REQ_DRIVER1	0x00000002
2186 #define	BGE_APE_LOCK_PER_REQ_DRIVER2	0x00000004
2187 #define	BGE_APE_LOCK_PER_REQ_DRIVER3	0x00000008
2189 #define	BGE_APE_PER_LOCK_GRANT_DRIVER0	0x00001000
2190 #define	BGE_APE_PER_LOCK_GRANT_DRIVER1	0x00000002
2191 #define	BGE_APE_PER_LOCK_GRANT_DRIVER2	0x00000004
2192 #define	BGE_APE_PER_LOCK_GRANT_DRIVER3	0x00000008
2195 #define	BGE_APE_LOCK_PHY0		0
2206 		    (0xFFFF0000 & x), 4);				\
2207 		val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF));	\
2208 	} while(0)
2213 		    (0xFFFF0000 & x), 4);				\
2214 		CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val);	\
2215 	} while(0)
2218  * This magic number is written to the firmware mailbox at 0xb50
2224 #define	BGE_SRAM_FW_MB_MAGIC	0x4B657654
2233 		(x).bge_addr_lo = ((uint64_t) (y) & 0xffffffff);	\
2235 	} while(0)
2238 	((uint64_t) (y) & 0xFFFFFFFF)
2253 #define	BGE_RCB_FLAG_USE_EXT_RX_BD	0x0001
2254 #define	BGE_RCB_FLAG_RING_DISABLED	0x0002
2271 #define	BGE_TXBDFLAG_TCP_UDP_CSUM	0x0001
2272 #define	BGE_TXBDFLAG_IP_CSUM		0x0002
2273 #define	BGE_TXBDFLAG_END		0x0004
2274 #define	BGE_TXBDFLAG_IP_FRAG		0x0008
2275 #define	BGE_TXBDFLAG_JUMBO_FRAME	0x0008	/* 5717 */
2276 #define	BGE_TXBDFLAG_IP_FRAG_END	0x0010
2277 #define	BGE_TXBDFLAG_HDRLEN_BIT2	0x0010	/* 5717 */
2278 #define	BGE_TXBDFLAG_SNAP		0x0020	/* 5717 */
2279 #define	BGE_TXBDFLAG_VLAN_TAG		0x0040
2280 #define	BGE_TXBDFLAG_COAL_NOW		0x0080
2281 #define	BGE_TXBDFLAG_CPU_PRE_DMA	0x0100
2282 #define	BGE_TXBDFLAG_CPU_POST_DMA	0x0200
2283 #define	BGE_TXBDFLAG_HDRLEN_BIT3	0x0400	/* 5717 */
2284 #define	BGE_TXBDFLAG_HDRLEN_BIT4	0x0800	/* 5717 */
2285 #define	BGE_TXBDFLAG_INSERT_SRC_ADDR	0x1000
2286 #define	BGE_TXBDFLAG_HDRLEN_BIT5	0x1000	/* 5717 */
2287 #define	BGE_TXBDFLAG_HDRLEN_BIT6	0x2000	/* 5717 */
2288 #define	BGE_TXBDFLAG_HDRLEN_BIT7	0x4000	/* 5717 */
2289 #define	BGE_TXBDFLAG_CHOOSE_SRC_ADDR	0x6000
2290 #define	BGE_TXBDFLAG_NO_CRC		0x8000
2292 #define	BGE_TXBDFLAG_MSS_SIZE_MASK	0x3FFF	/* 5717 */
2293 /* Bits [1:0] of the MSS header length. */
2294 #define	BGE_TXBDFLAG_MSS_HDRLEN_MASK	0xC000	/* 5717 */
2364 #define	BGE_RXBDFLAG_END		0x0004
2365 #define	BGE_RXBDFLAG_JUMBO_RING		0x0020
2366 #define	BGE_RXBDFLAG_VLAN_TAG		0x0040
2367 #define	BGE_RXBDFLAG_ERROR		0x0400
2368 #define	BGE_RXBDFLAG_MINI_RING		0x0800
2369 #define	BGE_RXBDFLAG_IP_CSUM		0x1000
2370 #define	BGE_RXBDFLAG_TCP_UDP_CSUM	0x2000
2371 #define	BGE_RXBDFLAG_TCP_UDP_IS_TCP	0x4000
2372 #define	BGE_RXBDFLAG_IPV6		0x8000
2374 #define	BGE_RXERRFLAG_BAD_CRC		0x0001
2375 #define	BGE_RXERRFLAG_COLL_DETECT	0x0002
2376 #define	BGE_RXERRFLAG_LINK_LOST		0x0004
2377 #define	BGE_RXERRFLAG_PHY_DECODE_ERR	0x0008
2378 #define	BGE_RXERRFLAG_MAC_ABORT		0x0010
2379 #define	BGE_RXERRFLAG_RUNT		0x0020
2380 #define	BGE_RXERRFLAG_TRUNC_NO_RSRCS	0x0040
2381 #define	BGE_RXERRFLAG_GIANT		0x0080
2382 #define	BGE_RXERRFLAG_IP_CSUM_NOK	0x1000	/* 5717 */
2411 #define	BGE_STATFLAG_UPDATED		0x00000001
2412 #define	BGE_STATFLAG_LINKSTATE_CHANGED	0x00000002
2413 #define	BGE_STATFLAG_ERROR		0x00000004
2420 #define	BCOM_VENDORID			0x14E4
2421 #define	BCOM_DEVICEID_BCM5700		0x1644
2422 #define	BCOM_DEVICEID_BCM5701		0x1645
2423 #define	BCOM_DEVICEID_BCM5702		0x1646
2424 #define	BCOM_DEVICEID_BCM5702X		0x16A6
2425 #define	BCOM_DEVICEID_BCM5702_ALT	0x16C6
2426 #define	BCOM_DEVICEID_BCM5703		0x1647
2427 #define	BCOM_DEVICEID_BCM5703X		0x16A7
2428 #define	BCOM_DEVICEID_BCM5703_ALT	0x16C7
2429 #define	BCOM_DEVICEID_BCM5704C		0x1648
2430 #define	BCOM_DEVICEID_BCM5704S		0x16A8
2431 #define	BCOM_DEVICEID_BCM5704S_ALT	0x1649
2432 #define	BCOM_DEVICEID_BCM5705		0x1653
2433 #define	BCOM_DEVICEID_BCM5705K		0x1654
2434 #define	BCOM_DEVICEID_BCM5705F		0x166E
2435 #define	BCOM_DEVICEID_BCM5705M		0x165D
2436 #define	BCOM_DEVICEID_BCM5705M_ALT	0x165E
2437 #define	BCOM_DEVICEID_BCM5714C		0x1668
2438 #define	BCOM_DEVICEID_BCM5714S		0x1669
2439 #define	BCOM_DEVICEID_BCM5715		0x1678
2440 #define	BCOM_DEVICEID_BCM5715S		0x1679
2441 #define	BCOM_DEVICEID_BCM5717		0x1655
2442 #define	BCOM_DEVICEID_BCM5717C		0x1665
2443 #define	BCOM_DEVICEID_BCM5718		0x1656
2444 #define	BCOM_DEVICEID_BCM5719		0x1657
2445 #define	BCOM_DEVICEID_BCM5720_PP	0x1658	/* Not released to public. */
2446 #define	BCOM_DEVICEID_BCM5720		0x165F
2447 #define	BCOM_DEVICEID_BCM5721		0x1659
2448 #define	BCOM_DEVICEID_BCM5722		0x165A
2449 #define	BCOM_DEVICEID_BCM5723		0x165B
2450 #define	BCOM_DEVICEID_BCM5725		0x1643
2451 #define	BCOM_DEVICEID_BCM5727		0x16F3
2452 #define	BCOM_DEVICEID_BCM5750		0x1676
2453 #define	BCOM_DEVICEID_BCM5750M		0x167C
2454 #define	BCOM_DEVICEID_BCM5751		0x1677
2455 #define	BCOM_DEVICEID_BCM5751F		0x167E
2456 #define	BCOM_DEVICEID_BCM5751M		0x167D
2457 #define	BCOM_DEVICEID_BCM5752		0x1600
2458 #define	BCOM_DEVICEID_BCM5752M		0x1601
2459 #define	BCOM_DEVICEID_BCM5753		0x16F7
2460 #define	BCOM_DEVICEID_BCM5753F		0x16FE
2461 #define	BCOM_DEVICEID_BCM5753M		0x16FD
2462 #define	BCOM_DEVICEID_BCM5754		0x167A
2463 #define	BCOM_DEVICEID_BCM5754M		0x1672
2464 #define	BCOM_DEVICEID_BCM5755		0x167B
2465 #define	BCOM_DEVICEID_BCM5755M		0x1673
2466 #define	BCOM_DEVICEID_BCM5756		0x1674
2467 #define	BCOM_DEVICEID_BCM5761		0x1681
2468 #define	BCOM_DEVICEID_BCM5761E		0x1680
2469 #define	BCOM_DEVICEID_BCM5761S		0x1688
2470 #define	BCOM_DEVICEID_BCM5761SE		0x1689
2471 #define	BCOM_DEVICEID_BCM5762		0x1687
2472 #define	BCOM_DEVICEID_BCM5764		0x1684
2473 #define	BCOM_DEVICEID_BCM5780		0x166A
2474 #define	BCOM_DEVICEID_BCM5780S		0x166B
2475 #define	BCOM_DEVICEID_BCM5781		0x16DD
2476 #define	BCOM_DEVICEID_BCM5782		0x1696
2477 #define	BCOM_DEVICEID_BCM5784		0x1698
2478 #define	BCOM_DEVICEID_BCM5785F		0x16a0
2479 #define	BCOM_DEVICEID_BCM5785G		0x1699
2480 #define	BCOM_DEVICEID_BCM5786		0x169A
2481 #define	BCOM_DEVICEID_BCM5787		0x169B
2482 #define	BCOM_DEVICEID_BCM5787M		0x1693
2483 #define	BCOM_DEVICEID_BCM5787F		0x167f
2484 #define	BCOM_DEVICEID_BCM5788		0x169C
2485 #define	BCOM_DEVICEID_BCM5789		0x169D
2486 #define	BCOM_DEVICEID_BCM5901		0x170D
2487 #define	BCOM_DEVICEID_BCM5901A2		0x170E
2488 #define	BCOM_DEVICEID_BCM5903M		0x16FF
2489 #define	BCOM_DEVICEID_BCM5906		0x1712
2490 #define	BCOM_DEVICEID_BCM5906M		0x1713
2491 #define	BCOM_DEVICEID_BCM57760		0x1690
2492 #define	BCOM_DEVICEID_BCM57761		0x16B0
2493 #define	BCOM_DEVICEID_BCM57762		0x1682
2494 #define	BCOM_DEVICEID_BCM57764		0x1642
2495 #define	BCOM_DEVICEID_BCM57765		0x16B4
2496 #define	BCOM_DEVICEID_BCM57766		0x1686
2497 #define	BCOM_DEVICEID_BCM57767		0x1683
2498 #define	BCOM_DEVICEID_BCM57780		0x1692
2499 #define	BCOM_DEVICEID_BCM57781		0x16B1
2500 #define	BCOM_DEVICEID_BCM57782		0x16B7
2501 #define	BCOM_DEVICEID_BCM57785		0x16B5
2502 #define	BCOM_DEVICEID_BCM57786		0x16B3
2503 #define	BCOM_DEVICEID_BCM57787		0x1641
2504 #define	BCOM_DEVICEID_BCM57788		0x1691
2505 #define	BCOM_DEVICEID_BCM57790		0x1694
2506 #define	BCOM_DEVICEID_BCM57791		0x16B2
2507 #define	BCOM_DEVICEID_BCM57795		0x16B6
2512 #define	ALTEON_VENDORID			0x12AE
2513 #define	ALTEON_DEVICEID_ACENIC		0x0001
2514 #define	ALTEON_DEVICEID_ACENIC_COPPER	0x0002
2515 #define	ALTEON_DEVICEID_BCM5700		0x0003
2516 #define	ALTEON_DEVICEID_BCM5701		0x0004
2521 #define	TC_VENDORID			0x10B7
2522 #define	TC_DEVICEID_3C996		0x0003
2527 #define	SK_VENDORID			0x1148
2528 #define	SK_DEVICEID_ALTIMA		0x4400
2529 #define	SK_SUBSYSID_9D21		0x4421
2530 #define	SK_SUBSYSID_9D41		0x4441
2535 #define	ALTIMA_VENDORID			0x173b
2536 #define	ALTIMA_DEVICE_AC1000		0x03e8
2537 #define	ALTIMA_DEVICE_AC1002		0x03e9
2538 #define	ALTIMA_DEVICE_AC9100		0x03ea
2544 #define	DELL_VENDORID			0x1028
2549 #define	APPLE_VENDORID			0x106b
2550 #define	APPLE_DEVICE_BCM5701		0x1645
2555 #define	FJTSU_VENDORID			0x10cf
2556 #define	FJTSU_DEVICEID_PW008GE5		0x11a1
2557 #define	FJTSU_DEVICEID_PW008GE4		0x11a2
2562 #define	BGE_EE_MAC_OFFSET		0x7C
2563 #define	BGE_EE_MAC_OFFSET_5906		0x10
2564 #define	BGE_EE_HWCFG_OFFSET		0xC8
2566 #define	BGE_HWCFG_VOLTAGE		0x00000003
2567 #define	BGE_HWCFG_PHYLED_MODE		0x0000000C
2568 #define	BGE_HWCFG_MEDIA			0x00000030
2569 #define	BGE_HWCFG_ASF			0x00000080
2571 #define	BGE_VOLTAGE_1POINT3		0x00000000
2572 #define	BGE_VOLTAGE_1POINT8		0x00000001
2574 #define	BGE_PHYLEDMODE_UNSPEC		0x00000000
2575 #define	BGE_PHYLEDMODE_TRIPLELED	0x00000004
2576 #define	BGE_PHYLEDMODE_SINGLELED	0x00000008
2578 #define	BGE_MEDIA_UNSPEC		0x00000000
2579 #define	BGE_MEDIA_COPPER		0x00000010
2580 #define	BGE_MEDIA_FIBER			0x00000020
2602 #define	BGE_TX_RING_BASE_128	0x3800
2605 #define	BGE_TX_RING_BASE_256	0x3000
2608 #define	BGE_TX_RING_BASE_512	0x2000
2840 #if (BUS_SPACE_MAXADDR < 0xFFFFFFFFFF)
2843 #define	BGE_DMA_MAXADDR		0xFFFFFFFFFF
2846 #if (BUS_SPACE_MAXSIZE > 0xFFFFFFFF)
2847 #define	BGE_DMA_BNDRY		0x100000000
2849 #define	BGE_DMA_BNDRY		0
2927 #define	BGE_HWREV_TIGON		0x01
2928 #define	BGE_HWREV_TIGON_II	0x02
2930 #define	BGE_TXCONS_UNSET		0xFFFF	/* impossible value */
2957 #define	BGE_FLAG_TBI		0x00000001
2958 #define	BGE_FLAG_JUMBO		0x00000002
2959 #define	BGE_FLAG_JUMBO_STD	0x00000004
2960 #define	BGE_FLAG_EADDR		0x00000008
2961 #define	BGE_FLAG_MII_SERDES	0x00000010
2962 #define	BGE_FLAG_CPMU_PRESENT	0x00000020
2963 #define	BGE_FLAG_TAGGED_STATUS	0x00000040
2964 #define	BGE_FLAG_APE		0x00000080
2965 #define	BGE_FLAG_MSI		0x00000100
2966 #define	BGE_FLAG_PCIX		0x00000200
2967 #define	BGE_FLAG_PCIE		0x00000400
2968 #define	BGE_FLAG_TSO		0x00000800
2969 #define	BGE_FLAG_TSO3		0x00001000
2970 #define	BGE_FLAG_JUMBO_FRAME	0x00002000
2971 #define	BGE_FLAG_5700_FAMILY	0x00010000
2972 #define	BGE_FLAG_5705_PLUS	0x00020000
2973 #define	BGE_FLAG_5714_FAMILY	0x00040000
2974 #define	BGE_FLAG_575X_PLUS	0x00080000
2975 #define	BGE_FLAG_5755_PLUS	0x00100000
2976 #define	BGE_FLAG_5788		0x00200000
2977 #define	BGE_FLAG_5717_PLUS	0x00400000
2978 #define	BGE_FLAG_57765_PLUS	0x00800000
2979 #define	BGE_FLAG_40BIT_BUG	0x01000000
2980 #define	BGE_FLAG_4G_BNDRY_BUG	0x02000000
2981 #define	BGE_FLAG_RX_ALIGNBUG	0x04000000
2982 #define	BGE_FLAG_SHORT_DMA_BUG	0x08000000
2983 #define	BGE_FLAG_4K_RDMA_BUG	0x10000000
2984 #define	BGE_FLAG_MBOX_REORDER	0x20000000
2985 #define	BGE_FLAG_RDMA_BUG	0x40000000
2987 #define	BGE_MFW_ON_RXCPU	0x00000001
2988 #define	BGE_MFW_ON_APE		0x00000002
2989 #define	BGE_MFW_TYPE_NCSI	0x00000004
2990 #define	BGE_MFW_TYPE_DASH	0x00000008
2995 #define	BGE_PHY_NO_WIRESPEED	0x00000001
2996 #define	BGE_PHY_ADC_BUG		0x00000002
2997 #define	BGE_PHY_5704_A0_BUG	0x00000004
2998 #define	BGE_PHY_JITTER_BUG	0x00000008
2999 #define	BGE_PHY_BER_BUG		0x00000010
3000 #define	BGE_PHY_ADJUST_TRIM	0x00000020
3001 #define	BGE_PHY_CRC_BUG		0x00000040
3002 #define	BGE_PHY_NO_3LED		0x00000080