| /freebsd/sys/dev/sis/ |
| H A D | if_sisreg.h | 45 #define SIS_CSR 0x00
46 #define SIS_CFG 0x04
47 #define SIS_EECTL 0x08
48 #define SIS_PCICTL 0x0C
49 #define SIS_ISR 0x10
50 #define SIS_IMR 0x14
51 #define SIS_IER 0x18
52 #define SIS_PHYCTL 0x1C
53 #define SIS_TX_LISTPTR 0x20
54 #define SIS_TX_CFG 0x24
[all …]
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| /freebsd/sys/dev/cxgbe/firmware/ |
| H A D | t5fw_cfg_hashfilter.txt | 23 reg[0x1124] = 0x00000400/0x00000400 # SGE_CONTROL2, enable VFIFO; if
28 reg[0x1130] = 0x00d5ffeb # SGE_DBP_FETCH_THRESHOLD, fetch
31 # queues, and 0xfff for LP which
36 reg[0x113c] = 0x0002ffc0 # SGE_VFIFO_SIZE, set to 0x2ffc0 which
42 reg[0x7d04] = 0x00010000/0x00010000
45 reg[0x7d6c] = 0x00000000/0x00007000
48 reg[0x7d78] = 0x00000400/0x00000000
50 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
58 # TP number of RX channels (0 = auto)
59 tp_nrxch = 0
[all …]
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| H A D | t5fw_cfg.txt | 23 reg[0x1124] = 0x00000400/0x00000400 # SGE_CONTROL2, enable VFIFO; if
28 reg[0x1130] = 0x00d5ffeb # SGE_DBP_FETCH_THRESHOLD, fetch
31 # queues, and 0xfff for LP which
36 reg[0x113c] = 0x0002ffc0 # SGE_VFIFO_SIZE, set to 0x2ffc0 which
42 reg[0x7d04] = 0x00010000/0x00010000
45 reg[0x7d6c] = 0x00000000/0x00007000
48 reg[0x7d78] = 0x00000400/0x00000000
50 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
58 # TP number of RX channels (0 = auto)
59 tp_nrxch = 0
[all …]
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| /freebsd/sys/dev/et/ |
| H A D | if_etreg.h | 57 #define ET_PCIR_DEVICE_CAPS 0x4C
58 #define ET_PCIM_DEVICE_CAPS_MAX_PLSZ 0x7 /* Max playload size */
59 #define ET_PCIV_DEVICE_CAPS_PLSZ_128 0x0
60 #define ET_PCIV_DEVICE_CAPS_PLSZ_256 0x1
62 #define ET_PCIR_DEVICE_CTRL 0x50
63 #define ET_PCIM_DEVICE_CTRL_MAX_RRSZ 0x7000 /* Max read request size */
64 #define ET_PCIV_DEVICE_CTRL_RRSZ_2K 0x4000
66 #define ET_PCIR_MAC_ADDR0 0xA4
67 #define ET_PCIR_MAC_ADDR1 0xA8
69 #define ET_PCIR_EEPROM_STATUS 0xB2 /* XXX undocumented */
[all …]
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| /freebsd/sys/dev/lge/ |
| H A D | if_lgereg.h | 37 #define LGE_MODE1 0x00 /* CSR00 */
38 #define LGE_MODE2 0x04 /* CSR01 */
39 #define LGE_PPTXBUF_IDX 0x08 /* CSR02 */
40 #define LGE_PRODID 0x0C /* CSR03 */
41 #define LGE_PPTXBUF_ADDR_LO 0x10 /* CSR04 */
42 #define LGE_PPTXBUF_ADDR_HI 0x14 /* CSR05 */
43 #define LGE_RSVD0 0x18 /* CSR06 */
44 #define LGE_PPRXBUF_IDX 0x1C /* CSR07 */
45 #define LGE_PPRXBUF_ADDR_LO 0x20 /* CSR08 */
46 #define LGE_PPRXBUF_ADDR_HI 0x24 /* CSR09 */
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | altera_tse.txt | 41 - #size-cells: Must be <0>.
56 reg = <0x00000001 0x00000000 0x00000400>,
57 <0x00000001 0x00000460 0x00000020>,
58 <0x00000001 0x00000480 0x00000020>,
59 <0x00000001 0x000004A0 0x00000008>,
60 <0x00000001 0x00000400 0x00000020>,
61 <0x00000001 0x00000420 0x00000020>;
64 interrupts = <0 41 4>, <0 40 4>;
78 #size-cells = <0>;
79 phy0: ethernet-phy@0 {
[all …]
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| H A D | altr,tse.yaml | 116 reg = <0xc0100000 0x00000400>,
117 <0xc0101000 0x00000020>,
118 <0xc0102000 0x00000020>,
119 <0xc0103000 0x00000008>,
120 <0xc0104000 0x00000020>,
121 <0xc0105000 0x00000020>,
122 <0xc0106000 0x00000100>;
125 interrupts = <0 44 4>,<0 45 4>;
140 reg = <0x00001000 0x00000400>,
141 <0x00001460 0x00000020>,
[all …]
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| /freebsd/sys/contrib/device-tree/src/nios2/ |
| H A D | 3c120_devboard.dts | 18 #size-cells = <0>;
20 cpu: cpu@0 {
23 reg = <0x00000000>;
38 altr,reset-addr = <0xc2800000>;
39 altr,fast-tlb-miss-addr = <0xc7fff400>;
40 altr,exception-addr = <0xd0000020>;
46 memory@0 {
48 reg = <0x10000000 0x08000000>,
49 <0x07fff400 0x00000400>;
52 sopc@0 {
[all …]
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| H A D | 10m50_devboard.dts | 16 #size-cells = <0>;
18 cpu: cpu@0 {
21 reg = <0x00000000>;
24 altr,exception-addr = <0xc8000120>;
25 altr,fast-tlb-miss-addr = <0xc0000100>;
32 altr,reset-addr = <0xd4000000>;
46 reg = <0x08000000 0x08000000>,
47 <0x00000000 0x00000400>;
50 sopc0: sopc@0 {
60 reg = <0x18001530 0x00000008>;
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am64.dtsi | 54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x0042000
[all...] |
| /freebsd/sys/dev/dc/ |
| H A D | if_dcreg.h | 39 #define DC_BUSCTL 0x00 /* bus control */
40 #define DC_TXSTART 0x08 /* tx start demand */
41 #define DC_RXSTART 0x10 /* rx start demand */
42 #define DC_RXADDR 0x18 /* rx descriptor list start addr */
43 #define DC_TXADDR 0x20 /* tx descriptor list start addr */
44 #define DC_ISR 0x28 /* interrupt status register */
45 #define DC_NETCFG 0x30 /* network config register */
46 #define DC_IMR 0x38 /* interrupt mask */
47 #define DC_FRAMESDISCARDED 0x40 /* # of discarded frames */
48 #define DC_SIO 0x48 /* MII and ROM/EEPROM access */
[all …]
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| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | cpuid.h | 3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 /* Responses identification request with %eax 0 */
19 #define signature_AMD_ebx 0x68747541
20 #define signature_AMD_edx 0x69746e65
21 #define signature_AMD_ecx 0x444d4163
23 #define signature_CENTAUR_ebx 0x746e6543
24 #define signature_CENTAUR_edx 0x48727561
25 #define signature_CENTAUR_ecx 0x736c7561
27 #define signature_CYRIX_ebx 0x69727943
28 #define signature_CYRIX_edx 0x736e4978
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| /freebsd/sys/dev/jme/ |
| H A D | if_jmereg.h | 36 #define VENDORID_JMICRON 0x197B
41 #define DEVICEID_JMC250 0x0250
42 #define DEVICEREVID_JMC250_A0 0x00
43 #define DEVICEREVID_JMC250_A2 0x11
48 #define DEVICEID_JMC260 0x0260
49 #define DEVICEREVID_JMC260_A0 0x00
51 #define DEVICEID_JMC2XX_MASK 0x0FF0
54 #define JME_PCI_BAR0 0x10 /* 16KB memory window. */
56 #define JME_PCI_BAR1 0x18 /* 128bytes I/O window. */
58 #define JME_PCI_BAR2 0x1C /* 256bytes I/O window. */
[all …]
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| /freebsd/sys/dev/nge/ |
| H A D | if_ngereg.h | 36 #define NGE_CSR 0x00
37 #define NGE_CFG 0x04
38 #define NGE_MEAR 0x08
39 #define NGE_PCITST 0x0C
40 #define NGE_ISR 0x10
41 #define NGE_IMR 0x14
42 #define NGE_IER 0x18
43 #define NGE_IHR 0x1C
44 #define NGE_TX_LISTPTR_LO 0x20
45 #define NGE_TX_LISTPTR_HI 0x24
[all …]
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| /freebsd/sys/dev/bge/ |
| H A D | if_bgereg.h | 54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
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| /freebsd/sys/dev/bhnd/cores/pmu/ |
| H A D | bhnd_pmureg.h | 29 (((_value) & _flag) != 0)
43 #define BHND_CLK_CTL_ST 0x1e0 /**< clock control and status */
55 #define BHND_CCS_FORCEALP 0x00000001 /**< force ALP request */
56 #define BHND_CCS_FORCEHT 0x00000002 /**< force HT request */
57 #define BHND_CCS_FORCEILP 0x00000004 /**< force ILP request */
58 #define BHND_CCS_FORCE_MASK 0x0000000F
60 #define BHND_CCS_ALPAREQ 0x00000008 /**< ALP Avail Request */
61 #define BHND_CCS_HTAREQ 0x00000010 /**< HT Avail Request */
62 #define BHND_CCS_AREQ_MASK 0x00000018
64 #define BHND_CCS_FORCEHWREQOFF 0x00000020 /**< Force HW Clock Request Off */
[all …]
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| /freebsd/sys/dev/sound/macio/ |
| H A D | davbusreg.h | 36 #define DAVBUS_SOUND_CTRL 0x00
37 #define DAVBUS_CODEC_CTRL 0x10
38 #define DAVBUS_CODEC_STATUS 0x20
39 #define DAVBUS_CLIP_COUNT 0x30
40 #define DAVBUS_BYTE_SWAP 0x40
44 * but the controller itself uses subframe 0 to communicate with the codec.
49 #define DAVBUS_INPUT_SUBFRAME0 0x00000001
50 #define DAVBUS_INPUT_SUBFRAME1 0x00000002
51 #define DAVBUS_INPUT_SUBFRAME2 0x00000004
52 #define DAVBUS_INPUT_SUBFRAME3 0x00000008
[all …]
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| /freebsd/contrib/bearssl/src/symcipher/ |
| H A D | des_tab.c | 30 * order (rightmost bit is 0).
36 4, 14, 18, 8, 17, 0, 19
46 24, 7, 13, 0, 21, 17, 1
53 0x00808200, 0x00000000, 0x00008000, 0x00808202,
54 0x00808002, 0x00008202, 0x00000002, 0x00008000,
55 0x00000200, 0x00808200, 0x00808202, 0x00000200,
56 0x00800202, 0x00808002, 0x00800000, 0x00000002,
57 0x00000202, 0x00800200, 0x00800200, 0x00008200,
58 0x00008200, 0x00808000, 0x00808000, 0x00800202,
59 0x00008002, 0x00800002, 0x00800002, 0x00008002,
[all …]
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| /freebsd/sys/dev/sound/pci/ |
| H A D | es137x.h | 34 #define ES1370_REG_CONTROL 0x00
35 #define ES1370_REG_STATUS 0x04
36 #define ES1370_REG_UART_DATA 0x08
37 #define ES1370_REG_UART_STATUS 0x09
38 #define ES1370_REG_UART_CONTROL 0x09
39 #define ES1370_REG_UART_TEST 0x0a
40 #define ES1370_REG_MEMPAGE 0x0c
41 #define ES1370_REG_CODEC 0x10
43 #define ES1370_REG_SERIAL_CONTROL 0x20
44 #define ES1370_REG_DAC1_SCOUNT 0x24
[all …]
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| /freebsd/sys/dev/usb/controller/ |
| H A D | avr32dci.h | 35 #define AVR32_CTRL 0x00 /* Control */
36 #define AVR32_CTRL_DEV_ADDR 0x7F
37 #define AVR32_CTRL_DEV_FADDR_EN 0x80
38 #define AVR32_CTRL_DEV_EN_USBA 0x100
39 #define AVR32_CTRL_DEV_DETACH 0x200
40 #define AVR32_CTRL_DEV_REWAKEUP 0x400
42 #define AVR32_FNUM 0x04 /* Frame Number */
43 #define AVR32_FNUM_MASK 0x3FFF
44 #define AVR32_FRAME_MASK 0x7FF
46 /* 0x08 - 0x0C Reserved */
[all …]
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| /freebsd/sys/sys/ |
| H A D | _termios.h | 42 #define VEOF 0 /* ICANON */
77 #define _POSIX_VDISABLE 0xff
82 #define IGNBRK 0x00000001 /* ignore BREAK condition */
83 #define BRKINT 0x00000002 /* map BREAK to SIGINTR */
84 #define IGNPAR 0x00000004 /* ignore (discard) parity errors */
85 #define PARMRK 0x00000008 /* mark parity and framing errors */
86 #define INPCK 0x00000010 /* enable checking of parity errors */
87 #define ISTRIP 0x00000020 /* strip 8th bit off chars */
88 #define INLCR 0x00000040 /* map NL into CR */
89 #define IGNCR 0x00000080 /* ignore CR */
[all …]
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| H A D | cdio.h | 61 #define CD_AS_AUDIO_INVALID 0x00
62 #define CD_AS_PLAY_IN_PROGRESS 0x11
63 #define CD_AS_PLAY_PAUSED 0x12
64 #define CD_AS_PLAY_COMPLETED 0x13
65 #define CD_AS_PLAY_ERROR 0x14
66 #define CD_AS_NO_STATUS 0x15
132 #define CD_SUBQ_DATA 0
225 }; /*<1>rate. -32767 to -1 is slower, 0==normal,*/
232 #define CDDOPLAYTRK 0x00000001 /*<2>Can Play tracks/index*/
233 #define CDDOPLAYMSF 0x00000002 /*<2>Can Play msf to msf*/
[all …]
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| /freebsd/sys/x86/include/ |
| H A D | specialreg.h | 38 #define CR0_PE 0x00000001 /* Protected mode Enable */
39 #define CR0_MP 0x00000002 /* "Math" (fpu) Present */
40 #define CR0_EM 0x00000004 /* EMulate FPU instructions. (trap ESC only) */
41 #define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */
42 #define CR0_PG 0x80000000 /* PaGing enable */
47 #define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */
48 #define CR0_WP 0x00010000 /* Write Protect (honor page protect in
50 #define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */
51 #define CR0_NW 0x20000000 /* Not Write-through */
52 #define CR0_CD 0x40000000 /* Cache Disable */
[all …]
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| /freebsd/sys/dev/sk/ |
| H A D | if_skreg.h | 54 #define SK_GENESIS 0x0A
55 #define SK_YUKON 0xB0
56 #define SK_YUKON_LITE 0xB1
57 #define SK_YUKON_LP 0xB2
58 #define SK_YUKON_FAMILY(x) ((x) & 0xB0)
61 #define SK_YUKON_LITE_REV_A0 0x0 /* invented, see test in skc_attach. */
62 #define SK_YUKON_LITE_REV_A1 0x3
63 #define SK_YUKON_LITE_REV_A3 0x7
68 #define VENDORID_SK 0x1148
73 #define VENDORID_MARVELL 0x11AB
[all …]
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| /freebsd/sys/dev/igc/ |
| H A D | igc_base.h | 43 #define IGC_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
44 #define IGC_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
45 #define IGC_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
46 #define IGC_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
47 #define IGC_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
48 #define IGC_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */
49 #define IGC_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
50 #define IGC_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
51 #define IGC_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
52 #define IGC_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */
[all …]
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