/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | brcm-sata-phy.txt | 1 * Broadcom SATA3 PHY 4 - compatible: should be one or more of 5 "brcm,bcm7216-sata-phy" 6 "brcm,bcm7425-sata-phy" 7 "brcm,bcm7445-sata-phy" 8 "brcm,iproc-ns2-sata-phy" 9 "brcm,iproc-nsp-sata-phy" 10 "brcm,phy-sata3" 11 "brcm,iproc-sr-sata-phy" 12 "brcm,bcm63138-sata-phy" [all …]
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H A D | brcm,sata-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/brcm,sata-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom SATA3 PHY 10 - Florian Fainelli <f.fainelli@gmail.com> 14 pattern: "^sata[-|_]phy(@.*)?$" 18 - items: 19 - enum: 20 - brcm,bcm7216-sata-phy [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-370-seagate-nas-4bay.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC). 13 * Product name : Seagate NAS 4-Bay 14 * Code name (board/PCB) : Dart 4-Bay 19 /dts-v1/; 20 #include "armada-370-seagate-na [all...] |
H A D | armada-388-gp.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * (RD-88F6820-GP) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 11 /dts-v1/; 12 #include "armada-388.dtsi" 13 #include <dt-bindings/gpio/gpio.h> 16 model = "Marvell Armada 388 DB-8 166 sata3: sata-port@1 { global() label [all...] |
H A D | armada-xp-netgear-rn2120.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include "armada-xp-mv78230.dtsi" 16 …compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,arm… 19 stdout-path = "serial0:115200n8"; 33 internal-regs { 41 clock-frequency = <400000>; 45 * MGT4012XB-O20, 8000RPM) near eSATA port */ [all …]
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H A D | kirkwood-net5big.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 * Based on netxbig_v2-setup.c, 14 /dts-v1/; 17 #include "kirkwood-6281.dtsi" 18 #include "kirkwood-netxbig.dtsi" 22 compatible = "lacie,net5big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 33 compatible = "regulator-fixed"; 35 regulator-name = "hdd1power"; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; [all …]
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H A D | armada-xp-synology-ds414.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot 12 * were delivered with an older version of u-boot that left internal 17 * installing it from u-boot prompt) or adjust the Devive Tree 21 /dts-v1/; 23 #include <dt-bindings/input/input.h> 24 #include <dt-binding [all...] |
H A D | armada-370-netgear-rn104.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include "armada-370.dtsi" 16 compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp"; 19 stdout-path = "serial0:115200n8"; 32 internal-regs { 44 pinctrl-0 = <&ge0_rgmii_pins>; 45 pinctrl-names = "default"; [all …]
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H A D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
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H A D | armada-38x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 #address-cells = <1>; 19 #size-cells = <1>; 32 compatible = "arm,cortex-a9-pmu"; 33 interrupts-extended = <&mpic 3>; 37 compatible = "marvell,armada380-mbus", "simple-bus"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm63138.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 #address-cells = <1>; 11 #size-cell [all...] |
H A D | bcm7445.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #address-cells = <2>; 6 #size-cells = <2>; 9 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "brcm,brahma-b15"; 22 enable-method = "brcm,brahma-b15"; 27 compatible = "brcm,brahma-b15"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/ata/ |
H A D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes 3 SATA host controller nodes are defined to describe on-chip Serial ATA 7 - compatible : Shall contain: 8 * "apm,xgene-ahci" 9 - reg : First memory resource shall be the AHCI memory 19 - interrupts : Interrupt-specifier for SATA host controller IRQ. 20 - clocks : Reference to the clock entry. 21 - phys : A list of phandles + phy-specifiers, one for each 22 entry in phy-names. 23 - phy-names : Should contain: [all …]
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/freebsd/sys/contrib/device-tree/src/mips/brcm/ |
H A D | bcm7360.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 24 cpu_intc: interrupt-controller { 25 #address-cells = <0>; 26 compatible = "mti,cpu-interrupt-controller"; 28 interrupt-controller; [all …]
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H A D | bcm7362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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H A D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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H A D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <175625000>; 42 cpu_intc: interrupt-controller { 43 #address-cells = <0>; 44 compatible = "mti,cpu-interrupt-controller"; 46 interrupt-controller; [all …]
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H A D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-lx2160a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 // Copyright 2018-2020 NXP 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; 23 stdout-path = "serial0:115200n8"; 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "MC34717-3.3VSB"; 29 regulator-min-microvolt = <3300000>; [all …]
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H A D | fsl-lx2162a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a"; 23 stdout-path = "serial0:115200n8"; 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "LTM4619-3.3VSB"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; [all …]
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H A D | fsl-lx2160a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2160a-qds", "fsl,lx2160a"; 23 stdout-path = "serial0:115200n8"; 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "MC34717-3.3VSB"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/apm/ |
H A D | apm-merlin.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 10 /include/ "apm-shadowcat.dtsi" 13 model = "APM X-Gene Merlin board"; 14 compatible = "apm,merlin", "apm,xgene-shadowcat"; 23 gpio-keys { 24 compatible = "gpio-keys"; 28 linux,input-type = <0x1>; 29 interrupt-parent = <&sbgpio>; 40 compatible = "syscon-poweroff"; [all …]
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H A D | apm-storm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dts file for AppliedMicro (APM) X-Gene Storm SOC 9 compatible = "apm,xgene-storm"; 10 interrupt-parent = <&gic>; 11 #address-cells = <2>; 12 #size-cell 916 sata3: sata@1a800000 { global() label [all...] |
H A D | apm-shadowcat.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC 9 compatible = "apm,xgene-shadowcat"; 10 interrupt-parent = <&gic>; 11 #address-cells = <2>; 12 #size-cell 689 sata3: sata@1a400000 { global() label [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/ |
H A D | stingray-sata.dtsi | 4 * Copyright(c) 2016-2017 Broadcom. All rights reserved. 34 compatible = "simple-bus"; 35 #address-cells = <1>; 36 #size-cells = <1>; 40 compatible = "brcm,iproc-ahci", "generic-ahci"; 42 reg-names = "ahci"; 44 #address-cells = <1>; 45 #size-cells = <0>; 48 sata0_port0: sata-port@0 { 51 phy-names = "sata-phy"; [all …]
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