Lines Matching +full:phy +full:- +full:sata3
1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
35 #interrupt-cells = <1>;
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <81000000>;
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <27000000>;
53 #address-cells = <1>;
54 #size-cells = <1>;
56 compatible = "simple-bus";
59 periph_intc: interrupt-controller@41a400 {
60 compatible = "brcm,bcm7038-l1-intc";
63 interrupt-controller;
64 #interrupt-cells = <1>;
66 interrupt-parent = <&cpu_intc>;
70 sun_l2_intc: interrupt-controller@403000 {
71 compatible = "brcm,l2-intc";
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 interrupt-parent = <&periph_intc>;
79 gisb-arb@400000 {
80 compatible = "brcm,bcm7400-gisb-arb";
82 native-endian;
83 interrupt-parent = <&sun_l2_intc>;
85 brcm,gisb-arb-master-mask = <0x177b>;
86 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0",
93 upg_irq0_intc: interrupt-controller@406780 {
94 compatible = "brcm,bcm7120-l2-intc";
97 brcm,int-map-mask = <0x44>, <0x7000000>;
98 brcm,int-fwd-mask = <0x70000>;
100 interrupt-controller;
101 #interrupt-cells = <1>;
103 interrupt-parent = <&periph_intc>;
105 interrupt-names = "upg_main", "upg_bsc";
108 upg_aon_irq0_intc: interrupt-controller@409480 {
109 compatible = "brcm,bcm7120-l2-intc";
112 brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
113 brcm,int-fwd-mask = <0>;
114 brcm,irq-can-wake;
116 interrupt-controller;
117 #interrupt-cells = <1>;
119 interrupt-parent = <&periph_intc>;
121 interrupt-names = "upg_main_aon", "upg_bsc_aon",
126 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
128 native-endian;
132 compatible = "brcm,brcmstb-reboot";
139 reg-io-width = <0x4>;
140 reg-shift = <0x2>;
141 interrupt-parent = <&periph_intc>;
150 reg-io-width = <0x4>;
151 reg-shift = <0x2>;
152 interrupt-parent = <&periph_intc>;
161 reg-io-width = <0x4>;
162 reg-shift = <0x2>;
163 interrupt-parent = <&periph_intc>;
170 clock-frequency = <390000>;
171 compatible = "brcm,brcmstb-i2c";
172 interrupt-parent = <&upg_aon_irq0_intc>;
175 interrupt-names = "upg_bsca";
180 clock-frequency = <390000>;
181 compatible = "brcm,brcmstb-i2c";
182 interrupt-parent = <&upg_aon_irq0_intc>;
185 interrupt-names = "upg_bscb";
190 clock-frequency = <390000>;
191 compatible = "brcm,brcmstb-i2c";
192 interrupt-parent = <&upg_irq0_intc>;
195 interrupt-names = "upg_bscc";
200 clock-frequency = <390000>;
201 compatible = "brcm,brcmstb-i2c";
202 interrupt-parent = <&upg_irq0_intc>;
205 interrupt-names = "upg_bscd";
210 clock-frequency = <390000>;
211 compatible = "brcm,brcmstb-i2c";
212 interrupt-parent = <&upg_irq0_intc>;
215 interrupt-names = "upg_bsce";
220 compatible = "brcm,bcm7038-pwm";
222 #pwm-cells = <2>;
228 compatible = "brcm,bcm7038-pwm";
230 #pwm-cells = <2>;
237 compatible = "brcm,bcm7038-wdt";
242 aon_pm_l2_intc: interrupt-controller@408440 {
243 compatible = "brcm,l2-intc";
245 interrupt-controller;
246 #interrupt-cells = <1>;
247 interrupt-parent = <&periph_intc>;
249 brcm,irq-can-wake;
253 compatible = "brcm,brcmstb-aon-ctrl";
255 reg-names = "aon-ctrl", "aon-sram";
259 compatible = "brcm,brcmstb-timers";
264 compatible = "brcm,brcmstb-gpio";
266 #gpio-cells = <2>;
267 #interrupt-cells = <2>;
268 gpio-controller;
269 interrupt-controller;
270 interrupt-parent = <&upg_irq0_intc>;
272 brcm,gpio-bank-widths = <32 32 32 21>;
276 compatible = "brcm,brcmstb-gpio";
278 #gpio-cells = <2>;
279 #interrupt-cells = <2>;
280 gpio-controller;
281 interrupt-controller;
282 interrupt-parent = <&upg_aon_irq0_intc>;
284 interrupts-extended = <&upg_aon_irq0_intc 6>,
286 wakeup-source;
287 brcm,gpio-bank-widths = <18 4>;
291 phy-mode = "internal";
292 phy-handle = <&phy1>;
293 mac-address = [ 00 10 18 36 23 1a ];
294 compatible = "brcm,genet-v3";
295 #address-cells = <0x1>;
296 #size-cells = <0x1>;
299 interrupt-parent = <&periph_intc>;
303 compatible = "brcm,genet-mdio-v3";
304 #address-cells = <0x1>;
305 #size-cells = <0x0>;
308 phy1: ethernet-phy@1 {
309 max-speed = <100>;
311 compatible = "brcm,40nm-ephy",
312 "ethernet-phy-ieee802.3-c22";
318 compatible = "brcm,bcm7425-ehci", "generic-ehci";
320 native-endian;
321 interrupt-parent = <&periph_intc>;
327 compatible = "brcm,bcm7425-ohci", "generic-ohci";
329 native-endian;
330 no-big-frame-no;
331 interrupt-parent = <&periph_intc>;
337 compatible = "brcm,bcm7425-ehci", "generic-ehci";
339 native-endian;
340 interrupt-parent = <&periph_intc>;
346 compatible = "brcm,bcm7425-ohci", "generic-ohci";
348 native-endian;
349 no-big-frame-no;
350 interrupt-parent = <&periph_intc>;
356 compatible = "brcm,bcm7425-ehci", "generic-ehci";
358 native-endian;
359 interrupt-parent = <&periph_intc>;
365 compatible = "brcm,bcm7425-ohci", "generic-ohci";
367 native-endian;
368 no-big-frame-no;
369 interrupt-parent = <&periph_intc>;
375 compatible = "brcm,bcm7425-ehci", "generic-ehci";
377 native-endian;
378 interrupt-parent = <&periph_intc>;
384 compatible = "brcm,bcm7425-ohci", "generic-ohci";
386 native-endian;
387 no-big-frame-no;
388 interrupt-parent = <&periph_intc>;
393 hif_l2_intc: interrupt-controller@41a000 {
394 compatible = "brcm,l2-intc";
396 interrupt-controller;
397 #interrupt-cells = <1>;
398 interrupt-parent = <&periph_intc>;
403 compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
404 #address-cells = <1>;
405 #size-cells = <0>;
406 reg-names = "nand", "flash-edu";
408 interrupt-parent = <&hif_l2_intc>;
414 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
415 reg-names = "ahci", "top-ctrl";
417 interrupt-parent = <&periph_intc>;
419 #address-cells = <1>;
420 #size-cells = <0>;
423 sata0: sata-port@0 {
428 sata1: sata-port@1 {
434 sata_phy: sata-phy@180100 {
435 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
437 reg-names = "phy";
438 #address-cells = <1>;
439 #size-cells = <0>;
442 sata_phy0: sata-phy@0 {
444 #phy-cells = <0>;
447 sata_phy1: sata-phy@1 {
449 #phy-cells = <0>;
454 compatible = "brcm,bcm7425-sdhci";
456 interrupt-parent = <&periph_intc>;
458 sd-uhs-sdr50;
459 mmc-hs200-1_8v;
464 compatible = "brcm,bcm7425-sdhci";
466 interrupt-parent = <&periph_intc>;
468 sd-uhs-sdr50;
469 mmc-hs200-1_8v;
473 spi_l2_intc: interrupt-controller@41ad00 {
474 compatible = "brcm,l2-intc";
476 interrupt-controller;
477 #interrupt-cells = <1>;
478 interrupt-parent = <&periph_intc>;
483 #address-cells = <0x1>;
484 #size-cells = <0x0>;
485 compatible = "brcm,spi-bcm-qspi",
486 "brcm,spi-brcmstb-qspi";
489 reg-names = "cs_reg", "hif_mspi", "bspi";
491 interrupt-parent = <&spi_l2_intc>;
492 interrupt-names = "spi_lr_fullness_reached",
503 #address-cells = <1>;
504 #size-cells = <0>;
505 compatible = "brcm,spi-bcm-qspi",
506 "brcm,spi-brcmstb-mspi";
509 reg-names = "mspi";
511 interrupt-parent = <&upg_aon_irq0_intc>;
512 interrupt-names = "mspi_done";
517 compatible = "brcm,brcmstb-waketimer";
520 interrupt-parent = <&aon_pm_l2_intc>;
521 interrupt-names = "timer";
528 compatible = "simple-bus";
530 #address-cells = <1>;
531 #size-cells = <1>;
533 memory-controller@0 {
534 compatible = "brcm,brcmstb-memc", "simple-bus";
536 #address-cells = <1>;
537 #size-cells = <1>;
539 memc-arb@1000 {
540 compatible = "brcm,brcmstb-memc-arb";
544 memc-ddr@2000 {
545 compatible = "brcm,brcmstb-memc-ddr";
549 ddr-phy@6000 {
550 compatible = "brcm,brcmstb-ddr-phy";
555 compatible = "brcm,brcmstb-ddr-shimphy";
560 memory-controller@1 {
561 compatible = "brcm,brcmstb-memc", "simple-bus";
563 #address-cells = <1>;
564 #size-cells = <1>;
566 memc-arb@1000 {
567 compatible = "brcm,brcmstb-memc-arb";
571 memc-ddr@2000 {
572 compatible = "brcm,brcmstb-memc-ddr";
576 ddr-phy@6000 {
577 compatible = "brcm,brcmstb-ddr-phy";
582 compatible = "brcm,brcmstb-ddr-shimphy";
590 compatible = "brcm,bcm7425-pcie";
598 aspm-no-l0s;
600 msi-controller;
601 msi-parent = <&pcie_0>;
602 #address-cells = <0x3>;
603 #size-cells = <0x2>;
604 bus-range = <0x0 0xff>;
605 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
606 linux,pci-domain = <0x0>;
608 interrupt-parent = <&periph_intc>;
610 interrupt-names = "pcie", "msi";
611 #interrupt-cells = <0x1>;
612 interrupt-map = <0 0 0 1 &periph_intc 0x21