Lines Matching +full:phy +full:- +full:sata3

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 	compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
23 		stdout-path = "serial0:115200n8";
26 	sb_3v3: regulator-sb3v3 {
27 		compatible = "regulator-fixed";
28 		regulator-name = "MC34717-3.3VSB";
29 		regulator-min-microvolt = <3300000>;
30 		regulator-max-microvolt = <3300000>;
31 		regulator-boot-on;
32 		regulator-always-on;
35 	mdio-mux-1 {
36 		compatible = "mdio-mux-multiplexer";
37 		mux-controls = <&mux 0>;
38 		mdio-parent-bus = <&emdio1>;
39 		#address-cells = <1>;
40 		#size-cells = <0>;
42 		mdio@0 { /* On-board PHY #1 RGMI1*/
44 			#address-cells = <1>;
45 			#size-cells = <0>;
48 		mdio@8 { /* On-board PHY #2 RGMI2*/
50 			#address-cells = <1>;
51 			#size-cells = <0>;
56 			#address-cells = <1>;
57 			#size-cells = <0>;
62 			#address-cells = <1>;
63 			#size-cells = <0>;
68 			#address-cells = <1>;
69 			#size-cells = <0>;
74 			#address-cells = <1>;
75 			#size-cells = <0>;
80 			#address-cells = <1>;
81 			#size-cells = <0>;
86 			#address-cells = <1>;
87 			#size-cells = <0>;
92 			#address-cells = <1>;
93 			#size-cells = <0>;
98 			#address-cells = <1>;
99 			#size-cells = <0>;
103 	mdio-mux-2 {
104 		compatible = "mdio-mux-multiplexer";
105 		mux-controls = <&mux 1>;
106 		mdio-parent-bus = <&emdio2>;
107 		#address-cells = <1>;
108 		#size-cells = <0>;
112 			#address-cells = <1>;
113 			#size-cells = <0>;
118 			#address-cells = <1>;
119 			#size-cells = <0>;
124 			#address-cells = <1>;
125 			#size-cells = <0>;
130 			#address-cells = <1>;
131 			#size-cells = <0>;
136 			#address-cells = <1>;
137 			#size-cells = <0>;
142 			#address-cells = <1>;
143 			#size-cells = <0>;
148 			#address-cells = <1>;
149 			#size-cells = <0>;
154 			#address-cells = <1>;
155 			#size-cells = <0>;
176 		#address-cells = <1>;
177 		#size-cells = <1>;
178 		compatible = "jedec,spi-nor";
180 		spi-max-frequency = <1000000>;
188 		#address-cells = <1>;
189 		#size-cells = <1>;
190 		compatible = "jedec,spi-nor";
192 		spi-max-frequency = <1000000>;
200 		#address-cells = <1>;
201 		#size-cells = <1>;
202 		compatible = "jedec,spi-nor";
204 		spi-max-frequency = <1000000>;
228 		#address-cells = <1>;
229 		#size-cells = <1>;
230 		compatible = "jedec,spi-nor";
231 		m25p,fast-read;
232 		spi-max-frequency = <50000000>;
234 		spi-rx-bus-width = <8>;
235 		spi-tx-bus-width = <8>;
243 		compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
244 			     "simple-mfd";
247 		mux: mux-controller {
248 			compatible = "reg-mux";
249 			#mux-control-cells = <1>;
250 			mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
255 	i2c-mux@77 {
258 		#address-cells = <1>;
259 		#size-cells = <0>;
262 			#address-cells = <1>;
263 			#size-cells = <0>;
266 			power-monitor@40 {
269 				shunt-resistor = <500>;
272 			power-monitor@41 {
275 				shunt-resistor = <1000>;
280 			#address-cells = <1>;
281 			#size-cells = <0>;
284 			temperature-sensor@4c {
287 				vcc-supply = <&sb_3v3>;
290 			temperature-sensor@4d {
293 				vcc-supply = <&sb_3v3>;
320 &sata3 {