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Searched +full:ls2k +full:- +full:clk (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dloongson,ls2k-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/loongson,ls2k-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 SoC Clock Control Module
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
13 Loongson-2 SoC clock control module is an integrated clock controller, which
19 - loongson,ls2k0300-clk
20 - loongson,ls2k0500-clk
21 - loongson,ls2k-clk # This is for Loongson-2K1000
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/linux/arch/loongarch/boot/dts/
H A Dloongson-2k0500.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
23 clocks = <&clk LOONGSON2_NODE_CLK>;
27 ref_100m: clock-ref-100m {
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H A Dloongson-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
24 clocks = <&clk LOONGSON2_NODE_CLK>;
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H A Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
23 clocks = <&clk LOONGSON2_NODE_CLK>;
30 clocks = <&clk LOONGSON2_NODE_CLK>;
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/linux/Documentation/devicetree/bindings/mmc/
H A Dloongson,ls2k0500-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/loongson,ls2k0500-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The SD/SDIO/eMMC host controller for Loongson-2K family SoCs
10 The MMC host controller on the Loongson-2K0500/2K1000 (using an externally
12 The two MMC host controllers on the Loongson-2K2000 are similar,
17 - Binbin Zhou <zhoubinbin@loongson.cn>
20 - $ref: mmc-controller.yaml#
25 - loongson,ls2k0500-mmc
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/linux/Documentation/devicetree/bindings/loongarch/
H A Dcpus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Binbin Zhou <zhoubinbin@loongson.cn>
17 - $ref: /schemas/cpu.yaml#
22 - loongson,la264
23 - loongson,la364
32 - compatible
33 - reg
34 - clocks
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/linux/Documentation/devicetree/bindings/dma/
H A Dloongson,ls2x-apbdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls2x-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Binbin Zhou <zhoubinbin@loongson.cn>
17 - $ref: dma-controller.yaml#
22 - const: loongson,ls2k1000-apbdma
23 - items:
24 - const: loongson,ls2k0500-apbdma
25 - const: loongson,ls2k1000-apbdma
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/linux/Documentation/devicetree/bindings/pwm/
H A Dloongson,ls7a-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Binbin Zhou <zhoubinbin@loongson.cn>
15 It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.
18 - $ref: pwm.yaml#
23 - const: loongson,ls7a-pwm
24 - items:
25 - enum:
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/linux/Documentation/devicetree/bindings/spi/
H A Dloongson,ls2k-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/loongson,ls2k-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - enum:
19 - loongson,ls2k1000-spi
20 - items:
21 - enum:
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/linux/drivers/clk/
H A Dclk-loongson2.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
9 #include <linux/clk-provider.h>
13 #include <linux/io-64-nonatomic-lo-hi.h>
14 #include <dt-bindings/clock/loongson,ls2k-clk.h>
30 /* Must be last --ends in a flexible-array member. */
216 * The hda clk divisor in the upper 32bits and the clk-prodiver
278 return (val & GENMASK(shift + width - 1, shift)) >> shift; in loongson2_rate_part()
285 struct loongson2_clk_data *clk = to_loongson2_clk(hw); in loongson2_pll_recalc_rate() local
287 val = readq(clk->reg); in loongson2_pll_recalc_rate()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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