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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dnvidia,tegra186-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
16 handles memory requests for 40-bit virtual addresses from internal clients
27 pattern: "^memory-controller@[0-9a-f]+$"
31 - enum:
32 - nvidia,tegra186-mc
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dsalvator-xs.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board
5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
8 #include "salvator-common.dtsi"
11 model = "Renesas Salvator-X 2nd version board";
12 compatible = "renesas,salvator-xs";
16 clock-frequency = <16640000>;
20 clock-frequency = <400000>;
22 versaclock6: clock-generator@6a {
24 reg = <0x6a>;
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H A Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dr8a779a0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC
8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779a0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 /* External CAN clock - to be overridden by boards that provide it */
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Drenesas,rz-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rz-dma
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H A Drenesas,shdma.txt3 Sh-/r-mobile and R-Car systems often have multiple identical DMA controller
15 - compatible: should be "renesas,shdma-mux"
16 - #dma-cells: should be <1>, see "dmas" property below
19 - dma-channels: number of DMA channels
20 - dma-requests: number of DMA request signals
25 - compatible: should be of the form "renesas,shdma-<soc>", where <soc> should
27 "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
30 dmac: dma-multiplexer@0 {
31 compatible = "renesas,shdma-mux";
32 #dma-cells = <1>;
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H A Drenesas,rcar-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car and RZ/G DMA Controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
13 - $ref: dma-controller.yaml#
18 - items:
19 - enum:
20 - renesas,dmac-r8a7742 # RZ/G1H
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
24 const: st,stm32-timers
32 clock-names:
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dst,sta32x.txt7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
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H A Dst,sta350.txt7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dstmpe-adc.txt2 ----------------
5 - compatible: "st,stmpe-adc"
10 - st,norequest-mask: bitmask specifying which ADC channels should _not_ be
19 compatible = "st,stmpe-adc";
20 st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */
H A Dst,stmpe-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stmpe-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Agner <stefan@agner.ch>
20 const: st,stmpe-adc
22 st,norequest-mask:
28 "#io-channel-cells":
32 - compatible
37 - |
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H A Dti,ads7924.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugo Villeneuve <hvilleneuve@dimonoff.com>
25 vref-supply:
29 reset-gpios:
35 "#address-cells":
38 "#size-cells":
39 const: 0
41 "#io-channel-cells":
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/freebsd/sys/contrib/device-tree/Bindings/clock/st/
H A Dst,quadfs.txt10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible : shall be:
15 "st,quadfs-d0"
16 "st,quadfs-d2"
17 "st,quadfs-d3"
18 "st,quadfs-pll"
21 - #clock-cells : from common clock binding; shall be set to 1.
23 - reg : A Base address and length of the register set.
25 - clocks : from common clock binding
27 - clock-output-names : From common clock binding. The block has 4
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/freebsd/usr.sbin/spi/
H A Dspi.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
44 #define DEFAULT_DEVICE_NAME "/dev/spigen0.0"
48 #define DIR_READ 0
51 #define DIR_NONE -1
54 int mode; /* mode (0,1,2,3, -1 == use default) */
55 int speed; /* speed (in Hz, -1 == use default) */
56 int count; /* count (0 through 'n' bytes, negative for
58 int binary; /* non-zero for binary output or zero for
59 * ASCII output when ASCII != 0 */
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/freebsd/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dmediatek,mt6370-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/mediatek,mt6370-backligh
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-binding
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H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-binding
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/freebsd/sys/dev/ioat/
H A Dioat.c1 /*-
65 #define BUS_SPACE_MAXADDR_40BIT MIN(BUS_SPACE_MAXADDR, 0xFFFFFFFFFFULL)
68 #define BUS_SPACE_MAXADDR_46BIT MIN(BUS_SPACE_MAXADDR, 0x3FFFFFFFFFFFULL)
111 device_printf(ioat->device, __VA_ARGS__); \
113 } while (0)
116 SYSCTL_NODE(_hw, OID_AUTO, ioat, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
121 &g_force_legacy_interrupts, 0, "Set to non-zero to force MSI-X disabled");
123 int g_ioat_debug_level = 0;
125 0, "Set log level (0-3) for ioat(4). Higher is more verbose.");
129 0, "Set IOAT ring order. (1 << this) == ring size.");
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/freebsd/sys/contrib/device-tree/src/arm/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Drenesas,usbhs.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas USBHS (HS-USB) controller
10 - Yoshihir
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/freebsd/sys/contrib/device-tree/src/arm/intel/pxa/
H A Dpxa300-raumfeld-speaker-one.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-speaker-one-pxa303", "marvell,pxa300";
13 #sound-dai-cells = <0>;
14 Vdd-supply = <&reg_3v3>;
15 Vdda-supply = <&reg_va_5v0>;
18 xo_11mhz: oscillator-11mhz {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a77470.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
29 cpu0: cpu@0 {
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H A Dr7s72100-rskrza1.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
24 stdout-path = "serial0:115200n8";
29 reg = <0x0800000
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Drenesas,ravb.txt7 - compatible: Must contain one or more of the following:
8 - "renesas,etheravb-r8a7742" for the R8A7742 SoC.
9 - "renesas,etheravb-r8a7743" for the R8A7743 SoC.
10 - "renesas,etheravb-r8a7744" for the R8A7744 SoC.
11 - "renesas,etheravb-r8a7745" for the R8A7745 SoC.
12 - "renesas,etheravb-r8a77470" for the R8A77470 SoC.
13 - "renesas,etheravb-r8a7790" for the R8A7790 SoC.
14 - "renesas,etheravb-r8a7791" for the R8A7791 SoC.
15 - "renesas,etheravb-r8a7792" for the R8A7792 SoC.
16 - "renesas,etheravb-r8a7793" for the R8A7793 SoC.
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