Lines Matching +full:ch3 +full:- +full:0
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
24 const: st,stm32-timers
32 clock-names:
34 - const: int
43 dma-names:
45 enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
51 - maxItems: 1
52 - maxItems: 4
54 interrupt-names:
56 - items:
57 - const: global
58 - items:
59 - const: brk
60 - const: up
61 - const: trg-com
62 - const: cc
64 "#address-cells":
67 "#size-cells":
68 const: 0
76 const: st,stm32-pwm
78 "#pwm-cells":
85 $ref: /schemas/types.yaml#/definitions/uint32-matrix
88 - description: |
89 "index" indicates on which break input (0 or 1) the
91 enum: [0, 1]
92 - description: |
93 "level" gives the active level (0=low or 1=high) of the
95 enum: [0, 1]
96 - description: |
103 - "#pwm-cells"
104 - compatible
112 const: st,stm32-timer-counter
115 - compatible
118 "^timer@[0-9]+$":
125 - st,stm32-timer-trigger
126 - st,stm32h7-timer-trigger
131 minimum: 0
135 - compatible
136 - reg
139 - compatible
140 - reg
141 - clocks
142 - clock-names
147 - |
148 #include <dt-bindings/clock/stm32mp1-clks.h>
150 #address-cells = <1>;
151 #size-cells = <0>;
152 compatible = "st,stm32-timers";
153 reg = <0x40000000 0x400>;
155 clock-names = "int";
156 dmas = <&dmamux1 18 0x400 0x1>,
157 <&dmamux1 19 0x400 0x1>,
158 <&dmamux1 20 0x400 0x1>,
159 <&dmamux1 21 0x400 0x1>,
160 <&dmamux1 22 0x400 0x1>;
161 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
163 compatible = "st,stm32-pwm";
164 #pwm-cells = <3>;
165 st,breakinput = <0 1 5>;
168 compatible = "st,stm32-timer-trigger";
172 compatible = "st,stm32-timer-counter";