Lines Matching +full:ch3 +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
24 stdout-path = "serial0:115200n8";
29 reg = <0x08000000 0x02000000>;
33 compatible = "mtd-rom";
34 reg = <0x18000000 0x08000000>;
36 power-domains = <&cpg_clocks>;
37 bank-width = <4>;
38 device-width = <1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
43 compatible = "fixed-partitions";
44 #address-cells = <1>;
45 #size-cells = <1>;
47 partition@0 {
49 reg = <0x00000000 0x00080000>;
53 label = "uboot-env";
54 reg = <0x00080000 0x00040000>;
59 reg = <0x000c0000 0x00040000>;
64 reg = <0x00100000 0x00280000>;
69 reg = <0x00400000 0x01c00000>;
75 compatible = "gpio-keys";
77 pinctrl-names = "default";
78 pinctrl-0 = <&keyboard_pins>;
80 key-1 {
81 interrupt-parent = <&irqc>;
85 wakeup-source;
88 key-2 {
89 interrupt-parent = <&irqc>;
93 wakeup-source;
96 key-3 {
97 interrupt-parent = <&irqc>;
101 wakeup-source;
106 compatible = "gpio-leds";
113 gpios = <&io_expander1 0 GPIO_ACTIVE_LOW>;
127 clock-frequency = <13330000>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&i2c3_pins>;
135 clock-frequency = <400000>;
139 reg = <0x20>;
140 gpio-controller;
141 #gpio-cells = <2>;
146 reg = <0x21>;
147 gpio-controller;
148 #gpio-cells = <2>;
153 reg = <0x50>;
159 flash@0 {
160 compatible = "cfi-flash";
161 reg = <0x00000000 0x4000000>;
162 bank-width = <2>;
165 compatible = "fixed-partitions";
166 #address-cells = <1>;
167 #size-cells = <1>;
169 partition@0 {
171 reg = <0x00000000 0x01000000>;
176 reg = <0x01000000 0x03000000>;
183 clock-frequency = <48000000>;
187 clock-frequency = <32768>;
191 /* RIIC ch3 (Port Expander, EEPROM (MAC Addr), Audio Codec) */
205 pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */
218 <RZA1_PINMUX(2, 0, 2)>, /* ET_TXCLK */
250 pinctrl-names = "default";
251 pinctrl-0 = <ðer_pins>;
253 renesas,no-ether-link;
254 phy-handle = <&phy0>;
255 phy0: ethernet-phy@0 {
256 compatible = "ethernet-phy-idb824.2814",
257 "ethernet-phy-ieee802.3-c22";
258 reg = <0>;
263 pinctrl-names = "default";
264 pinctrl-0 = <&sdhi1_pins>;
265 bus-width = <4>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&scif2_pins>;