Lines Matching +full:ch3 +full:- +full:0
7 - compatible: Must contain one or more of the following:
8 - "renesas,etheravb-r8a7742" for the R8A7742 SoC.
9 - "renesas,etheravb-r8a7743" for the R8A7743 SoC.
10 - "renesas,etheravb-r8a7744" for the R8A7744 SoC.
11 - "renesas,etheravb-r8a7745" for the R8A7745 SoC.
12 - "renesas,etheravb-r8a77470" for the R8A77470 SoC.
13 - "renesas,etheravb-r8a7790" for the R8A7790 SoC.
14 - "renesas,etheravb-r8a7791" for the R8A7791 SoC.
15 - "renesas,etheravb-r8a7792" for the R8A7792 SoC.
16 - "renesas,etheravb-r8a7793" for the R8A7793 SoC.
17 - "renesas,etheravb-r8a7794" for the R8A7794 SoC.
18 - "renesas,etheravb-rcar-gen2" as a fallback for the above
19 R-Car Gen2 and RZ/G1 devices.
21 - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC.
22 - "renesas,etheravb-r8a774b1" for the R8A774B1 SoC.
23 - "renesas,etheravb-r8a774c0" for the R8A774C0 SoC.
24 - "renesas,etheravb-r8a774e1" for the R8A774E1 SoC.
25 - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
26 - "renesas,etheravb-r8a7796" for the R8A77960 SoC.
27 - "renesas,etheravb-r8a77961" for the R8A77961 SoC.
28 - "renesas,etheravb-r8a77965" for the R8A77965 SoC.
29 - "renesas,etheravb-r8a77970" for the R8A77970 SoC.
30 - "renesas,etheravb-r8a77980" for the R8A77980 SoC.
31 - "renesas,etheravb-r8a77990" for the R8A77990 SoC.
32 - "renesas,etheravb-r8a77995" for the R8A77995 SoC.
33 - "renesas,etheravb-rcar-gen3" as a fallback for the above
34 R-Car Gen3 and RZ/G2 devices.
37 SoC-specific version corresponding to the platform first followed by
40 - reg: Offset and length of (1) the register block and (2) the stream buffer.
43 R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A77960),
44 M3-W+ (R8A77961), and M3-N (R8A77965).
45 - interrupts: A list of interrupt-specifiers, one for each entry in
46 interrupt-names.
47 If interrupt-names is not present, an interrupt specifier
49 - phy-mode: see ethernet.txt file in the same directory.
50 - phy-handle: see ethernet.txt file in the same directory.
51 - #address-cells: number of address cells for the MDIO bus, must be equal to 1.
52 - #size-cells: number of size cells on the MDIO bus, must be equal to 0.
53 - clocks: clock phandle and specifier pair.
54 - pinctrl-0: phandle, referring to a default pin configuration node.
57 - interrupt-names: A list of interrupt names.
58 For the R-Car Gen 3 SoCs this property is mandatory;
60 where %u is the channel number ranging from 0 to 24.
63 - pinctrl-names: pin configuration state name ("default").
64 - renesas,no-ether-link: boolean, specify when a board does not provide a proper
66 - renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
67 active-low instead of normal active-high.
72 compatible = "renesas,etheravb-r8a7795", "renesas,etheravb-rcar-gen3";
73 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
74 interrupt-parent = <&gic>;
100 interrupt-names = "ch0", "ch1", "ch2", "ch3",
108 power-domains = <&cpg>;
109 phy-mode = "rgmii-id";
110 phy-handle = <&phy0>;
112 pinctrl-0 = <ðer_pins>;
113 pinctrl-names = "default";
114 renesas,no-ether-link;
115 #address-cells = <1>;
116 #size-cells = <0>;
118 phy0: ethernet-phy@0 {
119 rxc-skew-ps = <900>;
120 rxdv-skew-ps = <0>;
121 rxd0-skew-ps = <0>;
122 rxd1-skew-ps = <0>;
123 rxd2-skew-ps = <0>;
124 rxd3-skew-ps = <0>;
125 txc-skew-ps = <900>;
126 txen-skew-ps = <0>;
127 txd0-skew-ps = <0>;
128 txd1-skew-ps = <0>;
129 txd2-skew-ps = <0>;
130 txd3-skew-ps = <0>;
131 reg = <0>;
132 interrupt-parent = <&gpio2>;