Lines Matching +full:ch3 +full:- +full:0
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
18 cpu0: cpu@0 {
19 compatible = "arm,cortex-a7";
20 clock-frequency = <650000000>;
22 reg = <0>;
26 arm-pmu {
27 compatible = "arm,cortex-a7-pmu";
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
34 compatible = "arm,psci-1.0";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
56 clk_hse: clk-hse {
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <24000000>;
62 clk_hsi: clk-hsi {
63 #clock-cells = <0>;
64 compatible = "fixed-clock";
65 clock-frequency = <64000000>;
68 clk_lse: clk-lse {
69 #clock-cells = <0>;
70 compatible = "fixed-clock";
71 clock-frequency = <32768>;
74 clk_lsi: clk-lsi {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <32000>;
80 clk_csi: clk-csi {
81 #clock-cells = <0>;
82 compatible = "fixed-clock";
83 clock-frequency = <4000000>;
87 thermal-zones {
88 cpu_thermal: cpu-thermal {
89 polling-delay-passive = <0>;
90 polling-delay = <0>;
91 thermal-sensors = <&dts>;
94 cpu_alert1: cpu-alert1 {
96 hysteresis = <0>;
100 cpu-crit {
102 hysteresis = <0>;
107 cooling-maps {
112 booster: regulator-booster {
113 compatible = "st,stm32mp1-booster";
119 compatible = "simple-bus";
120 #address-cells = <1>;
121 #size-cells = <1>;
122 interrupt-parent = <&intc>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128 compatible = "st,stm32-timers";
129 reg = <0x40000000 0x400>;
131 interrupt-names = "global";
133 clock-names = "int";
134 dmas = <&dmamux1 18 0x400 0x1>,
135 <&dmamux1 19 0x400 0x1>,
136 <&dmamux1 20 0x400 0x1>,
137 <&dmamux1 21 0x400 0x1>,
138 <&dmamux1 22 0x400 0x1>;
139 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
143 compatible = "st,stm32-pwm";
144 #pwm-cells = <3>;
149 compatible = "st,stm32h7-timer-trigger";
155 compatible = "st,stm32-timer-counter";
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "st,stm32-timers";
164 reg = <0x40001000 0x400>;
166 interrupt-names = "global";
168 clock-names = "int";
169 dmas = <&dmamux1 23 0x400 0x1>,
170 <&dmamux1 24 0x400 0x1>,
171 <&dmamux1 25 0x400 0x1>,
172 <&dmamux1 26 0x400 0x1>,
173 <&dmamux1 27 0x400 0x1>,
174 <&dmamux1 28 0x400 0x1>;
175 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
179 compatible = "st,stm32-pwm";
180 #pwm-cells = <3>;
185 compatible = "st,stm32h7-timer-trigger";
191 compatible = "st,stm32-timer-counter";
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "st,stm32-timers";
200 reg = <0x40002000 0x400>;
202 interrupt-names = "global";
204 clock-names = "int";
205 dmas = <&dmamux1 29 0x400 0x1>,
206 <&dmamux1 30 0x400 0x1>,
207 <&dmamux1 31 0x400 0x1>,
208 <&dmamux1 32 0x400 0x1>;
209 dma-names = "ch1", "ch2", "ch3", "ch4";
213 compatible = "st,stm32-pwm";
214 #pwm-cells = <3>;
219 compatible = "st,stm32h7-timer-trigger";
225 compatible = "st,stm32-timer-counter";
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "st,stm32-timers";
234 reg = <0x40003000 0x400>;
236 interrupt-names = "global";
238 clock-names = "int";
239 dmas = <&dmamux1 55 0x400 0x1>,
240 <&dmamux1 56 0x400 0x1>,
241 <&dmamux1 57 0x400 0x1>,
242 <&dmamux1 58 0x400 0x1>,
243 <&dmamux1 59 0x400 0x1>,
244 <&dmamux1 60 0x400 0x1>;
245 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
249 compatible = "st,stm32-pwm";
250 #pwm-cells = <3>;
255 compatible = "st,stm32h7-timer-trigger";
261 compatible = "st,stm32-timer-counter";
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "st,stm32-timers";
270 reg = <0x40004000 0x400>;
272 interrupt-names = "global";
274 clock-names = "int";
275 dmas = <&dmamux1 69 0x400 0x1>;
276 dma-names = "up";
280 compatible = "st,stm32h7-timer-trigger";
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "st,stm32-timers";
290 reg = <0x40005000 0x400>;
292 interrupt-names = "global";
294 clock-names = "int";
295 dmas = <&dmamux1 70 0x400 0x1>;
296 dma-names = "up";
300 compatible = "st,stm32h7-timer-trigger";
307 #address-cells = <1>;
308 #size-cells = <0>;
309 compatible = "st,stm32-timers";
310 reg = <0x40006000 0x400>;
312 interrupt-names = "global";
314 clock-names = "int";
318 compatible = "st,stm32-pwm";
319 #pwm-cells = <3>;
324 compatible = "st,stm32h7-timer-trigger";
331 #address-cells = <1>;
332 #size-cells = <0>;
333 compatible = "st,stm32-timers";
334 reg = <0x40007000 0x400>;
336 interrupt-names = "global";
338 clock-names = "int";
342 compatible = "st,stm32-pwm";
343 #pwm-cells = <3>;
348 compatible = "st,stm32h7-timer-trigger";
355 #address-cells = <1>;
356 #size-cells = <0>;
357 compatible = "st,stm32-timers";
358 reg = <0x40008000 0x400>;
360 interrupt-names = "global";
362 clock-names = "int";
366 compatible = "st,stm32-pwm";
367 #pwm-cells = <3>;
372 compatible = "st,stm32h7-timer-trigger";
379 #address-cells = <1>;
380 #size-cells = <0>;
381 compatible = "st,stm32-lptimer";
382 reg = <0x40009000 0x400>;
383 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
385 clock-names = "mux";
386 wakeup-source;
390 compatible = "st,stm32-pwm-lp";
391 #pwm-cells = <3>;
395 trigger@0 {
396 compatible = "st,stm32-lptimer-trigger";
397 reg = <0>;
402 compatible = "st,stm32-lptimer-counter";
408 #address-cells = <1>;
409 #size-cells = <0>;
410 compatible = "st,stm32h7-spi";
411 reg = <0x4000b000 0x400>;
415 dmas = <&dmamux1 39 0x400 0x05>,
416 <&dmamux1 40 0x400 0x05>;
417 dma-names = "rx", "tx";
421 i2s2: audio-controller@4000b000 {
422 compatible = "st,stm32h7-i2s";
423 #sound-dai-cells = <0>;
424 reg = <0x4000b000 0x400>;
426 dmas = <&dmamux1 39 0x400 0x01>,
427 <&dmamux1 40 0x400 0x01>;
428 dma-names = "rx", "tx";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 compatible = "st,stm32h7-spi";
436 reg = <0x4000c000 0x400>;
440 dmas = <&dmamux1 61 0x400 0x05>,
441 <&dmamux1 62 0x400 0x05>;
442 dma-names = "rx", "tx";
446 i2s3: audio-controller@4000c000 {
447 compatible = "st,stm32h7-i2s";
448 #sound-dai-cells = <0>;
449 reg = <0x4000c000 0x400>;
451 dmas = <&dmamux1 61 0x400 0x01>,
452 <&dmamux1 62 0x400 0x01>;
453 dma-names = "rx", "tx";
457 spdifrx: audio-controller@4000d000 {
458 compatible = "st,stm32h7-spdifrx";
459 #sound-dai-cells = <0>;
460 reg = <0x4000d000 0x400>;
462 clock-names = "kclk";
464 dmas = <&dmamux1 93 0x400 0x01>,
465 <&dmamux1 94 0x400 0x01>;
466 dma-names = "rx", "rx-ctrl";
471 compatible = "st,stm32h7-uart";
472 reg = <0x4000e000 0x400>;
473 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
475 wakeup-source;
476 dmas = <&dmamux1 43 0x400 0x15>,
477 <&dmamux1 44 0x400 0x11>;
478 dma-names = "rx", "tx";
483 compatible = "st,stm32h7-uart";
484 reg = <0x4000f000 0x400>;
485 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
487 wakeup-source;
488 dmas = <&dmamux1 45 0x400 0x15>,
489 <&dmamux1 46 0x400 0x11>;
490 dma-names = "rx", "tx";
495 compatible = "st,stm32h7-uart";
496 reg = <0x40010000 0x400>;
497 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
499 wakeup-source;
500 dmas = <&dmamux1 63 0x400 0x15>,
501 <&dmamux1 64 0x400 0x11>;
502 dma-names = "rx", "tx";
507 compatible = "st,stm32h7-uart";
508 reg = <0x40011000 0x400>;
509 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
511 wakeup-source;
512 dmas = <&dmamux1 65 0x400 0x15>,
513 <&dmamux1 66 0x400 0x11>;
514 dma-names = "rx", "tx";
519 compatible = "st,stm32mp15-i2c";
520 reg = <0x40012000 0x400>;
521 interrupt-names = "event", "error";
526 #address-cells = <1>;
527 #size-cells = <0>;
528 st,syscfg-fmp = <&syscfg 0x4 0x1>;
529 wakeup-source;
530 i2c-analog-filter;
535 compatible = "st,stm32mp15-i2c";
536 reg = <0x40013000 0x400>;
537 interrupt-names = "event", "error";
542 #address-cells = <1>;
543 #size-cells = <0>;
544 st,syscfg-fmp = <&syscfg 0x4 0x2>;
545 wakeup-source;
546 i2c-analog-filter;
551 compatible = "st,stm32mp15-i2c";
552 reg = <0x40014000 0x400>;
553 interrupt-names = "event", "error";
558 #address-cells = <1>;
559 #size-cells = <0>;
560 st,syscfg-fmp = <&syscfg 0x4 0x4>;
561 wakeup-source;
562 i2c-analog-filter;
567 compatible = "st,stm32mp15-i2c";
568 reg = <0x40015000 0x400>;
569 interrupt-names = "event", "error";
574 #address-cells = <1>;
575 #size-cells = <0>;
576 st,syscfg-fmp = <&syscfg 0x4 0x10>;
577 wakeup-source;
578 i2c-analog-filter;
583 compatible = "st,stm32-cec";
584 reg = <0x40016000 0x400>;
587 clock-names = "cec", "hdmi-cec";
592 compatible = "st,stm32h7-dac-core";
593 reg = <0x40017000 0x400>;
595 clock-names = "pclk";
596 #address-cells = <1>;
597 #size-cells = <0>;
601 compatible = "st,stm32-dac";
602 #io-channel-cells = <1>;
608 compatible = "st,stm32-dac";
609 #io-channel-cells = <1>;
616 compatible = "st,stm32h7-uart";
617 reg = <0x40018000 0x400>;
618 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
620 wakeup-source;
621 dmas = <&dmamux1 79 0x400 0x15>,
622 <&dmamux1 80 0x400 0x11>;
623 dma-names = "rx", "tx";
628 compatible = "st,stm32h7-uart";
629 reg = <0x40019000 0x400>;
630 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
632 wakeup-source;
633 dmas = <&dmamux1 81 0x400 0x15>,
634 <&dmamux1 82 0x400 0x11>;
635 dma-names = "rx", "tx";
640 #address-cells = <1>;
641 #size-cells = <0>;
642 compatible = "st,stm32-timers";
643 reg = <0x44000000 0x400>;
648 interrupt-names = "brk", "up", "trg-com", "cc";
650 clock-names = "int";
651 dmas = <&dmamux1 11 0x400 0x1>,
652 <&dmamux1 12 0x400 0x1>,
653 <&dmamux1 13 0x400 0x1>,
654 <&dmamux1 14 0x400 0x1>,
655 <&dmamux1 15 0x400 0x1>,
656 <&dmamux1 16 0x400 0x1>,
657 <&dmamux1 17 0x400 0x1>;
658 dma-names = "ch1", "ch2", "ch3", "ch4",
663 compatible = "st,stm32-pwm";
664 #pwm-cells = <3>;
668 timer@0 {
669 compatible = "st,stm32h7-timer-trigger";
670 reg = <0>;
675 compatible = "st,stm32-timer-counter";
681 #address-cells = <1>;
682 #size-cells = <0>;
683 compatible = "st,stm32-timers";
684 reg = <0x44001000 0x400>;
689 interrupt-names = "brk", "up", "trg-com", "cc";
691 clock-names = "int";
692 dmas = <&dmamux1 47 0x400 0x1>,
693 <&dmamux1 48 0x400 0x1>,
694 <&dmamux1 49 0x400 0x1>,
695 <&dmamux1 50 0x400 0x1>,
696 <&dmamux1 51 0x400 0x1>,
697 <&dmamux1 52 0x400 0x1>,
698 <&dmamux1 53 0x400 0x1>;
699 dma-names = "ch1", "ch2", "ch3", "ch4",
704 compatible = "st,stm32-pwm";
705 #pwm-cells = <3>;
710 compatible = "st,stm32h7-timer-trigger";
716 compatible = "st,stm32-timer-counter";
722 compatible = "st,stm32h7-uart";
723 reg = <0x44003000 0x400>;
724 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
726 wakeup-source;
727 dmas = <&dmamux1 71 0x400 0x15>,
728 <&dmamux1 72 0x400 0x11>;
729 dma-names = "rx", "tx";
734 #address-cells = <1>;
735 #size-cells = <0>;
736 compatible = "st,stm32h7-spi";
737 reg = <0x44004000 0x400>;
741 dmas = <&dmamux1 37 0x400 0x05>,
742 <&dmamux1 38 0x400 0x05>;
743 dma-names = "rx", "tx";
747 i2s1: audio-controller@44004000 {
748 compatible = "st,stm32h7-i2s";
749 #sound-dai-cells = <0>;
750 reg = <0x44004000 0x400>;
752 dmas = <&dmamux1 37 0x400 0x01>,
753 <&dmamux1 38 0x400 0x01>;
754 dma-names = "rx", "tx";
759 #address-cells = <1>;
760 #size-cells = <0>;
761 compatible = "st,stm32h7-spi";
762 reg = <0x44005000 0x400>;
766 dmas = <&dmamux1 83 0x400 0x05>,
767 <&dmamux1 84 0x400 0x05>;
768 dma-names = "rx", "tx";
773 #address-cells = <1>;
774 #size-cells = <0>;
775 compatible = "st,stm32-timers";
776 reg = <0x44006000 0x400>;
778 interrupt-names = "global";
780 clock-names = "int";
781 dmas = <&dmamux1 105 0x400 0x1>,
782 <&dmamux1 106 0x400 0x1>,
783 <&dmamux1 107 0x400 0x1>,
784 <&dmamux1 108 0x400 0x1>;
785 dma-names = "ch1", "up", "trig", "com";
789 compatible = "st,stm32-pwm";
790 #pwm-cells = <3>;
795 compatible = "st,stm32h7-timer-trigger";
802 #address-cells = <1>;
803 #size-cells = <0>;
804 compatible = "st,stm32-timers";
805 reg = <0x44007000 0x400>;
807 interrupt-names = "global";
809 clock-names = "int";
810 dmas = <&dmamux1 109 0x400 0x1>,
811 <&dmamux1 110 0x400 0x1>;
812 dma-names = "ch1", "up";
816 compatible = "st,stm32-pwm";
817 #pwm-cells = <3>;
821 compatible = "st,stm32h7-timer-trigger";
828 #address-cells = <1>;
829 #size-cells = <0>;
830 compatible = "st,stm32-timers";
831 reg = <0x44008000 0x400>;
833 interrupt-names = "global";
835 clock-names = "int";
836 dmas = <&dmamux1 111 0x400 0x1>,
837 <&dmamux1 112 0x400 0x1>;
838 dma-names = "ch1", "up";
842 compatible = "st,stm32-pwm";
843 #pwm-cells = <3>;
848 compatible = "st,stm32h7-timer-trigger";
855 #address-cells = <1>;
856 #size-cells = <0>;
857 compatible = "st,stm32h7-spi";
858 reg = <0x44009000 0x400>;
862 dmas = <&dmamux1 85 0x400 0x05>,
863 <&dmamux1 86 0x400 0x05>;
864 dma-names = "rx", "tx";
869 compatible = "st,stm32h7-sai";
870 #address-cells = <1>;
871 #size-cells = <1>;
872 ranges = <0 0x4400a000 0x400>;
873 reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>;
878 sai1a: audio-controller@4400a004 {
879 #sound-dai-cells = <0>;
881 compatible = "st,stm32-sai-sub-a";
882 reg = <0x4 0x20>;
884 clock-names = "sai_ck";
885 dmas = <&dmamux1 87 0x400 0x01>;
889 sai1b: audio-controller@4400a024 {
890 #sound-dai-cells = <0>;
891 compatible = "st,stm32-sai-sub-b";
892 reg = <0x24 0x20>;
894 clock-names = "sai_ck";
895 dmas = <&dmamux1 88 0x400 0x01>;
901 compatible = "st,stm32h7-sai";
902 #address-cells = <1>;
903 #size-cells = <1>;
904 ranges = <0 0x4400b000 0x400>;
905 reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
910 sai2a: audio-controller@4400b004 {
911 #sound-dai-cells = <0>;
912 compatible = "st,stm32-sai-sub-a";
913 reg = <0x4 0x20>;
915 clock-names = "sai_ck";
916 dmas = <&dmamux1 89 0x400 0x01>;
920 sai2b: audio-controller@4400b024 {
921 #sound-dai-cells = <0>;
922 compatible = "st,stm32-sai-sub-b";
923 reg = <0x24 0x20>;
925 clock-names = "sai_ck";
926 dmas = <&dmamux1 90 0x400 0x01>;
932 compatible = "st,stm32h7-sai";
933 #address-cells = <1>;
934 #size-cells = <1>;
935 ranges = <0 0x4400c000 0x400>;
936 reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>;
941 sai3a: audio-controller@4400c004 {
942 #sound-dai-cells = <0>;
943 compatible = "st,stm32-sai-sub-a";
944 reg = <0x04 0x20>;
946 clock-names = "sai_ck";
947 dmas = <&dmamux1 113 0x400 0x01>;
951 sai3b: audio-controller@4400c024 {
952 #sound-dai-cells = <0>;
953 compatible = "st,stm32-sai-sub-b";
954 reg = <0x24 0x20>;
956 clock-names = "sai_ck";
957 dmas = <&dmamux1 114 0x400 0x01>;
963 compatible = "st,stm32mp1-dfsdm";
964 reg = <0x4400d000 0x800>;
966 clock-names = "dfsdm";
967 #address-cells = <1>;
968 #size-cells = <0>;
971 dfsdm0: filter@0 {
972 compatible = "st,stm32-dfsdm-adc";
973 #io-channel-cells = <1>;
974 reg = <0>;
976 dmas = <&dmamux1 101 0x400 0x01>;
977 dma-names = "rx";
982 compatible = "st,stm32-dfsdm-adc";
983 #io-channel-cells = <1>;
986 dmas = <&dmamux1 102 0x400 0x01>;
987 dma-names = "rx";
992 compatible = "st,stm32-dfsdm-adc";
993 #io-channel-cells = <1>;
996 dmas = <&dmamux1 103 0x400 0x01>;
997 dma-names = "rx";
1002 compatible = "st,stm32-dfsdm-adc";
1003 #io-channel-cells = <1>;
1006 dmas = <&dmamux1 104 0x400 0x01>;
1007 dma-names = "rx";
1012 compatible = "st,stm32-dfsdm-adc";
1013 #io-channel-cells = <1>;
1016 dmas = <&dmamux1 91 0x400 0x01>;
1017 dma-names = "rx";
1022 compatible = "st,stm32-dfsdm-adc";
1023 #io-channel-cells = <1>;
1026 dmas = <&dmamux1 92 0x400 0x01>;
1027 dma-names = "rx";
1032 dma1: dma-controller@48000000 {
1033 compatible = "st,stm32-dma";
1034 reg = <0x48000000 0x400>;
1045 #dma-cells = <4>;
1047 dma-requests = <8>;
1050 dma2: dma-controller@48001000 {
1051 compatible = "st,stm32-dma";
1052 reg = <0x48001000 0x400>;
1063 #dma-cells = <4>;
1065 dma-requests = <8>;
1068 dmamux1: dma-router@48002000 {
1069 compatible = "st,stm32h7-dmamux";
1070 reg = <0x48002000 0x40>;
1071 #dma-cells = <3>;
1072 dma-requests = <128>;
1073 dma-masters = <&dma1 &dma2>;
1074 dma-channels = <16>;
1080 compatible = "st,stm32mp1-adc-core";
1081 reg = <0x48003000 0x400>;
1085 clock-names = "bus", "adc";
1086 interrupt-controller;
1088 #interrupt-cells = <1>;
1089 #address-cells = <1>;
1090 #size-cells = <0>;
1093 adc1: adc@0 {
1094 compatible = "st,stm32mp1-adc";
1095 #io-channel-cells = <1>;
1096 #address-cells = <1>;
1097 #size-cells = <0>;
1098 reg = <0x0>;
1099 interrupt-parent = <&adc>;
1100 interrupts = <0>;
1101 dmas = <&dmamux1 9 0x400 0x01>;
1102 dma-names = "rx";
1107 compatible = "st,stm32mp1-adc";
1108 #io-channel-cells = <1>;
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1111 reg = <0x100>;
1112 interrupt-parent = <&adc>;
1114 dmas = <&dmamux1 10 0x400 0x01>;
1115 dma-names = "rx";
1116 nvmem-cells = <&vrefint>;
1117 nvmem-cell-names = "vrefint";
1131 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1132 arm,primecell-periphid = <0x00253180>;
1133 reg = <0x48004000 0x400>;
1136 clock-names = "apb_pclk";
1138 cap-sd-highspeed;
1139 cap-mmc-highspeed;
1140 max-frequency = <120000000>;
1144 usbotg_hs: usb-otg@49000000 {
1145 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1146 reg = <0x49000000 0x10000>;
1148 clock-names = "otg", "utmi";
1150 reset-names = "dwc2";
1152 g-rx-fifo-size = <512>;
1153 g-np-tx-fifo-size = <32>;
1154 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1156 otg-rev = <0x200>;
1157 usb33d-supply = <&usb33>;
1162 compatible = "st,stm32mp1-ipcc";
1163 #mbox-cells = <1>;
1164 reg = <0x4c001000 0x400>;
1165 st,proc-id = <0>;
1166 interrupts-extended =
1169 interrupt-names = "rx", "tx";
1171 wakeup-source;
1176 compatible = "st,stm32-dcmi";
1177 reg = <0x4c006000 0x400>;
1181 clock-names = "mclk";
1182 dmas = <&dmamux1 75 0x400 0x01>;
1183 dma-names = "tx";
1188 compatible = "st,stm32mp1-rcc", "syscon";
1189 reg = <0x50000000 0x1000>;
1190 #clock-cells = <1>;
1191 #reset-cells = <1>;
1195 compatible = "st,stm32mp1,pwr-reg";
1196 reg = <0x50001000 0x10>;
1199 regulator-name = "reg11";
1200 regulator-min-microvolt = <1100000>;
1201 regulator-max-microvolt = <1100000>;
1205 regulator-name = "reg18";
1206 regulator-min-microvolt = <1800000>;
1207 regulator-max-microvolt = <1800000>;
1211 regulator-name = "usb33";
1212 regulator-min-microvolt = <3300000>;
1213 regulator-max-microvolt = <3300000>;
1218 compatible = "st,stm32mp151-pwr-mcu", "syscon";
1219 reg = <0x50001014 0x4>;
1222 exti: interrupt-controller@5000d000 {
1223 compatible = "st,stm32mp1-exti", "syscon";
1224 interrupt-controller;
1225 #interrupt-cells = <2>;
1226 reg = <0x5000d000 0x400>;
1230 compatible = "st,stm32mp157-syscfg", "syscon";
1231 reg = <0x50020000 0x400>;
1236 #address-cells = <1>;
1237 #size-cells = <0>;
1238 compatible = "st,stm32-lptimer";
1239 reg = <0x50021000 0x400>;
1240 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1242 clock-names = "mux";
1243 wakeup-source;
1247 compatible = "st,stm32-pwm-lp";
1248 #pwm-cells = <3>;
1253 compatible = "st,stm32-lptimer-trigger";
1259 compatible = "st,stm32-lptimer-counter";
1265 #address-cells = <1>;
1266 #size-cells = <0>;
1267 compatible = "st,stm32-lptimer";
1268 reg = <0x50022000 0x400>;
1269 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1271 clock-names = "mux";
1272 wakeup-source;
1276 compatible = "st,stm32-pwm-lp";
1277 #pwm-cells = <3>;
1282 compatible = "st,stm32-lptimer-trigger";
1289 compatible = "st,stm32-lptimer";
1290 reg = <0x50023000 0x400>;
1291 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
1293 clock-names = "mux";
1294 wakeup-source;
1298 compatible = "st,stm32-pwm-lp";
1299 #pwm-cells = <3>;
1305 compatible = "st,stm32-lptimer";
1306 reg = <0x50024000 0x400>;
1307 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
1309 clock-names = "mux";
1310 wakeup-source;
1314 compatible = "st,stm32-pwm-lp";
1315 #pwm-cells = <3>;
1321 compatible = "st,stm32-vrefbuf";
1322 reg = <0x50025000 0x8>;
1323 regulator-min-microvolt = <1500000>;
1324 regulator-max-microvolt = <2500000>;
1330 compatible = "st,stm32h7-sai";
1331 #address-cells = <1>;
1332 #size-cells = <1>;
1333 ranges = <0 0x50027000 0x400>;
1334 reg = <0x50027000 0x4>, <0x500273f0 0x10>;
1339 sai4a: audio-controller@50027004 {
1340 #sound-dai-cells = <0>;
1341 compatible = "st,stm32-sai-sub-a";
1342 reg = <0x04 0x20>;
1344 clock-names = "sai_ck";
1345 dmas = <&dmamux1 99 0x400 0x01>;
1349 sai4b: audio-controller@50027024 {
1350 #sound-dai-cells = <0>;
1351 compatible = "st,stm32-sai-sub-b";
1352 reg = <0x24 0x20>;
1354 clock-names = "sai_ck";
1355 dmas = <&dmamux1 100 0x400 0x01>;
1361 compatible = "st,stm32-thermal";
1362 reg = <0x50028000 0x100>;
1365 clock-names = "pclk";
1366 #thermal-sensor-cells = <0>;
1371 compatible = "st,stm32f756-hash";
1372 reg = <0x54002000 0x400>;
1376 dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>;
1377 dma-names = "in";
1378 dma-maxburst = <2>;
1383 compatible = "st,stm32-rng";
1384 reg = <0x54003000 0x400>;
1390 mdma1: dma-controller@58000000 {
1391 compatible = "st,stm32h7-mdma";
1392 reg = <0x58000000 0x1000>;
1396 #dma-cells = <5>;
1397 dma-channels = <32>;
1398 dma-requests = <48>;
1401 fmc: memory-controller@58002000 {
1402 #address-cells = <2>;
1403 #size-cells = <1>;
1404 compatible = "st,stm32mp1-fmc2-ebi";
1405 reg = <0x58002000 0x1000>;
1410 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
1411 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
1412 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
1413 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
1414 <4 0 0x80000000 0x10000000>; /* NAND */
1416 nand-controller@4,0 {
1417 #address-cells = <1>;
1418 #size-cells = <0>;
1419 compatible = "st,stm32mp1-fmc2-nfc";
1420 reg = <4 0x00000000 0x1000>,
1421 <4 0x08010000 0x1000>,
1422 <4 0x08020000 0x1000>,
1423 <4 0x01000000 0x1000>,
1424 <4 0x09010000 0x1000>,
1425 <4 0x09020000 0x1000>;
1427 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
1428 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
1429 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
1430 dma-names = "tx", "rx", "ecc";
1436 compatible = "st,stm32f469-qspi";
1437 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
1438 reg-names = "qspi", "qspi_mm";
1440 dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>,
1441 <&mdma1 22 0x2 0x10100008 0x0 0x0>;
1442 dma-names = "tx", "rx";
1445 #address-cells = <1>;
1446 #size-cells = <0>;
1451 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1452 arm,primecell-periphid = <0x00253180>;
1453 reg = <0x58005000 0x1000>;
1456 clock-names = "apb_pclk";
1458 cap-sd-highspeed;
1459 cap-mmc-highspeed;
1460 max-frequency = <120000000>;
1465 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1466 arm,primecell-periphid = <0x00253180>;
1467 reg = <0x58007000 0x1000>;
1470 clock-names = "apb_pclk";
1472 cap-sd-highspeed;
1473 cap-mmc-highspeed;
1474 max-frequency = <120000000>;
1479 compatible = "st,stm32f7-crc";
1480 reg = <0x58009000 0x400>;
1486 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1487 reg = <0x5800a000 0x2000>;
1488 reg-names = "stmmaceth";
1489 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1490 interrupt-names = "macirq";
1491 clock-names = "stmmaceth",
1492 "mac-clk-tx",
1493 "mac-clk-rx",
1494 "eth-ck",
1503 st,syscon = <&syscfg 0x4>;
1504 snps,mixed-burst;
1506 snps,en-tx-lpi-clockgating;
1507 snps,axi-config = <&stmmac_axi_config_0>;
1511 stmmac_axi_config_0: stmmac-axi-config {
1512 snps,wr_osr_lmt = <0x7>;
1513 snps,rd_osr_lmt = <0x7>;
1514 snps,blen = <0 0 0 0 16 8 4>;
1519 compatible = "generic-ohci";
1520 reg = <0x5800c000 0x1000>;
1525 phy-names = "usb";
1530 compatible = "generic-ehci";
1531 reg = <0x5800d000 0x1000>;
1537 phy-names = "usb";
1541 ltdc: display-controller@5a001000 {
1542 compatible = "st,stm32-ltdc";
1543 reg = <0x5a001000 0x400>;
1547 clock-names = "lcd";
1553 compatible = "st,stm32mp1-iwdg";
1554 reg = <0x5a002000 0x400>;
1556 clock-names = "pclk", "lsi";
1561 #address-cells = <1>;
1562 #size-cells = <0>;
1563 #clock-cells = <0>;
1564 compatible = "st,stm32mp1-usbphyc";
1565 reg = <0x5a006000 0x1000>;
1568 vdda1v1-supply = <®11>;
1569 vdda1v8-supply = <®18>;
1572 usbphyc_port0: usb-phy@0 {
1573 #phy-cells = <0>;
1574 reg = <0>;
1577 usbphyc_port1: usb-phy@1 {
1578 #phy-cells = <1>;
1584 compatible = "st,stm32h7-uart";
1585 reg = <0x5c000000 0x400>;
1586 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1588 wakeup-source;
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1595 compatible = "st,stm32h7-spi";
1596 reg = <0x5c001000 0x400>;
1600 dmas = <&mdma1 34 0x0 0x40008 0x0 0x0>,
1601 <&mdma1 35 0x0 0x40002 0x0 0x0>;
1602 dma-names = "rx", "tx";
1607 compatible = "st,stm32mp15-i2c";
1608 reg = <0x5c002000 0x400>;
1609 interrupt-names = "event", "error";
1614 #address-cells = <1>;
1615 #size-cells = <0>;
1616 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1617 wakeup-source;
1618 i2c-analog-filter;
1623 compatible = "st,stm32mp1-rtc";
1624 reg = <0x5c004000 0x400>;
1626 clock-names = "pclk", "rtc_ck";
1627 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
1632 compatible = "st,stm32mp15-bsec";
1633 reg = <0x5c005000 0x400>;
1634 #address-cells = <1>;
1635 #size-cells = <1>;
1636 part_number_otp: part-number-otp@4 {
1637 reg = <0x4 0x1>;
1639 vrefint: vrefin-cal@52 {
1640 reg = <0x52 0x2>;
1643 reg = <0x5c 0x2>;
1646 reg = <0x5e 0x2>;
1651 compatible = "st,stm32mp15-i2c";
1652 reg = <0x5c009000 0x400>;
1653 interrupt-names = "event", "error";
1658 #address-cells = <1>;
1659 #size-cells = <0>;
1660 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1661 wakeup-source;
1662 i2c-analog-filter;
1667 compatible = "st,stm32-tamp", "syscon", "simple-mfd";
1668 reg = <0x5c00a000 0x400>;
1676 #address-cells = <1>;
1677 #size-cells = <1>;
1678 compatible = "st,stm32mp157-pinctrl";
1679 ranges = <0 0x50002000 0xa400>;
1680 interrupt-parent = <&exti>;
1681 st,syscfg = <&exti 0x60 0xff>;
1684 gpio-controller;
1685 #gpio-cells = <2>;
1686 interrupt-controller;
1687 #interrupt-cells = <2>;
1688 reg = <0x0 0x400>;
1690 st,bank-name = "GPIOA";
1695 gpio-controller;
1696 #gpio-cells = <2>;
1697 interrupt-controller;
1698 #interrupt-cells = <2>;
1699 reg = <0x1000 0x400>;
1701 st,bank-name = "GPIOB";
1706 gpio-controller;
1707 #gpio-cells = <2>;
1708 interrupt-controller;
1709 #interrupt-cells = <2>;
1710 reg = <0x2000 0x400>;
1712 st,bank-name = "GPIOC";
1717 gpio-controller;
1718 #gpio-cells = <2>;
1719 interrupt-controller;
1720 #interrupt-cells = <2>;
1721 reg = <0x3000 0x400>;
1723 st,bank-name = "GPIOD";
1728 gpio-controller;
1729 #gpio-cells = <2>;
1730 interrupt-controller;
1731 #interrupt-cells = <2>;
1732 reg = <0x4000 0x400>;
1734 st,bank-name = "GPIOE";
1739 gpio-controller;
1740 #gpio-cells = <2>;
1741 interrupt-controller;
1742 #interrupt-cells = <2>;
1743 reg = <0x5000 0x400>;
1745 st,bank-name = "GPIOF";
1750 gpio-controller;
1751 #gpio-cells = <2>;
1752 interrupt-controller;
1753 #interrupt-cells = <2>;
1754 reg = <0x6000 0x400>;
1756 st,bank-name = "GPIOG";
1761 gpio-controller;
1762 #gpio-cells = <2>;
1763 interrupt-controller;
1764 #interrupt-cells = <2>;
1765 reg = <0x7000 0x400>;
1767 st,bank-name = "GPIOH";
1772 gpio-controller;
1773 #gpio-cells = <2>;
1774 interrupt-controller;
1775 #interrupt-cells = <2>;
1776 reg = <0x8000 0x400>;
1778 st,bank-name = "GPIOI";
1783 gpio-controller;
1784 #gpio-cells = <2>;
1785 interrupt-controller;
1786 #interrupt-cells = <2>;
1787 reg = <0x9000 0x400>;
1789 st,bank-name = "GPIOJ";
1794 gpio-controller;
1795 #gpio-cells = <2>;
1796 interrupt-controller;
1797 #interrupt-cells = <2>;
1798 reg = <0xa000 0x400>;
1800 st,bank-name = "GPIOK";
1806 #address-cells = <1>;
1807 #size-cells = <1>;
1808 compatible = "st,stm32mp157-z-pinctrl";
1809 ranges = <0 0x54004000 0x400>;
1810 interrupt-parent = <&exti>;
1811 st,syscfg = <&exti 0x60 0xff>;
1814 gpio-controller;
1815 #gpio-cells = <2>;
1816 interrupt-controller;
1817 #interrupt-cells = <2>;
1818 reg = <0 0x400>;
1820 st,bank-name = "GPIOZ";
1821 st,bank-ioport = <11>;
1828 compatible = "st,mlahb", "simple-bus";
1829 #address-cells = <1>;
1830 #size-cells = <1>;
1832 dma-ranges = <0x00000000 0x38000000 0x10000>,
1833 <0x10000000 0x10000000 0x60000>,
1834 <0x30000000 0x30000000 0x60000>;
1837 compatible = "st,stm32mp1-m4";
1838 reg = <0x10000000 0x40000>,
1839 <0x30000000 0x40000>,
1840 <0x38000000 0x10000>;
1842 reset-names = "mcu_rst";
1843 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1844 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
1845 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
1846 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;