Lines Matching +full:ch3 +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 * The external audio clocks are configured as 0 Hz fixed frequency
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
35 /* External CAN clock - to be overridden by boards that provide it */
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #address-cells = <1>;
44 #size-cells = <0>;
46 a53_0: cpu@0 {
47 compatible = "arm,cortex-a53";
48 reg = <0x0>;
50 power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
51 next-level-cache = <&L2_CA53>;
52 enable-method = "psci";
55 L2_CA53: cache-controller-1 {
57 power-domains = <&sysc R8A77995_PD_CA53_SCU>;
58 cache-unified;
59 cache-level = <2>;
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
67 clock-frequency = <0>;
71 compatible = "arm,cortex-a53-pmu";
72 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
76 compatible = "arm,psci-1.0", "arm,psci-0.2";
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
83 clock-frequency = <0>;
87 compatible = "simple-bus";
88 interrupt-parent = <&gic>;
89 #address-cells = <2>;
90 #size-cells = <2>;
94 compatible = "renesas,r8a77995-wdt",
95 "renesas,rcar-gen3-wdt";
96 reg = <0 0xe6020000 0 0x0c>;
99 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
105 compatible = "renesas,gpio-r8a77995",
106 "renesas,rcar-gen3-gpio";
107 reg = <0 0xe6050000 0 0x50>;
109 #gpio-cells = <2>;
110 gpio-controller;
111 gpio-ranges = <&pfc 0 0 9>;
112 #interrupt-cells = <2>;
113 interrupt-controller;
115 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
120 compatible = "renesas,gpio-r8a77995",
121 "renesas,rcar-gen3-gpio";
122 reg = <0 0xe6051000 0 0x50>;
124 #gpio-cells = <2>;
125 gpio-controller;
126 gpio-ranges = <&pfc 0 32 32>;
127 #interrupt-cells = <2>;
128 interrupt-controller;
130 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
135 compatible = "renesas,gpio-r8a77995",
136 "renesas,rcar-gen3-gpio";
137 reg = <0 0xe6052000 0 0x50>;
139 #gpio-cells = <2>;
140 gpio-controller;
141 gpio-ranges = <&pfc 0 64 32>;
142 #interrupt-cells = <2>;
143 interrupt-controller;
145 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
150 compatible = "renesas,gpio-r8a77995",
151 "renesas,rcar-gen3-gpio";
152 reg = <0 0xe6053000 0 0x50>;
154 #gpio-cells = <2>;
155 gpio-controller;
156 gpio-ranges = <&pfc 0 96 10>;
157 #interrupt-cells = <2>;
158 interrupt-controller;
160 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
165 compatible = "renesas,gpio-r8a77995",
166 "renesas,rcar-gen3-gpio";
167 reg = <0 0xe6054000 0 0x50>;
169 #gpio-cells = <2>;
170 gpio-controller;
171 gpio-ranges = <&pfc 0 128 32>;
172 #interrupt-cells = <2>;
173 interrupt-controller;
175 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
180 compatible = "renesas,gpio-r8a77995",
181 "renesas,rcar-gen3-gpio";
182 reg = <0 0xe6055000 0 0x50>;
184 #gpio-cells = <2>;
185 gpio-controller;
186 gpio-ranges = <&pfc 0 160 21>;
187 #interrupt-cells = <2>;
188 interrupt-controller;
190 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
195 compatible = "renesas,gpio-r8a77995",
196 "renesas,rcar-gen3-gpio";
197 reg = <0 0xe6055400 0 0x50>;
199 #gpio-cells = <2>;
200 gpio-controller;
201 gpio-ranges = <&pfc 0 192 14>;
202 #interrupt-cells = <2>;
203 interrupt-controller;
205 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
210 compatible = "renesas,pfc-r8a77995";
211 reg = <0 0xe6060000 0 0x508>;
215 compatible = "renesas,r8a77995-cmt0",
216 "renesas,rcar-gen3-cmt0";
217 reg = <0 0xe60f0000 0 0x1004>;
221 clock-names = "fck";
222 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
228 compatible = "renesas,r8a77995-cmt1",
229 "renesas,rcar-gen3-cmt1";
230 reg = <0 0xe6130000 0 0x1004>;
240 clock-names = "fck";
241 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
247 compatible = "renesas,r8a77995-cmt1",
248 "renesas,rcar-gen3-cmt1";
249 reg = <0 0xe6140000 0 0x1004>;
259 clock-names = "fck";
260 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
266 compatible = "renesas,r8a77995-cmt1",
267 "renesas,rcar-gen3-cmt1";
268 reg = <0 0xe6148000 0 0x1004>;
278 clock-names = "fck";
279 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
284 cpg: clock-controller@e6150000 {
285 compatible = "renesas,r8a77995-cpg-mssr";
286 reg = <0 0xe6150000 0 0x1000>;
288 clock-names = "extal";
289 #clock-cells = <2>;
290 #power-domain-cells = <0>;
291 #reset-cells = <1>;
294 rst: reset-controller@e6160000 {
295 compatible = "renesas,r8a77995-rst";
296 reg = <0 0xe6160000 0 0x0200>;
299 sysc: system-controller@e6180000 {
300 compatible = "renesas,r8a77995-sysc";
301 reg = <0 0xe6180000 0 0x0400>;
302 #power-domain-cells = <1>;
306 compatible = "renesas,thermal-r8a77995";
307 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
312 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
314 #thermal-sensor-cells = <0>;
317 intc_ex: interrupt-controller@e61c0000 {
318 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
319 #interrupt-cells = <2>;
320 interrupt-controller;
321 reg = <0 0xe61c0000 0 0x200>;
322 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
329 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
334 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
335 reg = <0 0xe61e0000 0 0x30>;
340 clock-names = "fck";
341 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
347 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
348 reg = <0 0xe6fc0000 0 0x30>;
353 clock-names = "fck";
354 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
360 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
361 reg = <0 0xe6fd0000 0 0x30>;
366 clock-names = "fck";
367 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
373 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
374 reg = <0 0xe6fe0000 0 0x30>;
379 clock-names = "fck";
380 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
386 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
387 reg = <0 0xffc00000 0 0x30>;
392 clock-names = "fck";
393 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
399 #address-cells = <1>;
400 #size-cells = <0>;
401 compatible = "renesas,i2c-r8a77995",
402 "renesas,rcar-gen3-i2c";
403 reg = <0 0xe6500000 0 0x40>;
406 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
408 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
409 <&dmac2 0x91>, <&dmac2 0x90>;
410 dma-names = "tx", "rx", "tx", "rx";
411 i2c-scl-internal-delay-ns = <6>;
416 #address-cells = <1>;
417 #size-cells = <0>;
418 compatible = "renesas,i2c-r8a77995",
419 "renesas,rcar-gen3-i2c";
420 reg = <0 0xe6508000 0 0x40>;
423 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
425 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
426 <&dmac2 0x93>, <&dmac2 0x92>;
427 dma-names = "tx", "rx", "tx", "rx";
428 i2c-scl-internal-delay-ns = <6>;
433 #address-cells = <1>;
434 #size-cells = <0>;
435 compatible = "renesas,i2c-r8a77995",
436 "renesas,rcar-gen3-i2c";
437 reg = <0 0xe6510000 0 0x40>;
440 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
442 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
443 <&dmac2 0x95>, <&dmac2 0x94>;
444 dma-names = "tx", "rx", "tx", "rx";
445 i2c-scl-internal-delay-ns = <6>;
450 #address-cells = <1>;
451 #size-cells = <0>;
452 compatible = "renesas,i2c-r8a77995",
453 "renesas,rcar-gen3-i2c";
454 reg = <0 0xe66d0000 0 0x40>;
457 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
459 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
460 dma-names = "tx", "rx";
461 i2c-scl-internal-delay-ns = <6>;
466 compatible = "renesas,hscif-r8a77995",
467 "renesas,rcar-gen3-hscif",
469 reg = <0 0xe6540000 0 0x60>;
474 clock-names = "fck", "brg_int", "scif_clk";
475 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
476 <&dmac2 0x31>, <&dmac2 0x30>;
477 dma-names = "tx", "rx", "tx", "rx";
478 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
484 compatible = "renesas,hscif-r8a77995",
485 "renesas,rcar-gen3-hscif",
487 reg = <0 0xe66a0000 0 0x60>;
492 clock-names = "fck", "brg_int", "scif_clk";
493 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
494 dma-names = "tx", "rx";
495 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
501 compatible = "renesas,usbhs-r8a77995",
502 "renesas,rcar-gen3-usbhs";
503 reg = <0 0xe6590000 0 0x200>;
506 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
507 <&usb_dmac1 0>, <&usb_dmac1 1>;
508 dma-names = "ch0", "ch1", "ch2", "ch3";
511 phy-names = "usb";
512 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
517 usb_dmac0: dma-controller@e65a0000 {
518 compatible = "renesas,r8a77995-usb-dmac",
519 "renesas,usb-dmac";
520 reg = <0 0xe65a0000 0 0x100>;
523 interrupt-names = "ch0", "ch1";
525 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
527 #dma-cells = <1>;
528 dma-channels = <2>;
531 usb_dmac1: dma-controller@e65b0000 {
532 compatible = "renesas,r8a77995-usb-dmac",
533 "renesas,usb-dmac";
534 reg = <0 0xe65b0000 0 0x100>;
537 interrupt-names = "ch0", "ch1";
539 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
541 #dma-cells = <1>;
542 dma-channels = <2>;
546 compatible = "arm,cryptocell-630p-ree";
548 reg = <0x0 0xe6601000 0 0x1000>;
551 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
555 compatible = "renesas,r8a77995-canfd",
556 "renesas,rcar-gen3-canfd";
557 reg = <0 0xe66c0000 0 0x8000>;
560 interrupt-names = "ch_int", "g_int";
564 clock-names = "fck", "canfd", "can_clk";
565 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
566 assigned-clock-rates = <40000000>;
567 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
580 dmac0: dma-controller@e6700000 {
581 compatible = "renesas,dmac-r8a77995",
582 "renesas,rcar-dmac";
583 reg = <0 0xe6700000 0 0x10000>;
593 interrupt-names = "error",
594 "ch0", "ch1", "ch2", "ch3",
597 clock-names = "fck";
598 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
600 #dma-cells = <1>;
601 dma-channels = <8>;
602 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
608 dmac1: dma-controller@e7300000 {
609 compatible = "renesas,dmac-r8a77995",
610 "renesas,rcar-dmac";
611 reg = <0 0xe7300000 0 0x10000>;
621 interrupt-names = "error",
622 "ch0", "ch1", "ch2", "ch3",
625 clock-names = "fck";
626 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
628 #dma-cells = <1>;
629 dma-channels = <8>;
630 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
636 dmac2: dma-controller@e7310000 {
637 compatible = "renesas,dmac-r8a77995",
638 "renesas,rcar-dmac";
639 reg = <0 0xe7310000 0 0x10000>;
649 interrupt-names = "error",
650 "ch0", "ch1", "ch2", "ch3",
653 clock-names = "fck";
654 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
656 #dma-cells = <1>;
657 dma-channels = <8>;
665 compatible = "renesas,ipmmu-r8a77995";
666 reg = <0 0xe6740000 0 0x1000>;
667 renesas,ipmmu-main = <&ipmmu_mm 0>;
668 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
669 #iommu-cells = <1>;
673 compatible = "renesas,ipmmu-r8a77995";
674 reg = <0 0xe7740000 0 0x1000>;
675 renesas,ipmmu-main = <&ipmmu_mm 1>;
676 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
677 #iommu-cells = <1>;
681 compatible = "renesas,ipmmu-r8a77995";
682 reg = <0 0xe6570000 0 0x1000>;
683 renesas,ipmmu-main = <&ipmmu_mm 2>;
684 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
685 #iommu-cells = <1>;
689 compatible = "renesas,ipmmu-r8a77995";
690 reg = <0 0xe67b0000 0 0x1000>;
693 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
694 #iommu-cells = <1>;
698 compatible = "renesas,ipmmu-r8a77995";
699 reg = <0 0xec670000 0 0x1000>;
700 renesas,ipmmu-main = <&ipmmu_mm 4>;
701 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
702 #iommu-cells = <1>;
706 compatible = "renesas,ipmmu-r8a77995";
707 reg = <0 0xfd800000 0 0x1000>;
708 renesas,ipmmu-main = <&ipmmu_mm 6>;
709 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
710 #iommu-cells = <1>;
714 compatible = "renesas,ipmmu-r8a77995";
715 reg = <0 0xffc80000 0 0x1000>;
716 renesas,ipmmu-main = <&ipmmu_mm 10>;
717 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
718 #iommu-cells = <1>;
722 compatible = "renesas,ipmmu-r8a77995";
723 reg = <0 0xfe6b0000 0 0x1000>;
724 renesas,ipmmu-main = <&ipmmu_mm 12>;
725 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
726 #iommu-cells = <1>;
730 compatible = "renesas,ipmmu-r8a77995";
731 reg = <0 0xfebd0000 0 0x1000>;
732 renesas,ipmmu-main = <&ipmmu_mm 14>;
733 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
734 #iommu-cells = <1>;
738 compatible = "renesas,ipmmu-r8a77995";
739 reg = <0 0xfe990000 0 0x1000>;
740 renesas,ipmmu-main = <&ipmmu_mm 16>;
741 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
742 #iommu-cells = <1>;
746 compatible = "renesas,etheravb-r8a77995",
747 "renesas,etheravb-rcar-gen3";
748 reg = <0 0xe6800000 0 0x800>;
774 interrupt-names = "ch0", "ch1", "ch2", "ch3",
782 clock-names = "fck";
783 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
785 phy-mode = "rgmii";
786 rx-internal-delay-ps = <1800>;
788 #address-cells = <1>;
789 #size-cells = <0>;
794 compatible = "renesas,can-r8a77995",
795 "renesas,rcar-gen3-can";
796 reg = <0 0xe6c30000 0 0x1000>;
801 clock-names = "clkp1", "clkp2", "can_clk";
802 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
803 assigned-clock-rates = <40000000>;
804 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
810 compatible = "renesas,can-r8a77995",
811 "renesas,rcar-gen3-can";
812 reg = <0 0xe6c38000 0 0x1000>;
817 clock-names = "clkp1", "clkp2", "can_clk";
818 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
819 assigned-clock-rates = <40000000>;
820 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
826 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
827 reg = <0 0xe6e30000 0 0x8>;
828 #pwm-cells = <2>;
830 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
836 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
837 reg = <0 0xe6e31000 0 0x8>;
838 #pwm-cells = <2>;
840 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
846 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
847 reg = <0 0xe6e32000 0 0x8>;
848 #pwm-cells = <2>;
850 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
856 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
857 reg = <0 0xe6e33000 0 0x8>;
858 #pwm-cells = <2>;
860 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
866 compatible = "renesas,scif-r8a77995",
867 "renesas,rcar-gen3-scif", "renesas,scif";
868 reg = <0 0xe6e60000 0 64>;
873 clock-names = "fck", "brg_int", "scif_clk";
874 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
875 <&dmac2 0x51>, <&dmac2 0x50>;
876 dma-names = "tx", "rx", "tx", "rx";
877 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
883 compatible = "renesas,scif-r8a77995",
884 "renesas,rcar-gen3-scif", "renesas,scif";
885 reg = <0 0xe6e68000 0 64>;
890 clock-names = "fck", "brg_int", "scif_clk";
891 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
892 <&dmac2 0x53>, <&dmac2 0x52>;
893 dma-names = "tx", "rx", "tx", "rx";
894 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
900 compatible = "renesas,scif-r8a77995",
901 "renesas,rcar-gen3-scif", "renesas,scif";
902 reg = <0 0xe6e88000 0 64>;
907 clock-names = "fck", "brg_int", "scif_clk";
908 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
909 <&dmac2 0x13>, <&dmac2 0x12>;
910 dma-names = "tx", "rx", "tx", "rx";
911 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
917 compatible = "renesas,scif-r8a77995",
918 "renesas,rcar-gen3-scif", "renesas,scif";
919 reg = <0 0xe6c50000 0 64>;
924 clock-names = "fck", "brg_int", "scif_clk";
925 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
926 dma-names = "tx", "rx";
927 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
933 compatible = "renesas,scif-r8a77995",
934 "renesas,rcar-gen3-scif", "renesas,scif";
935 reg = <0 0xe6c40000 0 64>;
940 clock-names = "fck", "brg_int", "scif_clk";
941 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
942 dma-names = "tx", "rx";
943 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
949 compatible = "renesas,scif-r8a77995",
950 "renesas,rcar-gen3-scif", "renesas,scif";
951 reg = <0 0xe6f30000 0 64>;
956 clock-names = "fck", "brg_int", "scif_clk";
957 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
958 <&dmac2 0x5b>, <&dmac2 0x5a>;
959 dma-names = "tx", "rx", "tx", "rx";
960 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
966 compatible = "renesas,msiof-r8a77995",
967 "renesas,rcar-gen3-msiof";
968 reg = <0 0xe6e90000 0 0x64>;
971 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
972 <&dmac2 0x41>, <&dmac2 0x40>;
973 dma-names = "tx", "rx", "tx", "rx";
974 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
976 #address-cells = <1>;
977 #size-cells = <0>;
982 compatible = "renesas,msiof-r8a77995",
983 "renesas,rcar-gen3-msiof";
984 reg = <0 0xe6ea0000 0 0x64>;
987 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
988 <&dmac2 0x43>, <&dmac2 0x42>;
989 dma-names = "tx", "rx", "tx", "rx";
990 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
992 #address-cells = <1>;
993 #size-cells = <0>;
998 compatible = "renesas,msiof-r8a77995",
999 "renesas,rcar-gen3-msiof";
1000 reg = <0 0xe6c00000 0 0x64>;
1003 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1004 dma-names = "tx", "rx";
1005 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1007 #address-cells = <1>;
1008 #size-cells = <0>;
1013 compatible = "renesas,msiof-r8a77995",
1014 "renesas,rcar-gen3-msiof";
1015 reg = <0 0xe6c10000 0 0x64>;
1018 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1019 dma-names = "tx", "rx";
1020 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1028 compatible = "renesas,vin-r8a77995";
1029 reg = <0 0xe6ef4000 0 0x1000>;
1032 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1040 * #sound-dai-cells is required if simple-card
1042 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1043 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1046 * #clock-cells is required for audio_clkout0/1/2/3
1048 * clkout : #clock-cells = <0>; <&rcar_sound>;
1049 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1051 compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
1052 reg = <0 0xec500000 0 0x1000>, /* SCU */
1053 <0 0xec5a0000 0 0x100>, /* ADG */
1054 <0 0xec540000 0 0x1000>, /* SSIU */
1055 <0 0xec541000 0 0x280>, /* SSI */
1056 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1057 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1067 clock-names = "ssi-all",
1070 "mix.1", "mix.0",
1071 "ctu.1", "ctu.0",
1072 "dvc.0", "dvc.1",
1074 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1077 reset-names = "ssi-all",
1082 ctu00: ctu-0 { };
1083 ctu01: ctu-1 { };
1084 ctu02: ctu-2 { };
1085 ctu03: ctu-3 { };
1086 ctu10: ctu-4 { };
1087 ctu11: ctu-5 { };
1088 ctu12: ctu-6 { };
1089 ctu13: ctu-7 { };
1093 dvc0: dvc-0 {
1094 dmas = <&audma0 0xbc>;
1095 dma-names = "tx";
1097 dvc1: dvc-1 {
1098 dmas = <&audma0 0xbe>;
1099 dma-names = "tx";
1104 mix0: mix-0 { };
1105 mix1: mix-1 { };
1109 src5: src-5 {
1111 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1112 dma-names = "rx", "tx";
1114 src6: src-6 {
1116 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1117 dma-names = "rx", "tx";
1122 ssi3: ssi-3 {
1124 dmas = <&audma0 0x07>, <&audma0 0x08>,
1125 <&audma0 0x6f>, <&audma0 0x70>;
1126 dma-names = "rx", "tx", "rxu", "txu";
1128 ssi4: ssi-4 {
1130 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1131 <&audma0 0x71>, <&audma0 0x72>;
1132 dma-names = "rx", "tx", "rxu", "txu";
1138 compatible = "renesas,r8a77995-mlp",
1139 "renesas,rcar-gen3-mlp";
1140 reg = <0 0xec520000 0 0x800>;
1144 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1149 audma0: dma-controller@ec700000 {
1150 compatible = "renesas,dmac-r8a77995",
1151 "renesas,rcar-dmac";
1152 reg = <0 0xec700000 0 0x10000>;
1170 interrupt-names = "error",
1171 "ch0", "ch1", "ch2", "ch3",
1176 clock-names = "fck";
1177 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1179 #dma-cells = <1>;
1180 dma-channels = <16>;
1181 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1192 compatible = "generic-ohci";
1193 reg = <0 0xee080000 0 0x100>;
1197 phy-names = "usb";
1198 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1204 compatible = "generic-ehci";
1205 reg = <0 0xee080100 0 0x100>;
1209 phy-names = "usb";
1211 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1216 usb2_phy0: usb-phy@ee080200 {
1217 compatible = "renesas,usb2-phy-r8a77995",
1218 "renesas,rcar-gen3-usb2-phy";
1219 reg = <0 0xee080200 0 0x700>;
1222 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1224 #phy-cells = <1>;
1229 compatible = "renesas,sdhi-r8a77995",
1230 "renesas,rcar-gen3-sdhi";
1231 reg = <0 0xee140000 0 0x2000>;
1234 clock-names = "core", "clkh";
1235 max-frequency = <200000000>;
1236 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1243 compatible = "renesas,r8a77995-rpc-if",
1244 "renesas,rcar-gen3-rpc-if";
1245 reg = <0 0xee200000 0 0x200>,
1246 <0 0x08000000 0 0x04000000>,
1247 <0 0xee208000 0 0x100>;
1248 reg-names = "regs", "dirmap", "wbuf";
1251 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1253 #address-cells = <1>;
1254 #size-cells = <0>;
1258 gic: interrupt-controller@f1010000 {
1259 compatible = "arm,gic-400";
1260 #interrupt-cells = <3>;
1261 #address-cells = <0>;
1262 interrupt-controller;
1263 reg = <0x0 0xf1010000 0 0x1000>,
1264 <0x0 0xf1020000 0 0x20000>,
1265 <0x0 0xf1040000 0 0x20000>,
1266 <0x0 0xf1060000 0 0x20000>;
1270 clock-names = "clk";
1271 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1277 reg = <0 0xfe960000 0 0x8000>;
1280 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1287 reg = <0 0xfea20000 0 0x5000>;
1290 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1297 reg = <0 0xfea28000 0 0x5000>;
1300 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1307 reg = <0 0xfe96f000 0 0x200>;
1309 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1316 reg = <0 0xfea27000 0 0x200>;
1318 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1325 reg = <0 0xfea2f000 0 0x200>;
1327 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1333 compatible = "renesas,r8a77995-cmm",
1334 "renesas,rcar-gen3-cmm";
1335 reg = <0 0xfea40000 0 0x1000>;
1336 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1342 compatible = "renesas,r8a77995-cmm",
1343 "renesas,rcar-gen3-cmm";
1344 reg = <0 0xfea50000 0 0x1000>;
1345 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1351 compatible = "renesas,du-r8a77995";
1352 reg = <0 0xfeb00000 0 0x40000>;
1356 clock-names = "du.0", "du.1";
1358 reset-names = "du.0";
1361 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1366 #address-cells = <1>;
1367 #size-cells = <0>;
1369 port@0 {
1370 reg = <0>;
1376 remote-endpoint = <&lvds0_in>;
1383 remote-endpoint = <&lvds1_in>;
1389 lvds0: lvds-encoder@feb90000 {
1390 compatible = "renesas,r8a77995-lvds";
1391 reg = <0 0xfeb90000 0 0x20>;
1393 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1400 #address-cells = <1>;
1401 #size-cells = <0>;
1403 port@0 {
1404 reg = <0>;
1406 remote-endpoint = <&du_out_lvds0>;
1416 lvds1: lvds-encoder@feb90100 {
1417 compatible = "renesas,r8a77995-lvds";
1418 reg = <0 0xfeb90100 0 0x20>;
1420 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1425 #address-cells = <1>;
1426 #size-cells = <0>;
1428 port@0 {
1429 reg = <0>;
1431 remote-endpoint = <&du_out_lvds1>;
1443 reg = <0 0xfff00044 0 4>;
1447 thermal-zones {
1448 cpu_thermal: cpu-thermal {
1449 polling-delay-passive = <250>;
1450 polling-delay = <1000>;
1451 thermal-sensors = <&thermal>;
1453 cooling-maps {
1457 cpu-crit {
1467 compatible = "arm,armv8-timer";
1468 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,