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Searched refs:q_tx (Results 1 – 25 of 31) sorted by relevance

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/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/
H A Dbeacon.c27 mt76_tx_queue_skb(dev, dev->mphy.q_tx[MT_TXQ_BEACON], in mt7603_update_beacon_iter()
34 dev->mphy.q_tx[MT_TXQ_CAB]->hw_idx) | in mt7603_update_beacon_iter()
84 q = dev->mphy.q_tx[MT_TXQ_BEACON]; in mt7603_pre_tbtt_tasklet()
95 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_CAB], false); in mt7603_pre_tbtt_tasklet()
101 q = dev->mphy.q_tx[MT_TXQ_CAB]; in mt7603_pre_tbtt_tasklet()
141 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BEACON], false); in mt7603_pre_tbtt_tasklet()
142 if (dev->mphy.q_tx[MT_TXQ_BEACON]->queued > hweight8(mdev->beacon_mask)) in mt7603_pre_tbtt_tasklet()
H A Ddma.c136 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], false); in mt7603_poll_tx()
143 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], false); in mt7603_poll_tx()
H A Dmac.c462 struct mt76_queue *q = dev->mphy.q_tx[i]; in mt7603_mac_sta_poll()
928 struct mt76_queue *q = dev->mphy.q_tx[qid]; in mt7603_mac_write_txwi()
1468 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); in mt7603_mac_watchdog_reset()
1552 q = dev->mphy.q_tx[i]; in mt7603_tx_hang()
H A Dmain.c410 mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[qid], skb, 0); in mt7603_ps_tx_list()
542 queue = dev->mphy.q_tx[queue]->hw_idx; in mt7603_conf_tx()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Ddma.c392 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); in mt7996_dma_reset()
394 mt76_queue_tx_cleanup(dev, phy2->q_tx[i], true); in mt7996_dma_reset()
396 mt76_queue_tx_cleanup(dev, phy3->q_tx[i], true); in mt7996_dma_reset()
415 mt76_queue_reset(dev, dev->mphy.q_tx[i]); in mt7996_dma_reset()
417 mt76_queue_reset(dev, phy2->q_tx[i]); in mt7996_dma_reset()
419 mt76_queue_reset(dev, phy3->q_tx[i]); in mt7996_dma_reset()
H A Dmac.c1087 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); in mt7996_mac_tx_free()
1088 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); in mt7996_mac_tx_free()
1090 mt76_queue_tx_cleanup(dev, phy2->q_tx[MT_TXQ_PSD], false); in mt7996_mac_tx_free()
1091 mt76_queue_tx_cleanup(dev, phy2->q_tx[MT_TXQ_BE], false); in mt7996_mac_tx_free()
1094 mt76_queue_tx_cleanup(dev, phy3->q_tx[MT_TXQ_PSD], false); in mt7996_mac_tx_free()
1095 mt76_queue_tx_cleanup(dev, phy3->q_tx[MT_TXQ_BE], false); in mt7996_mac_tx_free()
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dtx.c304 struct mt76_queue *q = phy->q_tx[qid]; in __mt76_tx_queue_skb()
360 q = phy->q_tx[qid]; in mt76_tx()
411 struct mt76_queue *hwq = phy->q_tx[MT_TXQ_PSD]; in mt76_release_buffered_frames()
523 struct mt76_queue *q = phy->q_tx[qid]; in mt76_txq_schedule_list()
650 hwq = phy->q_tx[mt76_txq_get_qid(txq)]; in mt76_stop_tx_queues()
729 struct mt76_queue *q = phy->q_tx[0]; in __mt76_set_tx_blocked()
738 q = phy->q_tx[0]; in __mt76_set_tx_blocked()
743 q = phy->q_tx[0]; in __mt76_set_tx_blocked()
815 dev->phy.q_tx[0]->blocked) in mt76_token_release()
H A Dmt76x02_mmio.c18 struct mt76_queue *q = dev->mphy.q_tx[MT_TXQ_PSD]; in mt76x02_pre_tbtt_tasklet()
154 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], false); in mt76x02_poll_tx()
161 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], false); in mt76x02_poll_tx()
285 mt76_queue_kick(dev, dev->mphy.q_tx[MT_TXQ_PSD]); in mt76x02_irq_handler()
350 q = dev->mphy.q_tx[i]; in mt76x02_tx_hang()
472 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); in mt76x02_watchdog_reset()
H A Ddebugfs.c60 for (i = 0; i < ARRAY_SIZE(dev->phy.q_tx); i++) { in mt76_queues_read()
61 struct mt76_queue *q = dev->phy.q_tx[i]; in mt76_queues_read()
H A Dmt792x_dma.c159 mt76_queue_reset(dev, dev->mphy.q_tx[i]); in mt792x_dma_reset()
177 for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++) in mt792x_wpdma_reset()
178 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); in mt792x_wpdma_reset()
H A Dusb.c772 q = dev->phy.q_tx[i]; in mt76u_status_worker()
937 dev->phy.q_tx[i] = dev->phy.q_tx[0]; in mt76u_alloc_tx()
948 dev->phy.q_tx[i] = q; in mt76u_alloc_tx()
977 q = dev->phy.q_tx[i]; in mt76u_free_tx()
1004 q = dev->phy.q_tx[i]; in mt76u_stop_tx()
1018 q = dev->phy.q_tx[i]; in mt76u_stop_tx()
H A Dsdio_txrx.c324 ret = mt76s_tx_run_queue(dev, dev->phy.q_tx[i]); in mt76s_txrx_worker()
374 q = dev->phy.q_tx[i]; in mt76s_txqs_empty()
H A Dmt792x_debugfs.c105 { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" }, in mt792x_queues_read()
H A Dsdio.c353 dev->phy.q_tx[i] = q; in mt76s_alloc_tx()
476 dev->phy.q_tx[i]); in mt76s_status_worker()
H A Dmt76x02_usb_core.c70 int pid, len = tx_info->skb->len, ep = q2ep(dev->mphy.q_tx[qid]->hw_idx); in mt76x02u_tx_prepare_skb()
H A Ddma.c982 for (j = 0; j < ARRAY_SIZE(phy->q_tx); j++) in mt76_dma_cleanup()
983 mt76_dma_tx_cleanup(dev, phy->q_tx[j], true); in mt76_dma_cleanup()
H A Dmt76_connac_mac.c285 phy->q_tx[i] = phy->q_tx[0]; in mt76_connac_init_tx_queues()
H A Dtestmode.c45 q = phy->q_tx[qid]; in mt76_testmode_tx_pending()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Ddma.c613 for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++) { in mt7915_dma_reset()
614 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); in mt7915_dma_reset()
616 mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[i], true); in mt7915_dma_reset()
637 mt7915_dma_reset_tx_queue(dev, dev->mphy.q_tx[i]); in mt7915_dma_reset()
639 mt7915_dma_reset_tx_queue(dev, mphy_ext->q_tx[i]); in mt7915_dma_reset()
H A Dmac.c864 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); in mt7915_mac_tx_free_prepare()
865 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); in mt7915_mac_tx_free_prepare()
867 mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[MT_TXQ_PSD], false); in mt7915_mac_tx_free_prepare()
868 mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[MT_TXQ_BE], false); in mt7915_mac_tx_free_prepare()
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x0/
H A Dpci.c247 for (i = 0; i < ARRAY_SIZE(mdev->phy.q_tx); i++) in mt76x0e_suspend()
248 mt76_queue_tx_cleanup(dev, mdev->phy.q_tx[i], true); in mt76x0e_suspend()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Ddebugfs.c266 mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[0], skb, 0); in mt7615_reset_test_set()
398 { dev->mphy.q_tx[MT_TXQ_BE], "PDMA0" }, in mt7615_queues_read()
H A Dinit.c586 mphy->q_tx[i] = dev->mphy.q_tx[i]; in mt7615_register_ext_phy()
H A Dpci_mac.c128 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); in mt7615_dma_reset()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7921/
H A Dmac.c516 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); in mt7921_mac_tx_free()
517 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); in mt7921_mac_tx_free()

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