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Searched refs:MT_INT_MASK_CSR (Results 1 – 21 of 21) sorted by relevance

/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Dmmio.c76 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7615_irq_handler()
92 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7615_irq_tasklet()
103 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); in mt7615_irq_tasklet()
223 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7615_mmio_probe()
H A Dregs.h107 #define MT_INT_MASK_CSR MT_HIF(0x204) macro
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Dmmio.c248 mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
269 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_irq_tasklet()
315 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_irq_handler()
365 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_mmio_probe()
H A Dpci.c154 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7996_pci_probe()
H A Dmt7996.h437 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); in mt7996_irq_disable()
H A Dregs.h399 #define MT_INT_MASK_CSR MT_WFDMA0(0x204) macro
H A Dmac.c1664 mt76_wr(dev, MT_INT_MASK_CSR, dev->mt76.mmio.irqmask); in mt7996_mac_restart()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/
H A Dmt7603.h192 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); in mt7603_irq_enable()
197 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); in mt7603_irq_disable()
H A Dsoc.c38 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt76_wmac_probe()
H A Dpci.c47 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt76pci_probe()
H A Dregs.h25 #define MT_INT_MASK_CSR MT_HIF(0x204) macro
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02.h244 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask); in mt76x02_irq_enable()
249 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); in mt76x02_irq_disable()
H A Dmt76x02_regs.h107 #define MT_INT_MASK_CSR 0x0204 macro
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Dmmio.c757 wed->wlan.wpdma_mask = res->start + MT_INT_MASK_CSR; in mt7915_mmio_wed_init()
880 mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask); in mt7915_dual_hif_set_irq_mask()
908 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7915_irq_tasklet()
974 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7915_irq_handler()
H A Dmt7915.h537 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); in mt7915_irq_disable()
H A Ddma.c315 mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask); in mt7915_dma_start()
H A Dinit.c816 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt7915_init_hardware()
H A Dregs.h701 #define MT_INT_MASK_CSR __REG(INT_MASK_CSR) macro
H A Dmac.c1410 mt76_wr(dev, MT_INT_MASK_CSR, dev->mt76.mmio.irqmask); in mt7915_mac_restart()
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dpci.c66 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt76x2e_probe()
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x0/
H A Dpci.c199 mt76_wr(dev, MT_INT_MASK_CSR, 0); in mt76x0e_probe()