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/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-zynq.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-zynq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq GPIO controller
10 - Michal Simek <michal.simek@amd.com>
15 - xlnx,zynq-gpio-1.0
16 - xlnx,zynqmp-gpio-1.0
17 - xlnx,versal-gpio-1.0
18 - xlnx,pmc-gpio-1.0
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/linux/drivers/gpio/
H A Dgpio-zynq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Xilinx Zynq GPIO device driver
5 * Copyright (C) 2009 - 2014 Xilinx, Inc.
10 #include <linux/gpio/driver.h>
20 #define DRIVER_NAME "zynq-gpio"
46 ZYNQ##str##_GPIO_BANK0_NGPIO - 1)
49 ZYNQ##str##_GPIO_BANK1_NGPIO - 1)
52 ZYNQ##str##_GPIO_BANK2_NGPIO - 1)
55 ZYNQ##str##_GPIO_BANK3_NGPIO - 1)
58 ZYNQ##str##_GPIO_BANK4_NGPIO - 1)
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # generic gpio support: platform drivers, dedicated expander chips, etc
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
7 bool "GPIO Support"
9 This enables GPIO support through the generic GPIO library.
11 one or more of the GPIO drivers below.
47 this symbol, but new drivers should use the generic gpio-regmap
51 bool "Debug GPIO calls"
54 Say Y here to add some extra checks and diagnostics to GPIO calls.
57 non-sleeping contexts. They can make bitbanged serial protocols
62 bool "/sys/class/gpio/... (sysfs interface)" if EXPERT
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/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zybo-z7.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "zynq-7000.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
8 compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
22 stdout-path = "serial0:115200n8";
25 gpio-leds {
26 compatible = "gpio-leds";
28 led-ld4 {
29 label = "zynq-zybo-z7:green:ld4";
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H A Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
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H A Dzynq-zturn-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Based on zynq-zed.dts which is:
7 * Copyright (C) 2011 - 2014 Xilinx
12 /dts-v1/;
13 /include/ "zynq-7000.dtsi"
16 compatible = "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
34 gpio-leds {
35 compatible = "gpio-leds";
36 usr-led1 {
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H A Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
28 stdout-path = "serial0:115200n8";
31 gpio-keys {
32 compatible = "gpio-keys";
34 switch-14 {
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H A Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
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/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt1 Xilinx Zynq Reset Manager
3 The Zynq AP-SoC has several different resets.
5 See Chapter 26 of the Zynq TRM (UG585) for more information about Zynq resets.
8 - compatible: "xlnx,zynq-reset"
9 - reg: SLCR offset and size taken via syscon <0x200 0x48>
10 - syscon: <&slcr>
11 This should be a phandle to the Zynq's SLCR registers.
12 - #reset-cells: Must be 1
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
18 compatible = "xlnx,zynq-reset";
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/linux/drivers/pinctrl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
35 bool "AMD GPIO pin control"
44 The driver for memory mapped GPIO functionality on AMD platforms
47 for GPIO use.
53 tristate "Apple SoC GPIO pin controller driver"
62 This is the driver for the GPIO controller found on Apple ARM SoCs,
66 will be called pinctrl-apple-gpio.
69 bool "Axis ARTPEC-6 pin controller driver"
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
77 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 subdir-ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG
6 obj-y += core.o pinctrl-utils.o
7 obj-$(CONFIG_PINMUX) += pinmux.o
8 obj-$(CONFIG_PINCONF) += pinconf.o
9 obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
10 obj-$(CONFIG_OF) += devicetree.o
12 obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
13 obj-$(CONFIG_PINCTRL_APPLE_GPIO) += pinctrl-apple-gpio.o
14 obj-$(CONFIG_PINCTRL_ARTPEC6) += pinctrl-artpec6.o
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/linux/drivers/reset/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 via GPIOs or SoC-internal reset controller modules.
83 tristate "GPIO reset controller"
87 GPIOs. Typically for OF platforms this driver expects "reset-gpios"
90 If compiled as module, it will be called reset-gpio.
132 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
208 Raspberry Pi 4's co-processor controls some of the board's HW
211 interfacing with RPi4's co-processor and model these firmware
242 - Altera SoCFPGAs
243 - ASPEED BMC SoCs
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += core.o
3 obj-y += amlogic/
4 obj-y += hisilicon/
5 obj-y += starfive/
6 obj-y += sti/
7 obj-y += tegra/
8 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
9 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
10 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
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/linux/Documentation/devicetree/bindings/fpga/
H A Dfpga-region.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/fpga/fpga-region.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
14 - Introduction
15 - Terminology
16 - Sequence
17 - FPGA Region
18 - Supported Use Models
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/linux/Documentation/devicetree/bindings/firmware/xilinx/
H A Dxlnx,zynqmp-firmware.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
12 description: The zynqmp-firmware node describes the interface to platform
23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
24 const: xlnx,zynqmp-firmware
26 - description: For implementations complying for Versal.
27 const: xlnx,versal-firmware
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/linux/drivers/clk/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o clkdev.o
4 obj-$(CONFIG_COMMON_CLK) += clk.o
5 obj-$(CONFIG_CLK_KUNIT_TEST) += clk-test.o
6 clk-test-y := clk_test.o \
22 obj-$(CONFIG_COMMON_CLK) += clk-divider.o
23 obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
24 obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
25 obj-$(CONFIG_CLK_FIXED_RATE_KUNIT_TEST) += clk-fixed-rate-test.o
26 clk-fixed-rate-test-y := clk-fixed-rate_test.o kunit_clk_fixed_rate_test.dtbo.o
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/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
21 #include <dt-bindings/thermal/thermal.h>
25 #address-cells = <2>;
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/linux/drivers/i2c/busses/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
51 will be called i2c-ali15x3.
63 will be called i2c-amd756.
73 will be called i2c-amd8111.
83 be called i2c-amd-mp2-pci and i2c-amd-mp2-plat.
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/linux/drivers/video/fbdev/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 a well-defined interface, so the software doesn't need to know
15 anything about the low-level (hardware register) stuff.
21 On several non-X86 architectures, the frame buffer device is the
29 and the Framebuffer-HOWTO at
30 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
46 device-aware may cause unexpected results. If unsure, say N.
57 Common utility functions useful to fbdev drivers of VGA-based
82 If you have a PCI-based system, this enables support for these
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/linux/drivers/iio/adc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 bool "ST-Ericsson AB8500 GPADC driver"
45 Say yes here to build support for Analog Devices AD4130-8 SPI analog
73 Say yes here to build support for Analog Devices AD7091R-5 ADC.
81 Say yes here to build support for Analog Devices AD7091R-2, AD7091R-4,
82 and AD7091R-8 ADC.
88 tristate "Analog Devices AD7124 and similar sigma-delta ADCs driver"
92 Say yes here to build support for Analog Devices AD7124-4 and AD7124-8
107 - AD7172-2
108 - AD7173-8
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/linux/drivers/watchdog/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
178 to toggle reset line if SoC fails to ping watchdog via GPIO.
198 tristate "ChromeOS EC-based watchdog"
252 tristate "Watchdog device controlled through GPIO-line"
257 controlled through GPIO-line.
280 will be called lenovo-se10-wdt.
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/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
25 #include <linux/dma-mapping.h>
40 #include <linux/firmware/xlnx-zynqmp.h>
58 * (bp)->rx_ring_size)
64 * (bp)->tx_ring_size)
67 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
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