| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | transmit-amplitude.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | marvell,pp2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marcin Wojtas <mw@semihalf.com>
11 - Russell King <linux@armlinux.org>
21 - marvell,armada-375-pp2
22 - marvell,armada-7k-pp22
28 "#address-cells":
31 "#size-cells":
37 - description: main controller clock
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| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | ael1002.c | 2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
88 for (err = 0; rv->mmd_addr && !err; rv++) { in set_phy_regs()
89 if (rv->clear_bits == 0xffff) in set_phy_regs()
90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, in set_phy_regs()
91 rv->set_bits); in set_phy_regs()
93 err = t3_mdio_change_bits(phy, rv->mmd_addr, in set_phy_regs()
94 rv->reg_addr, rv->clear_bits, in set_phy_regs()
95 rv->set_bits); in set_phy_regs()
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| /linux/drivers/phy/microchip/ |
| H A D | lan966x_serdes.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <dt-bindings/phy/phy-lan966x-serdes.h>
21 gbase, ginst, gcnt, gwidth, \ argument
23 (gbase + ((ginst) * gwidth) + raddr + ((rinst) * rwidth))
80 SERDES_MUX_QSGMII(SERDES6G(2), 5, HSIO_HW_CFG_QSGMII_ENA,
113 SERDES_MUX_RGMII(RGMII(0), 5, HSIO_HW_CFG_RGMII_0_CFG |
118 HSIO_HW_CFG_GMII_ENA_SET(BIT(5))),
189 lan_rmw(HSIO_SD_CFG_LANE_10BIT_SEL_SET(res_struct->lane_10bit_sel) | in lan966x_sd6g40_reg_cfg()
190 HSIO_SD_CFG_RX_RATE_SET(res_struct->rx_rate) | in lan966x_sd6g40_reg_cfg()
191 HSIO_SD_CFG_TX_RATE_SET(res_struct->tx_rate) | in lan966x_sd6g40_reg_cfg()
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| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-8040-clearfog-gt-8k.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
35 compatible = "pwm-fan";
37 cooling-levels = <0 51 102 153 204 255>;
38 #cooling-cells = <2>;
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| /linux/drivers/net/phy/ |
| H A D | air_en8811h.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * - Only full duplex supported
7 * - Forced speed (AN off) is not supported by hardware (100Mbps)
15 #include <linux/clk-provider.h>
87 #define AIR_PHY_LED_ON_HDX BIT(5) /* Half duplex */
99 #define AIR_PHY_LED_BLINK_10RX BIT(5)
118 #define EN8811H_GPIO_OUTPUT_345 (BIT(3) | BIT(4) | BIT(5))
135 * GPIO5 <-> LED0 On: Link detected, blink Rx/Tx
136 * GPIO4 <-> LED1 On: Link detected at 2500 or 1000 Mbps
137 * GPIO3 <-> LED2 On: Link detected at 2500 or 100 Mbps
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| H A D | phylink.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
23 #include "phy-caps.h"
38 * struct phylink - internal data type for phylink
55 u8 link_port; /* The current non-phy ethtool port */
70 /* Serialize updates to pl->phydev with phylink_resolve() */
100 if ((pl)->config->type == PHYLINK_NETDEV) \
101 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
102 else if ((pl)->config->type == PHYLINK_DEV) \
103 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
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| H A D | sfp.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/mdio/mdio-i2c.h>
149 "mod-def0",
151 "tx-fault",
152 "tx-disable",
153 "rate-select0",
154 "rate-select1",
166 /* t_start_up (SFF-8431) or t_init (SFF-8472) is the time required for a
167 * non-cooled module to initialise its laser safety circuitry. We wait
186 #define N_FAULT_INIT 5
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| /linux/drivers/net/ethernet/sfc/ |
| H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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| /linux/drivers/net/ethernet/qlogic/qlcnic/ |
| H A D | qlcnic_83xx_hw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2009-2013 QLogic Corporation
38 #define QLC_83XX_MODULE_FIBRE_10GBASE_LRM 0x1 /* 10GBase-LRM */
39 #define QLC_83XX_MODULE_FIBRE_10GBASE_LR 0x2 /* 10GBase-LR */
40 #define QLC_83XX_MODULE_FIBRE_10GBASE_SR 0x3 /* 10GBase-SR */
50 #define QLC_83XX_MODULE_FIBRE_1000BASE_SX 0x7 /* 1000Base-SX */
51 #define QLC_83XX_MODULE_FIBRE_1000BASE_LX 0x8 /* 1000Base-LX */
52 #define QLC_83XX_MODULE_FIBRE_1000BASE_CX 0x9 /* 1000Base-CX */
53 #define QLC_83XX_MODULE_TP_1000BASE_T 0xa /* 1000Base-T*/
77 {QLCNIC_CMD_WRITE_PHY, 5, 1},
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| /linux/drivers/net/usb/ |
| H A D | aqc111.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Aquantia Corp. Aquantia AQtion USB to 5GbE Controller
3 * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
5 * Copyright (C) 2002-2003 TiVo Inc.
6 * Copyright (C) 2017-2018 ASIX
34 netdev_warn(dev->net, in aqc111_read_cmd_nopm()
35 "Failed to read(0x%x) reg index 0x%04x: %d\n", in aqc111_read_cmd_nopm()
38 ret = ret < 0 ? ret : -ENODATA; in aqc111_read_cmd_nopm()
53 netdev_warn(dev->net, in aqc111_read_cmd()
54 "Failed to read(0x%x) reg index 0x%04x: %d\n", in aqc111_read_cmd()
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| H A D | cdc_ether.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2003-2005 by David Brownell
26 return (desc->bInterfaceClass == USB_CLASS_COMM && in is_rndis()
27 desc->bInterfaceSubClass == 2 && in is_rndis()
28 desc->bInterfaceProtocol == 0xff); in is_rndis()
33 return (desc->bInterfaceClass == USB_CLASS_MISC && in is_activesync()
34 desc->bInterfaceSubClass == 1 && in is_activesync()
35 desc->bInterfaceProtocol == 1); in is_activesync()
40 return (desc->bInterfaceClass == USB_CLASS_WIRELESS_CONTROLLER && in is_wireless_rndis()
41 desc->bInterfaceSubClass == 1 && in is_wireless_rndis()
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| H A D | r8152.c | 1 // SPDX-License-Identifier: GPL-2.0-only
33 /* Information for net-next */
446 #define pwd_dn_scale(x) ((x) << 1) argument
505 #define BYPASS_MAC_RESET BIT(5)
518 #define BYPASS_FLASH BIT(5)
546 #define USP_PREWAKE BIT(5)
563 /* bit 4 ~ 5: fifo empty boundary */
581 #define MID_REVERSE BIT(5) /* RTL8156A */
590 #define ups_flags_speed(x) ((x) << 16) argument
624 #define PHY_STAT_PWRDN 5
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| /linux/include/linux/ |
| H A D | phylink.h | 24 MLO_AN_FIXED, /* Fixed-link mode */
25 MLO_AN_INBAND, /* In-band protocol */
28 * PHYLINK_PCS_NEG_NONE - protocol has no inband capability
29 * PHYLINK_PCS_NEG_OUTBAND - some out of band or fixed link setting
30 * PHYLINK_PCS_NEG_INBAND_DISABLED - inband mode disabled, e.g.
31 * 1000base-X with autoneg off
32 * PHYLINK_PCS_NEG_INBAND_ENABLED - inband mode enabled
34 * PHYLINK_PCS_NEG_INBAND - inband mode selected
35 * PHYLINK_PCS_NEG_ENABLED - negotiatio
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| /linux/drivers/net/pcs/ |
| H A D | pcs-xpcs.c | 1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pcs/pcs-xpcs.h>
17 #include "pcs-xpcs.h"
128 for (compat = xpcs->desc->compat; compat->supported; compat++) in xpcs_find_compat()
129 if (compat->interface == interface) in xpcs_find_compat()
137 return &xpcs->pcs; in xpcs_to_phylink_pcs()
147 return -ENODEV; in xpcs_get_an_mode()
149 return compat->an_mode; in xpcs_get_an_mode()
158 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
159 if (compat->supported[i] == linkmode) in __xpcs_linkmode_supported()
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_link.c | 1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
161 #define SFP_EEPROM_10G_COMP_CODE_LR_MASK (1<<5)
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
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| H A D | bnx2x_reg.h | 3 * Copyright (c) 2007-2013 Broadcom Corporation
13 * R - Read only
14 * RC - Clear on read
15 * RW - Read/Write
16 * ST - Statistics register (clear on read)
17 * W - Write only
18 * WB - Wide bus register - the size is over 32 bits and it should be
20 * WR - Write Clear (write 1 to clear the bit)
28 #define ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU (0x1<<5)
32 /* [RW 1] Initiate the ATC array - reset all the valid bits */
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| /linux/drivers/net/ethernet/broadcom/bnxt/ |
| H A D | bnxt.c | 1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2019 Broadcom Limited
25 #include <linux/dma-mapping.h>
60 #include <linux/pci-tph.h>
78 #define BNXT_TX_TIMEOUT (5 * HZ)
95 [BCM57301] = { "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet" },
96 [BCM57302] = { "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet" },
97 [BCM57304] = { "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
98 [BCM57417_NPAR] = { "Broadcom BCM57417 NetXtreme-E Ethernet Partition" },
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| /linux/drivers/net/ethernet/mellanox/mlx4/ |
| H A D | main.c | 17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
41 #include <linux/dma-mapping.h>
43 #include <linux/io-mapping.h>
48 #include <uapi/rdma/mlx4-abi.h>
59 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
77 MODULE_PARM_DESC(msi_x, "0 - don't use MSI-X, 1 - use MSI-X, >1 - limit number of MSI-X irqs to msi…
105 " flow steering when available, set to -1");
149 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
153 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
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