Lines Matching +full:5 +full:gbase +full:- +full:x
1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2019 Broadcom Limited
25 #include <linux/dma-mapping.h>
75 #define BNXT_TX_TIMEOUT (5 * HZ)
92 [BCM57301] = { "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet" },
93 [BCM57302] = { "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet" },
94 [BCM57304] = { "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
95 [BCM57417_NPAR] = { "Broadcom BCM57417 NetXtreme-E Ethernet Partition" },
97 [BCM57311] = { "Broadcom BCM57311 NetXtreme-C 10Gb Ethernet" },
98 [BCM57312] = { "Broadcom BCM57312 NetXtreme-C 10Gb/25Gb Ethernet" },
99 [BCM57402] = { "Broadcom BCM57402 NetXtreme-E 10Gb Ethernet" },
100 [BCM57404] = { "Broadcom BCM57404 NetXtreme-E 10Gb/25Gb Ethernet" },
101 [BCM57406] = { "Broadcom BCM57406 NetXtreme-E 10GBase-T Ethernet" },
102 [BCM57402_NPAR] = { "Broadcom BCM57402 NetXtreme-E Ethernet Partition" },
103 [BCM57407] = { "Broadcom BCM57407 NetXtreme-E 10GBase-T Ethernet" },
104 [BCM57412] = { "Broadcom BCM57412 NetXtreme-E 10Gb Ethernet" },
105 [BCM57414] = { "Broadcom BCM57414 NetXtreme-E 10Gb/25Gb Ethernet" },
106 [BCM57416] = { "Broadcom BCM57416 NetXtreme-E 10GBase-T Ethernet" },
107 [BCM57417] = { "Broadcom BCM57417 NetXtreme-E 10GBase-T Ethernet" },
108 [BCM57412_NPAR] = { "Broadcom BCM57412 NetXtreme-E Ethernet Partition" },
109 [BCM57314] = { "Broadcom BCM57314 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
110 [BCM57417_SFP] = { "Broadcom BCM57417 NetXtreme-E 10Gb/25Gb Ethernet" },
111 [BCM57416_SFP] = { "Broadcom BCM57416 NetXtreme-E 10Gb Ethernet" },
112 [BCM57404_NPAR] = { "Broadcom BCM57404 NetXtreme-E Ethernet Partition" },
113 [BCM57406_NPAR] = { "Broadcom BCM57406 NetXtreme-E Ethernet Partition" },
114 [BCM57407_SFP] = { "Broadcom BCM57407 NetXtreme-E 25Gb Ethernet" },
115 [BCM57407_NPAR] = { "Broadcom BCM57407 NetXtreme-E Ethernet Partition" },
116 [BCM57414_NPAR] = { "Broadcom BCM57414 NetXtreme-E Ethernet Partition" },
117 [BCM57416_NPAR] = { "Broadcom BCM57416 NetXtreme-E Ethernet Partition" },
118 [BCM57452] = { "Broadcom BCM57452 NetXtreme-E 10Gb/25Gb/40Gb/50Gb Ethernet" },
119 [BCM57454] = { "Broadcom BCM57454 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
120 [BCM5745x_NPAR] = { "Broadcom BCM5745x NetXtreme-E Ethernet Partition" },
121 [BCM57508] = { "Broadcom BCM57508 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
122 [BCM57504] = { "Broadcom BCM57504 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
123 [BCM57502] = { "Broadcom BCM57502 NetXtreme-E 10Gb/25Gb/50Gb Ethernet" },
124 [BCM57608] = { "Broadcom BCM57608 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb/400Gb Ethernet" },
125 [BCM57604] = { "Broadcom BCM57604 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
126 [BCM57602] = { "Broadcom BCM57602 NetXtreme-E 10Gb/25Gb/50Gb/100Gb Ethernet" },
127 [BCM57601] = { "Broadcom BCM57601 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb/400Gb Ethernet" },
128 [BCM57508_NPAR] = { "Broadcom BCM57508 NetXtreme-E Ethernet Partition" },
129 [BCM57504_NPAR] = { "Broadcom BCM57504 NetXtreme-E Ethernet Partition" },
130 [BCM57502_NPAR] = { "Broadcom BCM57502 NetXtreme-E Ethernet Partition" },
131 [BCM58802] = { "Broadcom BCM58802 NetXtreme-S 10Gb/25Gb/40Gb/50Gb Ethernet" },
132 [BCM58804] = { "Broadcom BCM58804 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
133 [BCM58808] = { "Broadcom BCM58808 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
134 [NETXTREME_E_VF] = { "Broadcom NetXtreme-E Ethernet Virtual Function" },
135 [NETXTREME_C_VF] = { "Broadcom NetXtreme-C Ethernet Virtual Function" },
136 [NETXTREME_S_VF] = { "Broadcom NetXtreme-S Ethernet Virtual Function" },
137 [NETXTREME_C_VF_HV] = { "Broadcom NetXtreme-C Virtual Function for Hyper-V" },
138 [NETXTREME_E_VF_HV] = { "Broadcom NetXtreme-E Virtual Function for Hyper-V" },
139 [NETXTREME_E_P5_VF] = { "Broadcom BCM5750X NetXtreme-E Ethernet Virtual Function" },
140 [NETXTREME_E_P5_VF_HV] = { "Broadcom BCM5750X NetXtreme-E Virtual Function for Hyper-V" },
322 writel(DB_CP_FLAGS | DB_RING_IDX(db, idx), (db)->doorbell)
325 bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ | DB_RING_IDX(db, idx),\
326 (db)->doorbell)
329 bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ_MASK | \
330 DB_RING_IDX(db, idx), (db)->doorbell)
333 writel(DB_CP_REARM_FLAGS | DB_RING_IDX(db, idx), (db)->doorbell)
336 bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ_ARM | \
337 DB_RING_IDX(db, idx), (db)->doorbell)
341 if (bp->flags & BNXT_FLAG_CHIP_P7) in bnxt_db_nq()
343 else if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_db_nq()
351 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_db_nq_arm()
359 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_db_cq()
360 bnxt_writeq(bp, db->db_key64 | DBR_TYPE_CQ_ARMALL | in bnxt_db_cq()
361 DB_RING_IDX(db, idx), db->doorbell); in bnxt_db_cq()
368 if (!(test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))) in bnxt_queue_fw_reset_work()
372 queue_delayed_work(bnxt_pf_wq, &bp->fw_reset_task, delay); in bnxt_queue_fw_reset_work()
374 schedule_delayed_work(&bp->fw_reset_task, delay); in bnxt_queue_fw_reset_work()
380 queue_work(bnxt_pf_wq, &bp->sp_task); in __bnxt_queue_sp_work()
382 schedule_work(&bp->sp_task); in __bnxt_queue_sp_work()
387 set_bit(event, &bp->sp_event); in bnxt_queue_sp_work()
393 if (!rxr->bnapi->in_reset) { in bnxt_sched_reset_rxr()
394 rxr->bnapi->in_reset = true; in bnxt_sched_reset_rxr()
395 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_sched_reset_rxr()
396 set_bit(BNXT_RESET_TASK_SP_EVENT, &bp->sp_event); in bnxt_sched_reset_rxr()
398 set_bit(BNXT_RST_RING_SP_EVENT, &bp->sp_event); in bnxt_sched_reset_rxr()
401 rxr->rx_next_cons = 0xffff; in bnxt_sched_reset_rxr()
407 struct bnxt_napi *bnapi = txr->bnapi; in bnxt_sched_reset_txr()
409 if (bnapi->tx_fault) in bnxt_sched_reset_txr()
412 netdev_err(bp->dev, "Invalid Tx completion (ring:%d tx_hw_cons:%u cons:%u prod:%u curr:%u)", in bnxt_sched_reset_txr()
413 txr->txq_index, txr->tx_hw_cons, in bnxt_sched_reset_txr()
414 txr->tx_cons, txr->tx_prod, curr); in bnxt_sched_reset_txr()
416 bnapi->tx_fault = 1; in bnxt_sched_reset_txr()
446 if (!md_dst || md_dst->type != METADATA_HW_PORT_MUX) in bnxt_xmit_get_cfa_action()
449 return md_dst->u.port_info.port_id; in bnxt_xmit_get_cfa_action()
457 bnxt_db_write(bp, &txr->tx_db, prod); in bnxt_txr_db_kick()
458 txr->kick_pending = 0; in bnxt_txr_db_kick()
471 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_start_xmit()
472 struct pci_dev *pdev = bp->pdev; in bnxt_start_xmit()
479 if (unlikely(i >= bp->tx_nr_rings)) { in bnxt_start_xmit()
486 txr = &bp->tx_ring[bp->tx_ring_map[i]]; in bnxt_start_xmit()
487 prod = txr->tx_prod; in bnxt_start_xmit()
490 if (unlikely(free_size < skb_shinfo(skb)->nr_frags + 2)) { in bnxt_start_xmit()
492 if (net_ratelimit() && txr->kick_pending) in bnxt_start_xmit()
496 bp->tx_wake_thresh)) in bnxt_start_xmit()
503 length = skb->len; in bnxt_start_xmit()
505 last_frag = skb_shinfo(skb)->nr_frags; in bnxt_start_xmit()
507 txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
509 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
510 tx_buf->skb = skb; in bnxt_start_xmit()
511 tx_buf->nr_frags = last_frag; in bnxt_start_xmit()
521 if (skb->vlan_proto == htons(ETH_P_8021Q)) in bnxt_start_xmit()
525 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && ptp && in bnxt_start_xmit()
526 ptp->tx_tstamp_en) { in bnxt_start_xmit()
527 if (bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP) { in bnxt_start_xmit()
529 tx_buf->is_ts_pkt = 1; in bnxt_start_xmit()
530 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in bnxt_start_xmit()
539 tx_buf->is_ts_pkt = 1; in bnxt_start_xmit()
540 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in bnxt_start_xmit()
542 ptp->txts_req[txts_prod].tx_seqid = seq_id; in bnxt_start_xmit()
543 ptp->txts_req[txts_prod].tx_hdr_off = hdr_off; in bnxt_start_xmit()
544 tx_buf->txts_prod = txts_prod; in bnxt_start_xmit()
548 if (unlikely(skb->no_fcs)) in bnxt_start_xmit()
551 if (free_size == bp->tx_ring_size && length <= bp->tx_push_thresh && in bnxt_start_xmit()
553 struct tx_push_buffer *tx_push_buf = txr->tx_push; in bnxt_start_xmit()
554 struct tx_push_bd *tx_push = &tx_push_buf->push_bd; in bnxt_start_xmit()
555 struct tx_bd_ext *tx_push1 = &tx_push->txbd2; in bnxt_start_xmit()
556 void __iomem *db = txr->tx_db.doorbell; in bnxt_start_xmit()
557 void *pdata = tx_push_buf->data; in bnxt_start_xmit()
562 tx_push->tx_bd_len_flags_type = in bnxt_start_xmit()
570 if (skb->ip_summed == CHECKSUM_PARTIAL) in bnxt_start_xmit()
571 tx_push1->tx_bd_hsize_lflags = in bnxt_start_xmit()
574 tx_push1->tx_bd_hsize_lflags = 0; in bnxt_start_xmit()
576 tx_push1->tx_bd_cfa_meta = cpu_to_le32(vlan_tag_flags); in bnxt_start_xmit()
577 tx_push1->tx_bd_cfa_action = in bnxt_start_xmit()
581 end = PTR_ALIGN(end, 8) - 1; in bnxt_start_xmit()
587 skb_frag_t *frag = &skb_shinfo(skb)->frags[j]; in bnxt_start_xmit()
598 txbd->tx_bd_len_flags_type = tx_push->tx_bd_len_flags_type; in bnxt_start_xmit()
599 txbd->tx_bd_haddr = txr->data_mapping; in bnxt_start_xmit()
600 txbd->tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2); in bnxt_start_xmit()
602 tx_push->tx_bd_opaque = txbd->tx_bd_opaque; in bnxt_start_xmit()
603 txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
606 tx_push->doorbell = in bnxt_start_xmit()
608 DB_RING_IDX(&txr->tx_db, prod)); in bnxt_start_xmit()
609 WRITE_ONCE(txr->tx_prod, prod); in bnxt_start_xmit()
611 tx_buf->is_push = 1; in bnxt_start_xmit()
612 netdev_tx_sent_queue(txq, skb->len); in bnxt_start_xmit()
619 (push_len - 16) << 1); in bnxt_start_xmit()
629 pad = BNXT_MIN_PKT_SIZE - length; in bnxt_start_xmit()
636 mapping = dma_map_single(&pdev->dev, skb->data, len, DMA_TO_DEVICE); in bnxt_start_xmit()
638 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) in bnxt_start_xmit()
645 txbd->tx_bd_haddr = cpu_to_le64(mapping); in bnxt_start_xmit()
646 txbd->tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2 + last_frag); in bnxt_start_xmit()
650 &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
652 txbd1->tx_bd_hsize_lflags = lflags; in bnxt_start_xmit()
654 bool udp_gso = !!(skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4); in bnxt_start_xmit()
657 if (skb->encapsulation) { in bnxt_start_xmit()
670 txbd1->tx_bd_hsize_lflags |= cpu_to_le32(TX_BD_FLAGS_LSO | in bnxt_start_xmit()
672 (hdr_len << (TX_BD_HSIZE_SHIFT - 1))); in bnxt_start_xmit()
673 length = skb_shinfo(skb)->gso_size; in bnxt_start_xmit()
674 txbd1->tx_bd_mss = cpu_to_le32(length); in bnxt_start_xmit()
676 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in bnxt_start_xmit()
677 txbd1->tx_bd_hsize_lflags |= in bnxt_start_xmit()
679 txbd1->tx_bd_mss = 0; in bnxt_start_xmit()
684 dev_warn_ratelimited(&pdev->dev, "Dropped oversize %d bytes TX packet.\n", in bnxt_start_xmit()
685 skb->len); in bnxt_start_xmit()
690 txbd->tx_bd_len_flags_type = cpu_to_le32(flags); in bnxt_start_xmit()
692 txbd1->tx_bd_cfa_meta = cpu_to_le32(vlan_tag_flags); in bnxt_start_xmit()
693 txbd1->tx_bd_cfa_action = in bnxt_start_xmit()
697 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in bnxt_start_xmit()
700 txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
703 mapping = skb_frag_dma_map(&pdev->dev, frag, 0, len, in bnxt_start_xmit()
706 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) in bnxt_start_xmit()
709 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
712 txbd->tx_bd_haddr = cpu_to_le64(mapping); in bnxt_start_xmit()
715 txbd->tx_bd_len_flags_type = cpu_to_le32(flags); in bnxt_start_xmit()
719 txbd->tx_bd_len_flags_type = in bnxt_start_xmit()
723 netdev_tx_sent_queue(txq, skb->len); in bnxt_start_xmit()
728 WRITE_ONCE(txr->tx_prod, prod); in bnxt_start_xmit()
733 if (free_size >= bp->tx_wake_thresh) in bnxt_start_xmit()
734 txbd0->tx_bd_len_flags_type |= in bnxt_start_xmit()
736 txr->kick_pending = 1; in bnxt_start_xmit()
742 if (netdev_xmit_more() && !tx_buf->is_push) { in bnxt_start_xmit()
743 txbd0->tx_bd_len_flags_type &= in bnxt_start_xmit()
749 bp->tx_wake_thresh); in bnxt_start_xmit()
757 prod = txr->tx_prod; in bnxt_start_xmit()
758 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
759 dma_unmap_single(&pdev->dev, dma_unmap_addr(tx_buf, mapping), in bnxt_start_xmit()
766 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
767 dma_unmap_page(&pdev->dev, dma_unmap_addr(tx_buf, mapping), in bnxt_start_xmit()
768 skb_frag_size(&skb_shinfo(skb)->frags[i]), in bnxt_start_xmit()
776 txr->tx_buf_ring[txr->tx_prod].is_ts_pkt = 0; in bnxt_start_xmit()
777 atomic64_inc(&bp->ptp_cfg->stats.ts_err); in bnxt_start_xmit()
778 if (!(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) in bnxt_start_xmit()
780 ptp->txts_req[txts_prod].tx_skb = ERR_PTR(-EIO); in bnxt_start_xmit()
782 if (txr->kick_pending) in bnxt_start_xmit()
783 bnxt_txr_db_kick(bp, txr, txr->tx_prod); in bnxt_start_xmit()
784 txr->tx_buf_ring[txr->tx_prod].skb = NULL; in bnxt_start_xmit()
793 struct netdev_queue *txq = netdev_get_tx_queue(bp->dev, txr->txq_index); in __bnxt_tx_int()
794 struct pci_dev *pdev = bp->pdev; in __bnxt_tx_int()
795 u16 hw_cons = txr->tx_hw_cons; in __bnxt_tx_int()
797 u16 cons = txr->tx_cons; in __bnxt_tx_int()
807 tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)]; in __bnxt_tx_int()
808 skb = tx_buf->skb; in __bnxt_tx_int()
815 is_ts_pkt = tx_buf->is_ts_pkt; in __bnxt_tx_int()
816 if (is_ts_pkt && (bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) { in __bnxt_tx_int()
823 tx_bytes += skb->len; in __bnxt_tx_int()
824 tx_buf->skb = NULL; in __bnxt_tx_int()
825 tx_buf->is_ts_pkt = 0; in __bnxt_tx_int()
827 if (tx_buf->is_push) { in __bnxt_tx_int()
828 tx_buf->is_push = 0; in __bnxt_tx_int()
832 dma_unmap_single(&pdev->dev, dma_unmap_addr(tx_buf, mapping), in __bnxt_tx_int()
834 last = tx_buf->nr_frags; in __bnxt_tx_int()
838 tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)]; in __bnxt_tx_int()
840 &pdev->dev, in __bnxt_tx_int()
842 skb_frag_size(&skb_shinfo(skb)->frags[j]), in __bnxt_tx_int()
848 bnxt_get_tx_ts_p5(bp, skb, tx_buf->txts_prod); in __bnxt_tx_int()
859 WRITE_ONCE(txr->tx_cons, cons); in __bnxt_tx_int()
862 bnxt_tx_avail(bp, txr), bp->tx_wake_thresh, in __bnxt_tx_int()
863 READ_ONCE(txr->dev_state) == BNXT_DEV_STATE_CLOSING); in __bnxt_tx_int()
875 if (txr->tx_hw_cons != RING_TX(bp, txr->tx_cons)) in bnxt_tx_int()
879 bnapi->events &= ~BNXT_TX_CMP_EVENT; in bnxt_tx_int()
895 page = page_pool_dev_alloc_frag(rxr->page_pool, offset, in __bnxt_alloc_rx_page()
898 page = page_pool_dev_alloc_pages(rxr->page_pool); in __bnxt_alloc_rx_page()
915 page = page_pool_alloc_frag(rxr->head_pool, &offset, in __bnxt_alloc_rx_frag()
916 bp->rx_buf_size, gfp); in __bnxt_alloc_rx_frag()
920 *mapping = page_pool_get_dma_addr(page) + bp->rx_dma_offset + offset; in __bnxt_alloc_rx_frag()
927 struct rx_bd *rxbd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)]; in bnxt_alloc_rx_data()
928 struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)]; in bnxt_alloc_rx_data()
937 return -ENOMEM; in bnxt_alloc_rx_data()
939 mapping += bp->rx_dma_offset; in bnxt_alloc_rx_data()
940 rx_buf->data = page; in bnxt_alloc_rx_data()
941 rx_buf->data_ptr = page_address(page) + offset + bp->rx_offset; in bnxt_alloc_rx_data()
946 return -ENOMEM; in bnxt_alloc_rx_data()
948 rx_buf->data = data; in bnxt_alloc_rx_data()
949 rx_buf->data_ptr = data + bp->rx_offset; in bnxt_alloc_rx_data()
951 rx_buf->mapping = mapping; in bnxt_alloc_rx_data()
953 rxbd->rx_bd_haddr = cpu_to_le64(mapping); in bnxt_alloc_rx_data()
959 u16 prod = rxr->rx_prod; in bnxt_reuse_rx_data()
961 struct bnxt *bp = rxr->bnapi->bp; in bnxt_reuse_rx_data()
964 prod_rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)]; in bnxt_reuse_rx_data()
965 cons_rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_reuse_rx_data()
967 prod_rx_buf->data = data; in bnxt_reuse_rx_data()
968 prod_rx_buf->data_ptr = cons_rx_buf->data_ptr; in bnxt_reuse_rx_data()
970 prod_rx_buf->mapping = cons_rx_buf->mapping; in bnxt_reuse_rx_data()
972 prod_bd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)]; in bnxt_reuse_rx_data()
973 cons_bd = &rxr->rx_desc_ring[RX_RING(bp, cons)][RX_IDX(cons)]; in bnxt_reuse_rx_data()
975 prod_bd->rx_bd_haddr = cons_bd->rx_bd_haddr; in bnxt_reuse_rx_data()
980 u16 next, max = rxr->rx_agg_bmap_size; in bnxt_find_next_agg_idx()
982 next = find_next_zero_bit(rxr->rx_agg_bmap, max, idx); in bnxt_find_next_agg_idx()
984 next = find_first_zero_bit(rxr->rx_agg_bmap, max); in bnxt_find_next_agg_idx()
993 &rxr->rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)]; in bnxt_alloc_rx_page()
997 u16 sw_prod = rxr->rx_sw_agg_prod; in bnxt_alloc_rx_page()
1003 return -ENOMEM; in bnxt_alloc_rx_page()
1005 if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap))) in bnxt_alloc_rx_page()
1008 __set_bit(sw_prod, rxr->rx_agg_bmap); in bnxt_alloc_rx_page()
1009 rx_agg_buf = &rxr->rx_agg_ring[sw_prod]; in bnxt_alloc_rx_page()
1010 rxr->rx_sw_agg_prod = RING_RX_AGG(bp, NEXT_RX_AGG(sw_prod)); in bnxt_alloc_rx_page()
1012 rx_agg_buf->page = page; in bnxt_alloc_rx_page()
1013 rx_agg_buf->offset = offset; in bnxt_alloc_rx_page()
1014 rx_agg_buf->mapping = mapping; in bnxt_alloc_rx_page()
1015 rxbd->rx_bd_haddr = cpu_to_le64(mapping); in bnxt_alloc_rx_page()
1016 rxbd->rx_bd_opaque = sw_prod; in bnxt_alloc_rx_page()
1028 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_get_agg()
1036 struct bnxt_tpa_info *tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_get_tpa_agg_p5()
1038 return &tpa_info->agg_arr[curr]; in bnxt_get_tpa_agg_p5()
1044 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_reuse_rx_agg_bufs()
1045 struct bnxt *bp = bnapi->bp; in bnxt_reuse_rx_agg_bufs()
1046 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_reuse_rx_agg_bufs()
1047 u16 prod = rxr->rx_agg_prod; in bnxt_reuse_rx_agg_bufs()
1048 u16 sw_prod = rxr->rx_sw_agg_prod; in bnxt_reuse_rx_agg_bufs()
1052 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && tpa) in bnxt_reuse_rx_agg_bufs()
1066 cons = agg->rx_agg_cmp_opaque; in bnxt_reuse_rx_agg_bufs()
1067 __clear_bit(cons, rxr->rx_agg_bmap); in bnxt_reuse_rx_agg_bufs()
1069 if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap))) in bnxt_reuse_rx_agg_bufs()
1072 __set_bit(sw_prod, rxr->rx_agg_bmap); in bnxt_reuse_rx_agg_bufs()
1073 prod_rx_buf = &rxr->rx_agg_ring[sw_prod]; in bnxt_reuse_rx_agg_bufs()
1074 cons_rx_buf = &rxr->rx_agg_ring[cons]; in bnxt_reuse_rx_agg_bufs()
1077 * set cons_rx_buf->page to NULL first. in bnxt_reuse_rx_agg_bufs()
1079 page = cons_rx_buf->page; in bnxt_reuse_rx_agg_bufs()
1080 cons_rx_buf->page = NULL; in bnxt_reuse_rx_agg_bufs()
1081 prod_rx_buf->page = page; in bnxt_reuse_rx_agg_bufs()
1082 prod_rx_buf->offset = cons_rx_buf->offset; in bnxt_reuse_rx_agg_bufs()
1084 prod_rx_buf->mapping = cons_rx_buf->mapping; in bnxt_reuse_rx_agg_bufs()
1086 prod_bd = &rxr->rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)]; in bnxt_reuse_rx_agg_bufs()
1088 prod_bd->rx_bd_haddr = cpu_to_le64(cons_rx_buf->mapping); in bnxt_reuse_rx_agg_bufs()
1089 prod_bd->rx_bd_opaque = sw_prod; in bnxt_reuse_rx_agg_bufs()
1094 rxr->rx_agg_prod = prod; in bnxt_reuse_rx_agg_bufs()
1095 rxr->rx_sw_agg_prod = sw_prod; in bnxt_reuse_rx_agg_bufs()
1106 u16 prod = rxr->rx_prod; in bnxt_rx_multi_page_skb()
1115 dma_addr -= bp->rx_dma_offset; in bnxt_rx_multi_page_skb()
1116 dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE, in bnxt_rx_multi_page_skb()
1117 bp->rx_dir); in bnxt_rx_multi_page_skb()
1118 skb = napi_build_skb(data_ptr - bp->rx_offset, BNXT_RX_PAGE_SIZE); in bnxt_rx_multi_page_skb()
1120 page_pool_recycle_direct(rxr->page_pool, page); in bnxt_rx_multi_page_skb()
1124 skb_reserve(skb, bp->rx_offset); in bnxt_rx_multi_page_skb()
1140 u16 prod = rxr->rx_prod; in bnxt_rx_page_skb()
1149 dma_addr -= bp->rx_dma_offset; in bnxt_rx_page_skb()
1150 dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE, in bnxt_rx_page_skb()
1151 bp->rx_dir); in bnxt_rx_page_skb()
1154 payload = eth_get_headlen(bp->dev, data_ptr, len); in bnxt_rx_page_skb()
1156 skb = napi_alloc_skb(&rxr->bnapi->napi, payload); in bnxt_rx_page_skb()
1158 page_pool_recycle_direct(rxr->page_pool, page); in bnxt_rx_page_skb()
1163 off = (void *)data_ptr - page_address(page); in bnxt_rx_page_skb()
1165 memcpy(skb->data - NET_IP_ALIGN, data_ptr - NET_IP_ALIGN, in bnxt_rx_page_skb()
1168 frag = &skb_shinfo(skb)->frags[0]; in bnxt_rx_page_skb()
1171 skb->data_len -= payload; in bnxt_rx_page_skb()
1172 skb->tail += payload; in bnxt_rx_page_skb()
1183 u16 prod = rxr->rx_prod; in bnxt_rx_skb()
1193 skb = napi_build_skb(data, bp->rx_buf_size); in bnxt_rx_skb()
1194 dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, bp->rx_buf_use_size, in bnxt_rx_skb()
1195 bp->rx_dir); in bnxt_rx_skb()
1197 page_pool_free_va(rxr->head_pool, data, true); in bnxt_rx_skb()
1202 skb_reserve(skb, bp->rx_offset); in bnxt_rx_skb()
1213 struct bnxt_napi *bnapi = cpr->bnapi; in __bnxt_rx_agg_pages()
1214 struct pci_dev *pdev = bp->pdev; in __bnxt_rx_agg_pages()
1215 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in __bnxt_rx_agg_pages()
1216 u16 prod = rxr->rx_agg_prod; in __bnxt_rx_agg_pages()
1220 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && tpa) in __bnxt_rx_agg_pages()
1224 skb_frag_t *frag = &shinfo->frags[i]; in __bnxt_rx_agg_pages()
1235 cons = agg->rx_agg_cmp_opaque; in __bnxt_rx_agg_pages()
1236 frag_len = (le32_to_cpu(agg->rx_agg_cmp_len_flags_type) & in __bnxt_rx_agg_pages()
1239 cons_rx_buf = &rxr->rx_agg_ring[cons]; in __bnxt_rx_agg_pages()
1240 skb_frag_fill_page_desc(frag, cons_rx_buf->page, in __bnxt_rx_agg_pages()
1241 cons_rx_buf->offset, frag_len); in __bnxt_rx_agg_pages()
1242 shinfo->nr_frags = i + 1; in __bnxt_rx_agg_pages()
1243 __clear_bit(cons, rxr->rx_agg_bmap); in __bnxt_rx_agg_pages()
1249 mapping = cons_rx_buf->mapping; in __bnxt_rx_agg_pages()
1250 page = cons_rx_buf->page; in __bnxt_rx_agg_pages()
1251 cons_rx_buf->page = NULL; in __bnxt_rx_agg_pages()
1257 --shinfo->nr_frags; in __bnxt_rx_agg_pages()
1258 cons_rx_buf->page = page; in __bnxt_rx_agg_pages()
1263 rxr->rx_agg_prod = prod; in __bnxt_rx_agg_pages()
1264 bnxt_reuse_rx_agg_bufs(cpr, idx, i, agg_bufs - i, tpa); in __bnxt_rx_agg_pages()
1268 dma_sync_single_for_cpu(&pdev->dev, mapping, BNXT_RX_PAGE_SIZE, in __bnxt_rx_agg_pages()
1269 bp->rx_dir); in __bnxt_rx_agg_pages()
1274 rxr->rx_agg_prod = prod; in __bnxt_rx_agg_pages()
1294 skb->data_len += total_frag_len; in bnxt_rx_agg_pages_skb()
1295 skb->len += total_frag_len; in bnxt_rx_agg_pages_skb()
1296 skb->truesize += BNXT_RX_PAGE_SIZE * agg_bufs; in bnxt_rx_agg_pages_skb()
1309 shinfo->nr_frags = 0; in bnxt_rx_agg_pages_xdp()
1315 shinfo->nr_frags = agg_bufs; in bnxt_rx_agg_pages_xdp()
1316 shinfo->xdp_frags_size = total_frag_len; in bnxt_rx_agg_pages_xdp()
1330 &cpr->cp_desc_ring[CP_RING(last)][CP_IDX(last)]; in bnxt_agg_bufs_valid()
1338 struct bnxt *bp = bnapi->bp; in bnxt_copy_data()
1339 struct pci_dev *pdev = bp->pdev; in bnxt_copy_data()
1342 skb = napi_alloc_skb(&bnapi->napi, len); in bnxt_copy_data()
1346 dma_sync_single_for_cpu(&pdev->dev, mapping, bp->rx_copy_thresh, in bnxt_copy_data()
1347 bp->rx_dir); in bnxt_copy_data()
1349 memcpy(skb->data - NET_IP_ALIGN, data - NET_IP_ALIGN, in bnxt_copy_data()
1352 dma_sync_single_for_device(&pdev->dev, mapping, bp->rx_copy_thresh, in bnxt_copy_data()
1353 bp->rx_dir); in bnxt_copy_data()
1373 u8 *data = xdp->data; in bnxt_copy_xdp()
1376 len = xdp->data_end - xdp->data_meta; in bnxt_copy_xdp()
1377 metasize = xdp->data - xdp->data_meta; in bnxt_copy_xdp()
1378 data = xdp->data_meta; in bnxt_copy_xdp()
1402 agg_bufs = (le32_to_cpu(rxcmp->rx_cmp_misc_v1) & in bnxt_discard_rx()
1408 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_discard_rx()
1416 return -EBUSY; in bnxt_discard_rx()
1424 struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map; in bnxt_alloc_agg_idx()
1427 if (test_bit(idx, map->agg_idx_bmap)) in bnxt_alloc_agg_idx()
1428 idx = find_first_zero_bit(map->agg_idx_bmap, in bnxt_alloc_agg_idx()
1430 __set_bit(idx, map->agg_idx_bmap); in bnxt_alloc_agg_idx()
1431 map->agg_id_tbl[agg_id] = idx; in bnxt_alloc_agg_idx()
1437 struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map; in bnxt_free_agg_idx()
1439 __clear_bit(idx, map->agg_idx_bmap); in bnxt_free_agg_idx()
1444 struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map; in bnxt_lookup_agg_idx()
1446 return map->agg_id_tbl[agg_id]; in bnxt_lookup_agg_idx()
1453 tpa_info->cfa_code_valid = 1; in bnxt_tpa_metadata()
1454 tpa_info->cfa_code = TPA_START_CFA_CODE(tpa_start1); in bnxt_tpa_metadata()
1455 tpa_info->vlan_valid = 0; in bnxt_tpa_metadata()
1456 if (tpa_info->flags2 & RX_CMP_FLAGS2_META_FORMAT_VLAN) { in bnxt_tpa_metadata()
1457 tpa_info->vlan_valid = 1; in bnxt_tpa_metadata()
1458 tpa_info->metadata = in bnxt_tpa_metadata()
1459 le32_to_cpu(tpa_start1->rx_tpa_start_cmp_metadata); in bnxt_tpa_metadata()
1467 tpa_info->vlan_valid = 0; in bnxt_tpa_metadata_v2()
1472 tpa_info->vlan_valid = 1; in bnxt_tpa_metadata_v2()
1475 tpa_info->metadata = vlan_proto << 16 | in bnxt_tpa_metadata_v2()
1490 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_tpa_start()
1496 cons = tpa_start->rx_tpa_start_cmp_opaque; in bnxt_tpa_start()
1497 prod = rxr->rx_prod; in bnxt_tpa_start()
1498 cons_rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_tpa_start()
1499 prod_rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)]; in bnxt_tpa_start()
1500 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_start()
1502 if (unlikely(cons != rxr->rx_next_cons || in bnxt_tpa_start()
1504 netdev_warn(bp->dev, "TPA cons %x, expected cons %x, error code %x\n", in bnxt_tpa_start()
1505 cons, rxr->rx_next_cons, in bnxt_tpa_start()
1510 prod_rx_buf->data = tpa_info->data; in bnxt_tpa_start()
1511 prod_rx_buf->data_ptr = tpa_info->data_ptr; in bnxt_tpa_start()
1513 mapping = tpa_info->mapping; in bnxt_tpa_start()
1514 prod_rx_buf->mapping = mapping; in bnxt_tpa_start()
1516 prod_bd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)]; in bnxt_tpa_start()
1518 prod_bd->rx_bd_haddr = cpu_to_le64(mapping); in bnxt_tpa_start()
1520 tpa_info->data = cons_rx_buf->data; in bnxt_tpa_start()
1521 tpa_info->data_ptr = cons_rx_buf->data_ptr; in bnxt_tpa_start()
1522 cons_rx_buf->data = NULL; in bnxt_tpa_start()
1523 tpa_info->mapping = cons_rx_buf->mapping; in bnxt_tpa_start()
1525 tpa_info->len = in bnxt_tpa_start()
1526 le32_to_cpu(tpa_start->rx_tpa_start_cmp_len_flags_type) >> in bnxt_tpa_start()
1529 tpa_info->hash_type = PKT_HASH_TYPE_L4; in bnxt_tpa_start()
1530 tpa_info->gso_type = SKB_GSO_TCPV4; in bnxt_tpa_start()
1532 tpa_info->gso_type = SKB_GSO_TCPV6; in bnxt_tpa_start()
1533 /* RSS profiles 1 and 3 with extract code 0 for inner 4-tuple */ in bnxt_tpa_start()
1536 tpa_info->gso_type = SKB_GSO_TCPV6; in bnxt_tpa_start()
1537 tpa_info->rss_hash = in bnxt_tpa_start()
1538 le32_to_cpu(tpa_start->rx_tpa_start_cmp_rss_hash); in bnxt_tpa_start()
1540 tpa_info->hash_type = PKT_HASH_TYPE_NONE; in bnxt_tpa_start()
1541 tpa_info->gso_type = 0; in bnxt_tpa_start()
1542 netif_warn(bp, rx_err, bp->dev, "TPA packet without valid hash\n"); in bnxt_tpa_start()
1544 tpa_info->flags2 = le32_to_cpu(tpa_start1->rx_tpa_start_cmp_flags2); in bnxt_tpa_start()
1545 tpa_info->hdr_info = le32_to_cpu(tpa_start1->rx_tpa_start_cmp_hdr_info); in bnxt_tpa_start()
1550 tpa_info->agg_count = 0; in bnxt_tpa_start()
1552 rxr->rx_prod = NEXT_RX(prod); in bnxt_tpa_start()
1554 rxr->rx_next_cons = RING_RX(bp, NEXT_RX(cons)); in bnxt_tpa_start()
1555 cons_rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_tpa_start()
1557 bnxt_reuse_rx_data(rxr, cons, cons_rx_buf->data); in bnxt_tpa_start()
1558 rxr->rx_prod = NEXT_RX(rxr->rx_prod); in bnxt_tpa_start()
1559 cons_rx_buf->data = NULL; in bnxt_tpa_start()
1574 struct iphdr *iph = (struct iphdr *)skb->data; in bnxt_gro_tunnel()
1576 if (iph->protocol == IPPROTO_UDP) in bnxt_gro_tunnel()
1579 struct ipv6hdr *iph = (struct ipv6hdr *)skb->data; in bnxt_gro_tunnel()
1581 if (iph->nexthdr == IPPROTO_UDP) in bnxt_gro_tunnel()
1585 if (uh->check) in bnxt_gro_tunnel()
1586 skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL_CSUM; in bnxt_gro_tunnel()
1588 skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL; in bnxt_gro_tunnel()
1601 u32 hdr_info = tpa_info->hdr_info; in bnxt_gro_func_5731x()
1614 __be16 proto = *((__be16 *)(skb->data + inner_ip_off - in bnxt_gro_func_5731x()
1615 ETH_HLEN - 2)); in bnxt_gro_func_5731x()
1626 inner_ip_off -= 4; in bnxt_gro_func_5731x()
1627 inner_mac_off -= 4; in bnxt_gro_func_5731x()
1628 outer_ip_off -= 4; in bnxt_gro_func_5731x()
1631 nw_off = inner_ip_off - ETH_HLEN; in bnxt_gro_func_5731x()
1633 if (tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_IP_TYPE) { in bnxt_gro_func_5731x()
1637 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5731x()
1639 th->check = ~tcp_v6_check(len, &iph->saddr, &iph->daddr, 0); in bnxt_gro_func_5731x()
1644 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5731x()
1646 th->check = ~tcp_v4_check(len, iph->saddr, iph->daddr, 0); in bnxt_gro_func_5731x()
1650 __be16 proto = *((__be16 *)(skb->data + outer_ip_off - in bnxt_gro_func_5731x()
1651 ETH_HLEN - 2)); in bnxt_gro_func_5731x()
1665 u32 hdr_info = tpa_info->hdr_info; in bnxt_gro_func_5750x()
1672 nw_off = inner_ip_off - ETH_HLEN; in bnxt_gro_func_5750x()
1674 iphdr_len = (tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_IP_TYPE) ? in bnxt_gro_func_5750x()
1679 __be16 proto = *((__be16 *)(skb->data + outer_ip_off - in bnxt_gro_func_5750x()
1680 ETH_HLEN - 2)); in bnxt_gro_func_5750x()
1702 if (tpa_info->gso_type == SKB_GSO_TCPV4) { in bnxt_gro_func_5730x()
1705 nw_off = payload_off - BNXT_IPV4_HDR_SIZE - tcp_opt_len - in bnxt_gro_func_5730x()
1710 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5730x()
1712 th->check = ~tcp_v4_check(len, iph->saddr, iph->daddr, 0); in bnxt_gro_func_5730x()
1713 } else if (tpa_info->gso_type == SKB_GSO_TCPV6) { in bnxt_gro_func_5730x()
1716 nw_off = payload_off - BNXT_IPV6_HDR_SIZE - tcp_opt_len - in bnxt_gro_func_5730x()
1721 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5730x()
1723 th->check = ~tcp_v6_check(len, &iph->saddr, &iph->daddr, 0); in bnxt_gro_func_5730x()
1730 bnxt_gro_tunnel(skb, skb->protocol); in bnxt_gro_func_5730x()
1749 NAPI_GRO_CB(skb)->count = segs; in bnxt_gro_skb()
1750 skb_shinfo(skb)->gso_size = in bnxt_gro_skb()
1751 le32_to_cpu(tpa_end1->rx_tpa_end_cmp_seg_len); in bnxt_gro_skb()
1752 skb_shinfo(skb)->gso_type = tpa_info->gso_type; in bnxt_gro_skb()
1753 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_gro_skb()
1757 skb = bp->gro_func(tpa_info, payload_off, TPA_END_GRO_TS(tpa_end), skb); in bnxt_gro_skb()
1765 * netdev (vf-rep or PF) the packet is destined to.
1771 /* if vf-rep dev is NULL, the must belongs to the PF */ in bnxt_get_pkt_dev()
1772 return dev ? dev : bp->dev; in bnxt_get_pkt_dev()
1782 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_tpa_end()
1783 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_tpa_end()
1784 struct net_device *dev = bp->dev; in bnxt_tpa_end()
1794 if (unlikely(bnapi->in_reset)) { in bnxt_tpa_end()
1798 return ERR_PTR(-EBUSY); in bnxt_tpa_end()
1802 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_tpa_end()
1806 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_end()
1807 if (unlikely(agg_bufs != tpa_info->agg_count)) { in bnxt_tpa_end()
1808 netdev_warn(bp->dev, "TPA end agg_buf %d != expected agg_bufs %d\n", in bnxt_tpa_end()
1809 agg_bufs, tpa_info->agg_count); in bnxt_tpa_end()
1810 agg_bufs = tpa_info->agg_count; in bnxt_tpa_end()
1812 tpa_info->agg_count = 0; in bnxt_tpa_end()
1816 gro = !!(bp->flags & BNXT_FLAG_GRO); in bnxt_tpa_end()
1820 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_end()
1824 return ERR_PTR(-EBUSY); in bnxt_tpa_end()
1831 data = tpa_info->data; in bnxt_tpa_end()
1832 data_ptr = tpa_info->data_ptr; in bnxt_tpa_end()
1834 len = tpa_info->len; in bnxt_tpa_end()
1835 mapping = tpa_info->mapping; in bnxt_tpa_end()
1840 netdev_warn(bp->dev, "TPA frags %d exceeded MAX_SKB_FRAGS %d\n", in bnxt_tpa_end()
1845 if (len <= bp->rx_copy_thresh) { in bnxt_tpa_end()
1849 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1860 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1864 tpa_info->data = new_data; in bnxt_tpa_end()
1865 tpa_info->data_ptr = new_data + bp->rx_offset; in bnxt_tpa_end()
1866 tpa_info->mapping = new_mapping; in bnxt_tpa_end()
1868 skb = napi_build_skb(data, bp->rx_buf_size); in bnxt_tpa_end()
1869 dma_sync_single_for_cpu(&bp->pdev->dev, mapping, in bnxt_tpa_end()
1870 bp->rx_buf_use_size, bp->rx_dir); in bnxt_tpa_end()
1873 page_pool_free_va(rxr->head_pool, data, true); in bnxt_tpa_end()
1875 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1879 skb_reserve(skb, bp->rx_offset); in bnxt_tpa_end()
1887 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1892 if (tpa_info->cfa_code_valid) in bnxt_tpa_end()
1893 dev = bnxt_get_pkt_dev(bp, tpa_info->cfa_code); in bnxt_tpa_end()
1894 skb->protocol = eth_type_trans(skb, dev); in bnxt_tpa_end()
1896 if (tpa_info->hash_type != PKT_HASH_TYPE_NONE) in bnxt_tpa_end()
1897 skb_set_hash(skb, tpa_info->rss_hash, tpa_info->hash_type); in bnxt_tpa_end()
1899 if (tpa_info->vlan_valid && in bnxt_tpa_end()
1900 (dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX)) { in bnxt_tpa_end()
1901 __be16 vlan_proto = htons(tpa_info->metadata >> in bnxt_tpa_end()
1903 u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_TCI_MASK; in bnxt_tpa_end()
1914 if (likely(tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_L4_CS_CALC)) { in bnxt_tpa_end()
1915 skb->ip_summed = CHECKSUM_UNNECESSARY; in bnxt_tpa_end()
1916 skb->csum_level = in bnxt_tpa_end()
1917 (tpa_info->flags2 & RX_CMP_FLAGS2_T_L4_CS_CALC) >> 3; in bnxt_tpa_end()
1933 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_agg()
1934 BUG_ON(tpa_info->agg_count >= MAX_SKB_FRAGS); in bnxt_tpa_agg()
1935 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg; in bnxt_tpa_agg()
1943 if (skb->dev != bp->dev) { in bnxt_deliver_skb()
1944 /* this packet belongs to a vf-rep */ in bnxt_deliver_skb()
1948 skb_record_rx_queue(skb, bnapi->index); in bnxt_deliver_skb()
1949 napi_gro_receive(&bnapi->napi, skb); in bnxt_deliver_skb()
1955 u32 ts = le32_to_cpu(rxcmp1->rx_cmp_timestamp); in bnxt_rx_ts_valid()
1959 if (!bp->ptp_all_rx_tstamp || !ts || !BNXT_ALL_RX_TS_VALID(flags)) in bnxt_rx_ts_valid()
1975 __le32 flags2 = rxcmp1->rx_cmp_flags2; in bnxt_rx_vlan()
1981 meta_data = le32_to_cpu(rxcmp1->rx_cmp_meta_data); in bnxt_rx_vlan()
2026 * 1 - 1 packet successfully received
2027 * 0 - successful TPA_START, packet not completed yet
2028 * -EBUSY - completion ring does not have all the agg buffers yet
2029 * -ENOMEM - packet aborted due to out of memory
2030 * -EIO - packet aborted due to hw error indicated in BD
2035 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_rx_pkt()
2036 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_rx_pkt()
2037 struct net_device *dev = bp->dev; in bnxt_rx_pkt()
2055 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_rx_pkt()
2067 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_rx_pkt()
2070 return -EBUSY; in bnxt_rx_pkt()
2076 prod = rxr->rx_prod; in bnxt_rx_pkt()
2093 return -EBUSY; in bnxt_rx_pkt()
2095 rc = -ENOMEM; in bnxt_rx_pkt()
2104 cons = rxcmp->rx_cmp_opaque; in bnxt_rx_pkt()
2105 if (unlikely(cons != rxr->rx_next_cons)) { in bnxt_rx_pkt()
2109 if (rxr->rx_next_cons != 0xffff) in bnxt_rx_pkt()
2110 netdev_warn(bp->dev, "RX cons %x != expected cons %x\n", in bnxt_rx_pkt()
2111 cons, rxr->rx_next_cons); in bnxt_rx_pkt()
2117 rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_rx_pkt()
2118 data = rx_buf->data; in bnxt_rx_pkt()
2119 data_ptr = rx_buf->data_ptr; in bnxt_rx_pkt()
2122 misc = le32_to_cpu(rxcmp->rx_cmp_misc_v1); in bnxt_rx_pkt()
2127 return -EBUSY; in bnxt_rx_pkt()
2134 rx_buf->data = NULL; in bnxt_rx_pkt()
2135 if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L2_ERRORS) { in bnxt_rx_pkt()
2136 u32 rx_err = le32_to_cpu(rxcmp1->rx_cmp_cfa_code_errors_v2); in bnxt_rx_pkt()
2143 rc = -EIO; in bnxt_rx_pkt()
2145 bnapi->cp_ring.sw_stats->rx.rx_buf_errors++; in bnxt_rx_pkt()
2146 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_rx_pkt()
2147 !(bp->fw_cap & BNXT_FW_CAP_RING_MONITOR)) { in bnxt_rx_pkt()
2148 netdev_warn_once(bp->dev, "RX buffer error %x\n", in bnxt_rx_pkt()
2156 flags = le32_to_cpu(rxcmp->rx_cmp_len_flags_type); in bnxt_rx_pkt()
2158 dma_addr = rx_buf->mapping; in bnxt_rx_pkt()
2179 if (len <= bp->rx_copy_thresh) { in bnxt_rx_pkt()
2198 if (rx_buf->data_ptr == data_ptr) in bnxt_rx_pkt()
2202 skb = bp->rx_skb_func(bp, rxr, cons, data, data_ptr, dma_addr, in bnxt_rx_pkt()
2214 skb = bnxt_xdp_build_skb(bp, skb, agg_bufs, rxr->page_pool, &xdp, rxcmp1); in bnxt_rx_pkt()
2237 skb_set_hash(skb, le32_to_cpu(rxcmp->rx_cmp_rss_hash), type); in bnxt_rx_pkt()
2242 skb->protocol = eth_type_trans(skb, dev); in bnxt_rx_pkt()
2244 if (skb->dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX) { in bnxt_rx_pkt()
2252 if (dev->features & NETIF_F_RXCSUM) { in bnxt_rx_pkt()
2253 skb->ip_summed = CHECKSUM_UNNECESSARY; in bnxt_rx_pkt()
2254 skb->csum_level = RX_CMP_ENCAP(rxcmp1); in bnxt_rx_pkt()
2257 if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L4_CS_ERR_BITS) { in bnxt_rx_pkt()
2258 if (dev->features & NETIF_F_RXCSUM) in bnxt_rx_pkt()
2259 bnapi->cp_ring.sw_stats->rx.rx_l4_csum_errors++; in bnxt_rx_pkt()
2264 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_rx_pkt()
2268 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_rx_pkt()
2273 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns); in bnxt_rx_pkt()
2281 cpr->rx_packets += 1; in bnxt_rx_pkt()
2282 cpr->rx_bytes += len; in bnxt_rx_pkt()
2285 rxr->rx_prod = NEXT_RX(prod); in bnxt_rx_pkt()
2286 rxr->rx_next_cons = RING_RX(bp, NEXT_RX(cons)); in bnxt_rx_pkt()
2294 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_rx_pkt()
2295 rc = -ENOMEM; in bnxt_rx_pkt()
2315 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_force_rx_discard()
2320 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_force_rx_discard()
2323 return -EBUSY; in bnxt_force_rx_discard()
2332 rxcmp1->rx_cmp_cfa_code_errors_v2 |= in bnxt_force_rx_discard()
2338 tpa_end1->rx_tpa_end_cmp_errors_v2 |= in bnxt_force_rx_discard()
2342 if (rc && rc != -EBUSY) in bnxt_force_rx_discard()
2343 cpr->sw_stats->rx.rx_netpoll_discards += 1; in bnxt_force_rx_discard()
2349 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_health_readl()
2350 u32 reg = fw_health->regs[reg_idx]; in bnxt_fw_health_readl()
2357 pci_read_config_dword(bp->pdev, reg_off, &val); in bnxt_fw_health_readl()
2360 reg_off = fw_health->mapped_regs[reg_idx]; in bnxt_fw_health_readl()
2363 val = readl(bp->bar0 + reg_off); in bnxt_fw_health_readl()
2366 val = readl(bp->bar1 + reg_off); in bnxt_fw_health_readl()
2370 val &= fw_health->fw_reset_inprog_reg_mask; in bnxt_fw_health_readl()
2378 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_agg_ring_id_to_grp_idx()
2379 u16 grp_idx = bp->rx_ring[i].bnapi->index; in bnxt_agg_ring_id_to_grp_idx()
2382 grp_info = &bp->grp_info[grp_idx]; in bnxt_agg_ring_id_to_grp_idx()
2383 if (grp_info->agg_fw_ring_id == ring_id) in bnxt_agg_ring_id_to_grp_idx()
2393 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) in bnxt_get_force_speed()
2394 return link_info->force_link_speed2; in bnxt_get_force_speed()
2395 if (link_info->req_signal_mode == BNXT_SIG_MODE_PAM4) in bnxt_get_force_speed()
2396 return link_info->force_pam4_link_speed; in bnxt_get_force_speed()
2397 return link_info->force_link_speed; in bnxt_get_force_speed()
2404 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_set_force_speed()
2405 link_info->req_link_speed = link_info->force_link_speed2; in bnxt_set_force_speed()
2406 link_info->req_signal_mode = BNXT_SIG_MODE_NRZ; in bnxt_set_force_speed()
2407 switch (link_info->req_link_speed) { in bnxt_set_force_speed()
2412 link_info->req_signal_mode = BNXT_SIG_MODE_PAM4; in bnxt_set_force_speed()
2417 link_info->req_signal_mode = BNXT_SIG_MODE_PAM4_112; in bnxt_set_force_speed()
2420 link_info->req_signal_mode = BNXT_SIG_MODE_NRZ; in bnxt_set_force_speed()
2424 link_info->req_link_speed = link_info->force_link_speed; in bnxt_set_force_speed()
2425 link_info->req_signal_mode = BNXT_SIG_MODE_NRZ; in bnxt_set_force_speed()
2426 if (link_info->force_pam4_link_speed) { in bnxt_set_force_speed()
2427 link_info->req_link_speed = link_info->force_pam4_link_speed; in bnxt_set_force_speed()
2428 link_info->req_signal_mode = BNXT_SIG_MODE_PAM4; in bnxt_set_force_speed()
2436 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_set_auto_speed()
2437 link_info->advertising = link_info->auto_link_speeds2; in bnxt_set_auto_speed()
2440 link_info->advertising = link_info->auto_link_speeds; in bnxt_set_auto_speed()
2441 link_info->advertising_pam4 = link_info->auto_pam4_link_speeds; in bnxt_set_auto_speed()
2448 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_force_speed_updated()
2449 if (link_info->req_link_speed != link_info->force_link_speed2) in bnxt_force_speed_updated()
2453 if (link_info->req_signal_mode == BNXT_SIG_MODE_NRZ && in bnxt_force_speed_updated()
2454 link_info->req_link_speed != link_info->force_link_speed) in bnxt_force_speed_updated()
2456 if (link_info->req_signal_mode == BNXT_SIG_MODE_PAM4 && in bnxt_force_speed_updated()
2457 link_info->req_link_speed != link_info->force_pam4_link_speed) in bnxt_force_speed_updated()
2466 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_auto_speed_updated()
2467 if (link_info->advertising != link_info->auto_link_speeds2) in bnxt_auto_speed_updated()
2471 if (link_info->advertising != link_info->auto_link_speeds || in bnxt_auto_speed_updated()
2472 link_info->advertising_pam4 != link_info->auto_pam4_link_speeds) in bnxt_auto_speed_updated()
2479 u32 flags = bp->ctx->ctx_arr[type].flags; in bnxt_bs_trace_avail()
2489 u16 trace_type = bnxt_bstore_to_trace[ctxm->type]; in bnxt_bs_trace_init()
2490 struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; in bnxt_bs_trace_init()
2495 if (ctxm->instance_bmap && ctxm->instance_bmap > 1) in bnxt_bs_trace_init()
2498 mem_size = ctxm->max_entries * ctxm->entry_size; in bnxt_bs_trace_init()
2502 last_pg = (pages - 1) & (MAX_CTX_PAGES - 1); in bnxt_bs_trace_init()
2503 magic_byte_offset = (rem_bytes ? rem_bytes : BNXT_PAGE_SIZE) - 1; in bnxt_bs_trace_init()
2506 bs_trace = &bp->bs_trace[trace_type]; in bnxt_bs_trace_init()
2507 bs_trace->ctx_type = ctxm->type; in bnxt_bs_trace_init()
2508 bs_trace->trace_type = trace_type; in bnxt_bs_trace_init()
2510 int last_pg_dir = rmem->nr_pages - 1; in bnxt_bs_trace_init()
2512 rmem_pg_tbl = &ctx_pg[0].ctx_pg_tbl[last_pg_dir]->ring_mem; in bnxt_bs_trace_init()
2513 bs_trace->magic_byte = rmem_pg_tbl->pg_arr[last_pg]; in bnxt_bs_trace_init()
2515 bs_trace->magic_byte = rmem->pg_arr[last_pg]; in bnxt_bs_trace_init()
2517 bs_trace->magic_byte += magic_byte_offset; in bnxt_bs_trace_init()
2518 *bs_trace->magic_byte = BNXT_TRACE_BUF_MAGIC_BYTE; in bnxt_bs_trace_init()
2555 …netdev_err(bp->dev, "1PPS: Received invalid signal on pin%lu from the external source. Please fix … in bnxt_event_error_report()
2559 netdev_warn(bp->dev, "Pause Storm detected!\n"); in bnxt_event_error_report()
2562 netdev_warn(bp->dev, "One or more MMIO doorbells dropped by the device!\n"); in bnxt_event_error_report()
2584 netdev_err(bp->dev, "Unknown Thermal threshold type event\n"); in bnxt_event_error_report()
2593 netdev_warn(bp->dev, "Chip temperature has gone %s the %s thermal threshold!\n", in bnxt_event_error_report()
2595 netdev_warn(bp->dev, "Temperature (In Celsius), Current: %lu, threshold: %lu\n", in bnxt_event_error_report()
2599 bp->thermal_threshold_type = type; in bnxt_event_error_report()
2600 set_bit(BNXT_THERMAL_THRESHOLD_SP_EVENT, &bp->sp_event); in bnxt_event_error_report()
2606 netdev_warn(bp->dev, "Speed change not supported with dual rate transceivers on this board\n"); in bnxt_event_error_report()
2609 netdev_err(bp->dev, "FW reported unknown error type %u\n", in bnxt_event_error_report()
2641 u16 event_id = le16_to_cpu(cmpl->event_id); in bnxt_async_event_process()
2642 u32 data1 = le32_to_cpu(cmpl->event_data1); in bnxt_async_event_process()
2643 u32 data2 = le32_to_cpu(cmpl->event_data2); in bnxt_async_event_process()
2645 netdev_dbg(bp->dev, "hwrm event 0x%x {0x%x, 0x%x}\n", in bnxt_async_event_process()
2651 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_async_event_process()
2657 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED) && in bnxt_async_event_process()
2663 netdev_warn(bp->dev, "Link speed %d no longer supported\n", in bnxt_async_event_process()
2666 set_bit(BNXT_LINK_SPEED_CHNG_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2671 set_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2674 set_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2677 set_bit(BNXT_HWRM_PF_UNLOAD_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2685 if (bp->pf.port_id != port_id) in bnxt_async_event_process()
2688 set_bit(BNXT_HWRM_PORT_MODULE_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2694 set_bit(BNXT_RESET_TASK_SILENT_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2699 if (!bp->fw_health) in bnxt_async_event_process()
2702 bp->fw_reset_timestamp = jiffies; in bnxt_async_event_process()
2703 bp->fw_reset_min_dsecs = cmpl->timestamp_lo; in bnxt_async_event_process()
2704 if (!bp->fw_reset_min_dsecs) in bnxt_async_event_process()
2705 bp->fw_reset_min_dsecs = BNXT_DFLT_FW_RST_MIN_DSECS; in bnxt_async_event_process()
2706 bp->fw_reset_max_dsecs = le16_to_cpu(cmpl->timestamp_hi); in bnxt_async_event_process()
2707 if (!bp->fw_reset_max_dsecs) in bnxt_async_event_process()
2708 bp->fw_reset_max_dsecs = BNXT_DFLT_FW_RST_MAX_DSECS; in bnxt_async_event_process()
2710 set_bit(BNXT_STATE_FW_ACTIVATE_RESET, &bp->state); in bnxt_async_event_process()
2713 bp->fw_health->fatalities++; in bnxt_async_event_process()
2714 set_bit(BNXT_STATE_FW_FATAL_COND, &bp->state); in bnxt_async_event_process()
2717 type_str = "Non-fatal"; in bnxt_async_event_process()
2718 bp->fw_health->survivals++; in bnxt_async_event_process()
2719 set_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state); in bnxt_async_event_process()
2721 netif_warn(bp, hw, bp->dev, in bnxt_async_event_process()
2722 "%s firmware reset event, data1: 0x%x, data2: 0x%x, min wait %u ms, max wait %u ms\n", in bnxt_async_event_process()
2724 bp->fw_reset_min_dsecs * 100, in bnxt_async_event_process()
2725 bp->fw_reset_max_dsecs * 100); in bnxt_async_event_process()
2726 set_bit(BNXT_FW_RESET_NOTIFY_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2730 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_async_event_process()
2738 fw_health->enabled = false; in bnxt_async_event_process()
2739 netif_info(bp, drv, bp->dev, "Driver recovery watchdog is disabled\n"); in bnxt_async_event_process()
2742 fw_health->primary = EVENT_DATA1_RECOVERY_MASTER_FUNC(data1); in bnxt_async_event_process()
2743 fw_health->tmr_multiplier = in bnxt_async_event_process()
2744 DIV_ROUND_UP(fw_health->polling_dsecs * HZ, in bnxt_async_event_process()
2745 bp->current_interval * 10); in bnxt_async_event_process()
2746 fw_health->tmr_counter = fw_health->tmr_multiplier; in bnxt_async_event_process()
2747 if (!fw_health->enabled) in bnxt_async_event_process()
2748 fw_health->last_fw_heartbeat = in bnxt_async_event_process()
2750 fw_health->last_fw_reset_cnt = in bnxt_async_event_process()
2755 netif_info(bp, drv, bp->dev, in bnxt_async_event_process()
2756 "Driver recovery watchdog, role: %s, firmware status: 0x%x (%s), resets: %u\n", in bnxt_async_event_process()
2757 fw_health->primary ? "primary" : "backup", status, in bnxt_async_event_process()
2758 status_desc, fw_health->last_fw_reset_cnt); in bnxt_async_event_process()
2759 if (!fw_health->enabled) { in bnxt_async_event_process()
2764 fw_health->enabled = true; in bnxt_async_event_process()
2769 netif_notice(bp, hw, bp->dev, in bnxt_async_event_process()
2770 "Received firmware debug notification, data1: 0x%x, data2: 0x%x\n", in bnxt_async_event_process()
2777 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_async_event_process()
2780 netdev_warn(bp->dev, "Ring monitor event, ring type %lu id 0x%x\n", in bnxt_async_event_process()
2787 netdev_warn(bp->dev, "Unknown RX agg ring id 0x%x\n", in bnxt_async_event_process()
2791 rxr = bp->bnapi[grp_idx]->rx_ring; in bnxt_async_event_process()
2796 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_async_event_process()
2798 netif_notice(bp, hw, bp->dev, in bnxt_async_event_process()
2799 "Received firmware echo request, data1: 0x%x, data2: 0x%x\n", in bnxt_async_event_process()
2802 fw_health->echo_req_data1 = data1; in bnxt_async_event_process()
2803 fw_health->echo_req_data2 = data2; in bnxt_async_event_process()
2804 set_bit(BNXT_FW_ECHO_REQUEST_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2822 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_async_event_process()
2831 BNXT_PHC_BITS) | ptp->current_time); in bnxt_async_event_process()
2832 write_seqlock_irqsave(&ptp->ptp_lock, flags); in bnxt_async_event_process()
2834 write_sequnlock_irqrestore(&ptp->ptp_lock, flags); in bnxt_async_event_process()
2841 u16 seq_id = le32_to_cpu(cmpl->event_data2) & 0xffff; in bnxt_async_event_process()
2850 bnxt_bs_trace_check_wrap(&bp->bs_trace[type], offset); in bnxt_async_event_process()
2870 seq_id = le16_to_cpu(h_cmpl->sequence_id); in bnxt_hwrm_handler()
2875 vf_id = le16_to_cpu(fwd_req_cmpl->source_id); in bnxt_hwrm_handler()
2877 if ((vf_id < bp->pf.first_vf_id) || in bnxt_hwrm_handler()
2878 (vf_id >= bp->pf.first_vf_id + bp->pf.active_vfs)) { in bnxt_hwrm_handler()
2879 netdev_err(bp->dev, "Msg contains invalid VF id %x\n", in bnxt_hwrm_handler()
2881 return -EINVAL; in bnxt_hwrm_handler()
2884 set_bit(vf_id - bp->pf.first_vf_id, bp->pf.vf_event_bmap); in bnxt_hwrm_handler()
2903 struct bnxt *bp = bnapi->bp; in bnxt_msix()
2904 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_msix()
2905 u32 cons = RING_CMP(cpr->cp_raw_cons); in bnxt_msix()
2907 cpr->event_ctr++; in bnxt_msix()
2908 prefetch(&cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]); in bnxt_msix()
2909 napi_schedule(&bnapi->napi); in bnxt_msix()
2915 u32 raw_cons = cpr->cp_raw_cons; in bnxt_has_work()
2919 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; in bnxt_has_work()
2927 struct bnxt_napi *bnapi = cpr->bnapi; in __bnxt_poll_work()
2928 u32 raw_cons = cpr->cp_raw_cons; in __bnxt_poll_work()
2934 cpr->has_more_work = 0; in __bnxt_poll_work()
2935 cpr->had_work_done = 1; in __bnxt_poll_work()
2941 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; in __bnxt_poll_work()
2953 u32 opaque = txcmp->tx_cmp_opaque; in __bnxt_poll_work()
2957 txr = bnapi->tx_ring[TX_OPAQUE_RING(opaque)]; in __bnxt_poll_work()
2960 txr->tx_hw_cons = TX_CMP_SQ_CONS_IDX(txcmp); in __bnxt_poll_work()
2962 txr->tx_hw_cons = TX_OPAQUE_PROD(bp, opaque); in __bnxt_poll_work()
2963 tx_freed = (txr->tx_hw_cons - txr->tx_cons) & in __bnxt_poll_work()
2964 bp->tx_ring_mask; in __bnxt_poll_work()
2966 if (unlikely(tx_freed >= bp->tx_wake_thresh)) { in __bnxt_poll_work()
2970 cpr->has_more_work = 1; in __bnxt_poll_work()
2984 /* Increment rx_pkts when rc is -ENOMEM to count towards in __bnxt_poll_work()
2989 else if (rc == -ENOMEM && budget) in __bnxt_poll_work()
2991 else if (rc == -EBUSY) /* partial completion */ in __bnxt_poll_work()
3001 cpr->has_more_work = 1; in __bnxt_poll_work()
3012 struct bnxt_tx_ring_info *txr = bnapi->tx_ring[0]; in __bnxt_poll_work()
3013 u16 prod = txr->tx_prod; in __bnxt_poll_work()
3018 bnxt_db_write_relaxed(bp, &txr->tx_db, prod); in __bnxt_poll_work()
3022 cpr->cp_raw_cons = raw_cons; in __bnxt_poll_work()
3023 bnapi->events |= event; in __bnxt_poll_work()
3030 if ((bnapi->events & BNXT_TX_CMP_EVENT) && !bnapi->tx_fault) in __bnxt_poll_work_done()
3031 bnapi->tx_int(bp, bnapi, budget); in __bnxt_poll_work_done()
3033 if ((bnapi->events & BNXT_RX_EVENT) && !(bnapi->in_reset)) { in __bnxt_poll_work_done()
3034 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in __bnxt_poll_work_done()
3036 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in __bnxt_poll_work_done()
3037 bnapi->events &= ~BNXT_RX_EVENT; in __bnxt_poll_work_done()
3039 if (bnapi->events & BNXT_AGG_EVENT) { in __bnxt_poll_work_done()
3040 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in __bnxt_poll_work_done()
3042 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in __bnxt_poll_work_done()
3043 bnapi->events &= ~BNXT_AGG_EVENT; in __bnxt_poll_work_done()
3050 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_poll_work()
3059 bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll_work()
3068 struct bnxt *bp = bnapi->bp; in bnxt_poll_nitroa0()
3069 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_poll_nitroa0()
3070 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_poll_nitroa0()
3074 u32 raw_cons = cpr->cp_raw_cons; in bnxt_poll_nitroa0()
3083 txcmp = &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_poll_nitroa0()
3096 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_poll_nitroa0()
3102 rxcmp1->rx_cmp_cfa_code_errors_v2 |= in bnxt_poll_nitroa0()
3106 if (likely(rc == -EIO) && budget) in bnxt_poll_nitroa0()
3108 else if (rc == -EBUSY) /* partial completion */ in bnxt_poll_nitroa0()
3116 netdev_err(bp->dev, in bnxt_poll_nitroa0()
3125 cpr->cp_raw_cons = raw_cons; in bnxt_poll_nitroa0()
3126 BNXT_DB_CQ(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll_nitroa0()
3127 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_poll_nitroa0()
3130 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_poll_nitroa0()
3136 BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll_nitroa0()
3144 struct bnxt *bp = bnapi->bp; in bnxt_poll()
3145 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_poll()
3148 if (unlikely(test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))) { in bnxt_poll()
3153 work_done += bnxt_poll_work(bp, cpr, budget - work_done); in bnxt_poll()
3157 BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll()
3163 BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll()
3167 if (bp->flags & BNXT_FLAG_DIM) { in bnxt_poll()
3170 dim_update_sample(cpr->event_ctr, in bnxt_poll()
3171 cpr->rx_packets, in bnxt_poll()
3172 cpr->rx_bytes, in bnxt_poll()
3174 net_dim(&cpr->dim, &dim_sample); in bnxt_poll()
3181 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in __bnxt_poll_cqs()
3184 for (i = 0; i < cpr->cp_ring_count; i++) { in __bnxt_poll_cqs()
3185 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[i]; in __bnxt_poll_cqs()
3187 if (cpr2->had_nqe_notify) { in __bnxt_poll_cqs()
3189 budget - work_done); in __bnxt_poll_cqs()
3190 cpr->has_more_work |= cpr2->has_more_work; in __bnxt_poll_cqs()
3199 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in __bnxt_poll_cqs_done()
3202 for (i = 0; i < cpr->cp_ring_count; i++) { in __bnxt_poll_cqs_done()
3203 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[i]; in __bnxt_poll_cqs_done()
3206 if (cpr2->had_work_done) { in __bnxt_poll_cqs_done()
3210 cpr2->had_nqe_notify = 0; in __bnxt_poll_cqs_done()
3211 tgl = cpr2->toggle; in __bnxt_poll_cqs_done()
3213 db = &cpr2->cp_db; in __bnxt_poll_cqs_done()
3215 db->db_key64 | dbr_type | DB_TOGGLE(tgl) | in __bnxt_poll_cqs_done()
3216 DB_RING_IDX(db, cpr2->cp_raw_cons), in __bnxt_poll_cqs_done()
3217 db->doorbell); in __bnxt_poll_cqs_done()
3218 cpr2->had_work_done = 0; in __bnxt_poll_cqs_done()
3227 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_poll_p5()
3229 u32 raw_cons = cpr->cp_raw_cons; in bnxt_poll_p5()
3230 struct bnxt *bp = bnapi->bp; in bnxt_poll_p5()
3235 if (unlikely(test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))) { in bnxt_poll_p5()
3239 if (cpr->has_more_work) { in bnxt_poll_p5()
3240 cpr->has_more_work = 0; in bnxt_poll_p5()
3247 nqcmp = &cpr->nq_desc_ring[CP_RING(cons)][CP_IDX(cons)]; in bnxt_poll_p5()
3250 if (cpr->has_more_work) in bnxt_poll_p5()
3255 cpr->cp_raw_cons = raw_cons; in bnxt_poll_p5()
3257 BNXT_DB_NQ_ARM_P5(&cpr->cp_db, in bnxt_poll_p5()
3258 cpr->cp_raw_cons); in bnxt_poll_p5()
3267 type = le16_to_cpu(nqcmp->type); in bnxt_poll_p5()
3269 u32 idx = le32_to_cpu(nqcmp->cq_handle_low); in bnxt_poll_p5()
3279 cpr2 = &cpr->cp_ring_arr[idx]; in bnxt_poll_p5()
3280 cpr2->had_nqe_notify = 1; in bnxt_poll_p5()
3281 cpr2->toggle = NQE_CN_TOGGLE(type); in bnxt_poll_p5()
3283 budget - work_done); in bnxt_poll_p5()
3284 cpr->has_more_work |= cpr2->has_more_work; in bnxt_poll_p5()
3291 if (raw_cons != cpr->cp_raw_cons) { in bnxt_poll_p5()
3292 cpr->cp_raw_cons = raw_cons; in bnxt_poll_p5()
3293 BNXT_DB_NQ_P5(&cpr->cp_db, raw_cons); in bnxt_poll_p5()
3296 cpr_rx = &cpr->cp_ring_arr[0]; in bnxt_poll_p5()
3297 if (cpr_rx->cp_ring_type == BNXT_NQ_HDL_TYPE_RX && in bnxt_poll_p5()
3298 (bp->flags & BNXT_FLAG_DIM)) { in bnxt_poll_p5()
3301 dim_update_sample(cpr->event_ctr, in bnxt_poll_p5()
3302 cpr_rx->rx_packets, in bnxt_poll_p5()
3303 cpr_rx->rx_bytes, in bnxt_poll_p5()
3305 net_dim(&cpr->dim, &dim_sample); in bnxt_poll_p5()
3313 struct pci_dev *pdev = bp->pdev; in bnxt_free_tx_skbs()
3315 if (!bp->tx_ring) in bnxt_free_tx_skbs()
3318 max_idx = bp->tx_nr_pages * TX_DESC_CNT; in bnxt_free_tx_skbs()
3319 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_free_tx_skbs()
3320 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_free_tx_skbs()
3323 if (!txr->tx_buf_ring) in bnxt_free_tx_skbs()
3327 struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[j]; in bnxt_free_tx_skbs()
3331 if (i < bp->tx_nr_rings_xdp && in bnxt_free_tx_skbs()
3332 tx_buf->action == XDP_REDIRECT) { in bnxt_free_tx_skbs()
3333 dma_unmap_single(&pdev->dev, in bnxt_free_tx_skbs()
3337 xdp_return_frame(tx_buf->xdpf); in bnxt_free_tx_skbs()
3338 tx_buf->action = 0; in bnxt_free_tx_skbs()
3339 tx_buf->xdpf = NULL; in bnxt_free_tx_skbs()
3344 skb = tx_buf->skb; in bnxt_free_tx_skbs()
3350 tx_buf->skb = NULL; in bnxt_free_tx_skbs()
3352 if (tx_buf->is_push) { in bnxt_free_tx_skbs()
3358 dma_unmap_single(&pdev->dev, in bnxt_free_tx_skbs()
3363 last = tx_buf->nr_frags; in bnxt_free_tx_skbs()
3366 int ring_idx = j & bp->tx_ring_mask; in bnxt_free_tx_skbs()
3367 skb_frag_t *frag = &skb_shinfo(skb)->frags[k]; in bnxt_free_tx_skbs()
3369 tx_buf = &txr->tx_buf_ring[ring_idx]; in bnxt_free_tx_skbs()
3371 &pdev->dev, in bnxt_free_tx_skbs()
3377 netdev_tx_reset_queue(netdev_get_tx_queue(bp->dev, i)); in bnxt_free_tx_skbs()
3385 max_idx = bp->rx_nr_pages * RX_DESC_CNT; in bnxt_free_one_rx_ring()
3388 struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i]; in bnxt_free_one_rx_ring()
3389 void *data = rx_buf->data; in bnxt_free_one_rx_ring()
3394 rx_buf->data = NULL; in bnxt_free_one_rx_ring()
3396 page_pool_recycle_direct(rxr->page_pool, data); in bnxt_free_one_rx_ring()
3398 page_pool_free_va(rxr->head_pool, data, true); in bnxt_free_one_rx_ring()
3406 max_idx = bp->rx_agg_nr_pages * RX_DESC_CNT; in bnxt_free_one_rx_agg_ring()
3409 struct bnxt_sw_rx_agg_bd *rx_agg_buf = &rxr->rx_agg_ring[i]; in bnxt_free_one_rx_agg_ring()
3410 struct page *page = rx_agg_buf->page; in bnxt_free_one_rx_agg_ring()
3415 rx_agg_buf->page = NULL; in bnxt_free_one_rx_agg_ring()
3416 __clear_bit(i, rxr->rx_agg_bmap); in bnxt_free_one_rx_agg_ring()
3418 page_pool_recycle_direct(rxr->page_pool, page); in bnxt_free_one_rx_agg_ring()
3427 for (i = 0; i < bp->max_tpa; i++) { in bnxt_free_one_tpa_info_data()
3428 struct bnxt_tpa_info *tpa_info = &rxr->rx_tpa[i]; in bnxt_free_one_tpa_info_data()
3429 u8 *data = tpa_info->data; in bnxt_free_one_tpa_info_data()
3434 tpa_info->data = NULL; in bnxt_free_one_tpa_info_data()
3435 page_pool_free_va(rxr->head_pool, data, false); in bnxt_free_one_tpa_info_data()
3444 if (!rxr->rx_tpa) in bnxt_free_one_rx_ring_skbs()
3450 if (!rxr->rx_buf_ring) in bnxt_free_one_rx_ring_skbs()
3456 if (!rxr->rx_agg_ring) in bnxt_free_one_rx_ring_skbs()
3462 map = rxr->rx_tpa_idx_map; in bnxt_free_one_rx_ring_skbs()
3464 memset(map->agg_idx_bmap, 0, sizeof(map->agg_idx_bmap)); in bnxt_free_one_rx_ring_skbs()
3471 if (!bp->rx_ring) in bnxt_free_rx_skbs()
3474 for (i = 0; i < bp->rx_nr_rings; i++) in bnxt_free_rx_skbs()
3475 bnxt_free_one_rx_ring_skbs(bp, &bp->rx_ring[i]); in bnxt_free_rx_skbs()
3486 u8 init_val = ctxm->init_value; in bnxt_init_ctx_mem()
3487 u16 offset = ctxm->init_offset; in bnxt_init_ctx_mem()
3497 for (i = 0; i < len; i += ctxm->entry_size) in bnxt_init_ctx_mem()
3508 head_page = head / rmem->page_size; in __bnxt_copy_ring()
3509 source_offset = head % rmem->page_size; in __bnxt_copy_ring()
3510 total_len = (tail - head) & MAX_CTX_BYTES_MASK; in __bnxt_copy_ring()
3514 max_bytes = (rmem->nr_pages - start_idx) * rmem->page_size - in __bnxt_copy_ring()
3520 len = min((size_t)(rmem->page_size - source_offset), rem_len); in __bnxt_copy_ring()
3522 memcpy(buf + offset, rmem->pg_arr[i] + source_offset, in __bnxt_copy_ring()
3525 rem_len -= len; in __bnxt_copy_ring()
3532 struct pci_dev *pdev = bp->pdev; in bnxt_free_ring()
3535 if (!rmem->pg_arr) in bnxt_free_ring()
3538 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_free_ring()
3539 if (!rmem->pg_arr[i]) in bnxt_free_ring()
3542 dma_free_coherent(&pdev->dev, rmem->page_size, in bnxt_free_ring()
3543 rmem->pg_arr[i], rmem->dma_arr[i]); in bnxt_free_ring()
3545 rmem->pg_arr[i] = NULL; in bnxt_free_ring()
3548 if (rmem->pg_tbl) { in bnxt_free_ring()
3549 size_t pg_tbl_size = rmem->nr_pages * 8; in bnxt_free_ring()
3551 if (rmem->flags & BNXT_RMEM_USE_FULL_PAGE_FLAG) in bnxt_free_ring()
3552 pg_tbl_size = rmem->page_size; in bnxt_free_ring()
3553 dma_free_coherent(&pdev->dev, pg_tbl_size, in bnxt_free_ring()
3554 rmem->pg_tbl, rmem->pg_tbl_map); in bnxt_free_ring()
3555 rmem->pg_tbl = NULL; in bnxt_free_ring()
3557 if (rmem->vmem_size && *rmem->vmem) { in bnxt_free_ring()
3558 vfree(*rmem->vmem); in bnxt_free_ring()
3559 *rmem->vmem = NULL; in bnxt_free_ring()
3565 struct pci_dev *pdev = bp->pdev; in bnxt_alloc_ring()
3569 if (rmem->flags & (BNXT_RMEM_VALID_PTE_FLAG | BNXT_RMEM_RING_PTE_FLAG)) in bnxt_alloc_ring()
3571 if ((rmem->nr_pages > 1 || rmem->depth > 0) && !rmem->pg_tbl) { in bnxt_alloc_ring()
3572 size_t pg_tbl_size = rmem->nr_pages * 8; in bnxt_alloc_ring()
3574 if (rmem->flags & BNXT_RMEM_USE_FULL_PAGE_FLAG) in bnxt_alloc_ring()
3575 pg_tbl_size = rmem->page_size; in bnxt_alloc_ring()
3576 rmem->pg_tbl = dma_alloc_coherent(&pdev->dev, pg_tbl_size, in bnxt_alloc_ring()
3577 &rmem->pg_tbl_map, in bnxt_alloc_ring()
3579 if (!rmem->pg_tbl) in bnxt_alloc_ring()
3580 return -ENOMEM; in bnxt_alloc_ring()
3583 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_alloc_ring()
3586 rmem->pg_arr[i] = dma_alloc_coherent(&pdev->dev, in bnxt_alloc_ring()
3587 rmem->page_size, in bnxt_alloc_ring()
3588 &rmem->dma_arr[i], in bnxt_alloc_ring()
3590 if (!rmem->pg_arr[i]) in bnxt_alloc_ring()
3591 return -ENOMEM; in bnxt_alloc_ring()
3593 if (rmem->ctx_mem) in bnxt_alloc_ring()
3594 bnxt_init_ctx_mem(rmem->ctx_mem, rmem->pg_arr[i], in bnxt_alloc_ring()
3595 rmem->page_size); in bnxt_alloc_ring()
3596 if (rmem->nr_pages > 1 || rmem->depth > 0) { in bnxt_alloc_ring()
3597 if (i == rmem->nr_pages - 2 && in bnxt_alloc_ring()
3598 (rmem->flags & BNXT_RMEM_RING_PTE_FLAG)) in bnxt_alloc_ring()
3600 else if (i == rmem->nr_pages - 1 && in bnxt_alloc_ring()
3601 (rmem->flags & BNXT_RMEM_RING_PTE_FLAG)) in bnxt_alloc_ring()
3603 rmem->pg_tbl[i] = in bnxt_alloc_ring()
3604 cpu_to_le64(rmem->dma_arr[i] | extra_bits); in bnxt_alloc_ring()
3608 if (rmem->vmem_size) { in bnxt_alloc_ring()
3609 *rmem->vmem = vzalloc(rmem->vmem_size); in bnxt_alloc_ring()
3610 if (!(*rmem->vmem)) in bnxt_alloc_ring()
3611 return -ENOMEM; in bnxt_alloc_ring()
3621 kfree(rxr->rx_tpa_idx_map); in bnxt_free_one_tpa_info()
3622 rxr->rx_tpa_idx_map = NULL; in bnxt_free_one_tpa_info()
3623 if (rxr->rx_tpa) { in bnxt_free_one_tpa_info()
3624 for (i = 0; i < bp->max_tpa; i++) { in bnxt_free_one_tpa_info()
3625 kfree(rxr->rx_tpa[i].agg_arr); in bnxt_free_one_tpa_info()
3626 rxr->rx_tpa[i].agg_arr = NULL; in bnxt_free_one_tpa_info()
3629 kfree(rxr->rx_tpa); in bnxt_free_one_tpa_info()
3630 rxr->rx_tpa = NULL; in bnxt_free_one_tpa_info()
3637 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_free_tpa_info()
3638 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_free_tpa_info()
3650 rxr->rx_tpa = kcalloc(bp->max_tpa, sizeof(struct bnxt_tpa_info), in bnxt_alloc_one_tpa_info()
3652 if (!rxr->rx_tpa) in bnxt_alloc_one_tpa_info()
3653 return -ENOMEM; in bnxt_alloc_one_tpa_info()
3655 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_one_tpa_info()
3657 for (i = 0; i < bp->max_tpa; i++) { in bnxt_alloc_one_tpa_info()
3660 return -ENOMEM; in bnxt_alloc_one_tpa_info()
3661 rxr->rx_tpa[i].agg_arr = agg; in bnxt_alloc_one_tpa_info()
3663 rxr->rx_tpa_idx_map = kzalloc(sizeof(*rxr->rx_tpa_idx_map), in bnxt_alloc_one_tpa_info()
3665 if (!rxr->rx_tpa_idx_map) in bnxt_alloc_one_tpa_info()
3666 return -ENOMEM; in bnxt_alloc_one_tpa_info()
3675 bp->max_tpa = MAX_TPA; in bnxt_alloc_tpa_info()
3676 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_alloc_tpa_info()
3677 if (!bp->max_tpa_v2) in bnxt_alloc_tpa_info()
3679 bp->max_tpa = max_t(u16, bp->max_tpa_v2, MAX_TPA_P5); in bnxt_alloc_tpa_info()
3682 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_tpa_info()
3683 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_alloc_tpa_info()
3696 if (!bp->rx_ring) in bnxt_free_rx_rings()
3700 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_free_rx_rings()
3701 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_free_rx_rings()
3704 if (rxr->xdp_prog) in bnxt_free_rx_rings()
3705 bpf_prog_put(rxr->xdp_prog); in bnxt_free_rx_rings()
3707 if (xdp_rxq_info_is_reg(&rxr->xdp_rxq)) in bnxt_free_rx_rings()
3708 xdp_rxq_info_unreg(&rxr->xdp_rxq); in bnxt_free_rx_rings()
3710 page_pool_destroy(rxr->page_pool); in bnxt_free_rx_rings()
3712 page_pool_destroy(rxr->head_pool); in bnxt_free_rx_rings()
3713 rxr->page_pool = rxr->head_pool = NULL; in bnxt_free_rx_rings()
3715 kfree(rxr->rx_agg_bmap); in bnxt_free_rx_rings()
3716 rxr->rx_agg_bmap = NULL; in bnxt_free_rx_rings()
3718 ring = &rxr->rx_ring_struct; in bnxt_free_rx_rings()
3719 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_rx_rings()
3721 ring = &rxr->rx_agg_ring_struct; in bnxt_free_rx_rings()
3722 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_rx_rings()
3733 pp.pool_size = bp->rx_agg_ring_size; in bnxt_alloc_rx_page_pool()
3735 pp.pool_size += bp->rx_ring_size; in bnxt_alloc_rx_page_pool()
3737 pp.napi = &rxr->bnapi->napi; in bnxt_alloc_rx_page_pool()
3738 pp.netdev = bp->dev; in bnxt_alloc_rx_page_pool()
3739 pp.dev = &bp->pdev->dev; in bnxt_alloc_rx_page_pool()
3740 pp.dma_dir = bp->rx_dir; in bnxt_alloc_rx_page_pool()
3747 rxr->page_pool = pool; in bnxt_alloc_rx_page_pool()
3750 pp.pool_size = max(bp->rx_ring_size, 1024); in bnxt_alloc_rx_page_pool()
3755 rxr->head_pool = pool; in bnxt_alloc_rx_page_pool()
3760 page_pool_destroy(rxr->page_pool); in bnxt_alloc_rx_page_pool()
3761 rxr->page_pool = NULL; in bnxt_alloc_rx_page_pool()
3769 rxr->rx_agg_bmap_size = bp->rx_agg_ring_mask + 1; in bnxt_alloc_rx_agg_bmap()
3770 mem_size = rxr->rx_agg_bmap_size / 8; in bnxt_alloc_rx_agg_bmap()
3771 rxr->rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL); in bnxt_alloc_rx_agg_bmap()
3772 if (!rxr->rx_agg_bmap) in bnxt_alloc_rx_agg_bmap()
3773 return -ENOMEM; in bnxt_alloc_rx_agg_bmap()
3780 int numa_node = dev_to_node(&bp->pdev->dev); in bnxt_alloc_rx_rings()
3783 if (!bp->rx_ring) in bnxt_alloc_rx_rings()
3784 return -ENOMEM; in bnxt_alloc_rx_rings()
3786 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_alloc_rx_rings()
3789 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_rx_rings()
3790 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_alloc_rx_rings()
3794 ring = &rxr->rx_ring_struct; in bnxt_alloc_rx_rings()
3798 netdev_dbg(bp->dev, "Allocating page pool for rx_ring[%d] on numa_node: %d\n", in bnxt_alloc_rx_rings()
3804 rc = xdp_rxq_info_reg(&rxr->xdp_rxq, bp->dev, i, 0); in bnxt_alloc_rx_rings()
3808 rc = xdp_rxq_info_reg_mem_model(&rxr->xdp_rxq, in bnxt_alloc_rx_rings()
3810 rxr->page_pool); in bnxt_alloc_rx_rings()
3812 xdp_rxq_info_unreg(&rxr->xdp_rxq); in bnxt_alloc_rx_rings()
3816 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_rx_rings()
3820 ring->grp_idx = i; in bnxt_alloc_rx_rings()
3822 ring = &rxr->rx_agg_ring_struct; in bnxt_alloc_rx_rings()
3823 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_rx_rings()
3827 ring->grp_idx = i; in bnxt_alloc_rx_rings()
3833 if (bp->flags & BNXT_FLAG_TPA) in bnxt_alloc_rx_rings()
3841 struct pci_dev *pdev = bp->pdev; in bnxt_free_tx_rings()
3843 if (!bp->tx_ring) in bnxt_free_tx_rings()
3846 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_free_tx_rings()
3847 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_free_tx_rings()
3850 if (txr->tx_push) { in bnxt_free_tx_rings()
3851 dma_free_coherent(&pdev->dev, bp->tx_push_size, in bnxt_free_tx_rings()
3852 txr->tx_push, txr->tx_push_mapping); in bnxt_free_tx_rings()
3853 txr->tx_push = NULL; in bnxt_free_tx_rings()
3856 ring = &txr->tx_ring_struct; in bnxt_free_tx_rings()
3858 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_tx_rings()
3863 ((tc) * (bp)->tx_nr_rings_per_tc)
3866 ((tx) % (bp)->tx_nr_rings_per_tc)
3869 ((tx) / (bp)->tx_nr_rings_per_tc)
3874 struct pci_dev *pdev = bp->pdev; in bnxt_alloc_tx_rings()
3876 bp->tx_push_size = 0; in bnxt_alloc_tx_rings()
3877 if (bp->tx_push_thresh) { in bnxt_alloc_tx_rings()
3881 bp->tx_push_thresh); in bnxt_alloc_tx_rings()
3885 bp->tx_push_thresh = 0; in bnxt_alloc_tx_rings()
3888 bp->tx_push_size = push_size; in bnxt_alloc_tx_rings()
3891 for (i = 0, j = 0; i < bp->tx_nr_rings; i++) { in bnxt_alloc_tx_rings()
3892 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_alloc_tx_rings()
3896 ring = &txr->tx_ring_struct; in bnxt_alloc_tx_rings()
3898 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_tx_rings()
3902 ring->grp_idx = txr->bnapi->index; in bnxt_alloc_tx_rings()
3903 if (bp->tx_push_size) { in bnxt_alloc_tx_rings()
3906 /* One pre-allocated DMA buffer to backup in bnxt_alloc_tx_rings()
3909 txr->tx_push = dma_alloc_coherent(&pdev->dev, in bnxt_alloc_tx_rings()
3910 bp->tx_push_size, in bnxt_alloc_tx_rings()
3911 &txr->tx_push_mapping, in bnxt_alloc_tx_rings()
3914 if (!txr->tx_push) in bnxt_alloc_tx_rings()
3915 return -ENOMEM; in bnxt_alloc_tx_rings()
3917 mapping = txr->tx_push_mapping + in bnxt_alloc_tx_rings()
3919 txr->data_mapping = cpu_to_le64(mapping); in bnxt_alloc_tx_rings()
3921 qidx = bp->tc_to_qidx[j]; in bnxt_alloc_tx_rings()
3922 ring->queue_id = bp->q_info[qidx].queue_id; in bnxt_alloc_tx_rings()
3923 spin_lock_init(&txr->xdp_tx_lock); in bnxt_alloc_tx_rings()
3924 if (i < bp->tx_nr_rings_xdp) in bnxt_alloc_tx_rings()
3926 if (BNXT_RING_TO_TC_OFF(bp, i) == (bp->tx_nr_rings_per_tc - 1)) in bnxt_alloc_tx_rings()
3934 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_free_cp_arrays()
3936 kfree(cpr->cp_desc_ring); in bnxt_free_cp_arrays()
3937 cpr->cp_desc_ring = NULL; in bnxt_free_cp_arrays()
3938 ring->ring_mem.pg_arr = NULL; in bnxt_free_cp_arrays()
3939 kfree(cpr->cp_desc_mapping); in bnxt_free_cp_arrays()
3940 cpr->cp_desc_mapping = NULL; in bnxt_free_cp_arrays()
3941 ring->ring_mem.dma_arr = NULL; in bnxt_free_cp_arrays()
3946 cpr->cp_desc_ring = kcalloc(n, sizeof(*cpr->cp_desc_ring), GFP_KERNEL); in bnxt_alloc_cp_arrays()
3947 if (!cpr->cp_desc_ring) in bnxt_alloc_cp_arrays()
3948 return -ENOMEM; in bnxt_alloc_cp_arrays()
3949 cpr->cp_desc_mapping = kcalloc(n, sizeof(*cpr->cp_desc_mapping), in bnxt_alloc_cp_arrays()
3951 if (!cpr->cp_desc_mapping) in bnxt_alloc_cp_arrays()
3952 return -ENOMEM; in bnxt_alloc_cp_arrays()
3960 if (!bp->bnapi) in bnxt_free_all_cp_arrays()
3962 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_all_cp_arrays()
3963 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_free_all_cp_arrays()
3967 bnxt_free_cp_arrays(&bnapi->cp_ring); in bnxt_free_all_cp_arrays()
3973 int i, n = bp->cp_nr_pages; in bnxt_alloc_all_cp_arrays()
3975 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_alloc_all_cp_arrays()
3976 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_alloc_all_cp_arrays()
3981 rc = bnxt_alloc_cp_arrays(&bnapi->cp_ring, n); in bnxt_alloc_all_cp_arrays()
3992 if (!bp->bnapi) in bnxt_free_cp_rings()
3995 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_cp_rings()
3996 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_free_cp_rings()
4004 cpr = &bnapi->cp_ring; in bnxt_free_cp_rings()
4005 ring = &cpr->cp_ring_struct; in bnxt_free_cp_rings()
4007 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_cp_rings()
4009 if (!cpr->cp_ring_arr) in bnxt_free_cp_rings()
4012 for (j = 0; j < cpr->cp_ring_count; j++) { in bnxt_free_cp_rings()
4013 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_free_cp_rings()
4015 ring = &cpr2->cp_ring_struct; in bnxt_free_cp_rings()
4016 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_cp_rings()
4019 kfree(cpr->cp_ring_arr); in bnxt_free_cp_rings()
4020 cpr->cp_ring_arr = NULL; in bnxt_free_cp_rings()
4021 cpr->cp_ring_count = 0; in bnxt_free_cp_rings()
4032 rc = bnxt_alloc_cp_arrays(cpr, bp->cp_nr_pages); in bnxt_alloc_cp_sub_ring()
4035 return -ENOMEM; in bnxt_alloc_cp_sub_ring()
4037 ring = &cpr->cp_ring_struct; in bnxt_alloc_cp_sub_ring()
4038 rmem = &ring->ring_mem; in bnxt_alloc_cp_sub_ring()
4039 rmem->nr_pages = bp->cp_nr_pages; in bnxt_alloc_cp_sub_ring()
4040 rmem->page_size = HW_CMPD_RING_SIZE; in bnxt_alloc_cp_sub_ring()
4041 rmem->pg_arr = (void **)cpr->cp_desc_ring; in bnxt_alloc_cp_sub_ring()
4042 rmem->dma_arr = cpr->cp_desc_mapping; in bnxt_alloc_cp_sub_ring()
4043 rmem->flags = BNXT_RMEM_RING_PTE_FLAG; in bnxt_alloc_cp_sub_ring()
4054 bool sh = !!(bp->flags & BNXT_FLAG_SHARED_RINGS); in bnxt_alloc_cp_rings()
4056 int tcs = bp->num_tc; in bnxt_alloc_cp_rings()
4061 for (i = 0, j = 0; i < bp->cp_nr_rings; i++) { in bnxt_alloc_cp_rings()
4062 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_alloc_cp_rings()
4071 cpr = &bnapi->cp_ring; in bnxt_alloc_cp_rings()
4072 cpr->bnapi = bnapi; in bnxt_alloc_cp_rings()
4073 ring = &cpr->cp_ring_struct; in bnxt_alloc_cp_rings()
4075 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_cp_rings()
4079 ring->map_idx = ulp_msix + i; in bnxt_alloc_cp_rings()
4081 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_cp_rings()
4084 if (i < bp->rx_nr_rings) { in bnxt_alloc_cp_rings()
4088 if (i < bp->tx_nr_rings_xdp) { in bnxt_alloc_cp_rings()
4091 } else if ((sh && i < bp->tx_nr_rings) || in bnxt_alloc_cp_rings()
4092 (!sh && i >= bp->rx_nr_rings)) { in bnxt_alloc_cp_rings()
4097 cpr->cp_ring_arr = kcalloc(cp_count, sizeof(*cpr), in bnxt_alloc_cp_rings()
4099 if (!cpr->cp_ring_arr) in bnxt_alloc_cp_rings()
4100 return -ENOMEM; in bnxt_alloc_cp_rings()
4101 cpr->cp_ring_count = cp_count; in bnxt_alloc_cp_rings()
4104 cpr2 = &cpr->cp_ring_arr[k]; in bnxt_alloc_cp_rings()
4108 cpr2->bnapi = bnapi; in bnxt_alloc_cp_rings()
4109 cpr2->sw_stats = cpr->sw_stats; in bnxt_alloc_cp_rings()
4110 cpr2->cp_idx = k; in bnxt_alloc_cp_rings()
4112 bp->rx_ring[i].rx_cpr = cpr2; in bnxt_alloc_cp_rings()
4113 cpr2->cp_ring_type = BNXT_NQ_HDL_TYPE_RX; in bnxt_alloc_cp_rings()
4115 int n, tc = k - rx; in bnxt_alloc_cp_rings()
4118 bp->tx_ring[n].tx_cpr = cpr2; in bnxt_alloc_cp_rings()
4119 cpr2->cp_ring_type = BNXT_NQ_HDL_TYPE_TX; in bnxt_alloc_cp_rings()
4134 ring = &rxr->rx_ring_struct; in bnxt_init_rx_ring_struct()
4135 rmem = &ring->ring_mem; in bnxt_init_rx_ring_struct()
4136 rmem->nr_pages = bp->rx_nr_pages; in bnxt_init_rx_ring_struct()
4137 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_rx_ring_struct()
4138 rmem->pg_arr = (void **)rxr->rx_desc_ring; in bnxt_init_rx_ring_struct()
4139 rmem->dma_arr = rxr->rx_desc_mapping; in bnxt_init_rx_ring_struct()
4140 rmem->vmem_size = SW_RXBD_RING_SIZE * bp->rx_nr_pages; in bnxt_init_rx_ring_struct()
4141 rmem->vmem = (void **)&rxr->rx_buf_ring; in bnxt_init_rx_ring_struct()
4143 ring = &rxr->rx_agg_ring_struct; in bnxt_init_rx_ring_struct()
4144 rmem = &ring->ring_mem; in bnxt_init_rx_ring_struct()
4145 rmem->nr_pages = bp->rx_agg_nr_pages; in bnxt_init_rx_ring_struct()
4146 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_rx_ring_struct()
4147 rmem->pg_arr = (void **)rxr->rx_agg_desc_ring; in bnxt_init_rx_ring_struct()
4148 rmem->dma_arr = rxr->rx_agg_desc_mapping; in bnxt_init_rx_ring_struct()
4149 rmem->vmem_size = SW_RXBD_AGG_RING_SIZE * bp->rx_agg_nr_pages; in bnxt_init_rx_ring_struct()
4150 rmem->vmem = (void **)&rxr->rx_agg_ring; in bnxt_init_rx_ring_struct()
4160 rxr->page_pool->p.napi = NULL; in bnxt_reset_rx_ring_struct()
4161 rxr->page_pool = NULL; in bnxt_reset_rx_ring_struct()
4162 memset(&rxr->xdp_rxq, 0, sizeof(struct xdp_rxq_info)); in bnxt_reset_rx_ring_struct()
4164 ring = &rxr->rx_ring_struct; in bnxt_reset_rx_ring_struct()
4165 rmem = &ring->ring_mem; in bnxt_reset_rx_ring_struct()
4166 rmem->pg_tbl = NULL; in bnxt_reset_rx_ring_struct()
4167 rmem->pg_tbl_map = 0; in bnxt_reset_rx_ring_struct()
4168 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_reset_rx_ring_struct()
4169 rmem->pg_arr[i] = NULL; in bnxt_reset_rx_ring_struct()
4170 rmem->dma_arr[i] = 0; in bnxt_reset_rx_ring_struct()
4172 *rmem->vmem = NULL; in bnxt_reset_rx_ring_struct()
4174 ring = &rxr->rx_agg_ring_struct; in bnxt_reset_rx_ring_struct()
4175 rmem = &ring->ring_mem; in bnxt_reset_rx_ring_struct()
4176 rmem->pg_tbl = NULL; in bnxt_reset_rx_ring_struct()
4177 rmem->pg_tbl_map = 0; in bnxt_reset_rx_ring_struct()
4178 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_reset_rx_ring_struct()
4179 rmem->pg_arr[i] = NULL; in bnxt_reset_rx_ring_struct()
4180 rmem->dma_arr[i] = 0; in bnxt_reset_rx_ring_struct()
4182 *rmem->vmem = NULL; in bnxt_reset_rx_ring_struct()
4189 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_init_ring_struct()
4190 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_init_ring_struct()
4200 cpr = &bnapi->cp_ring; in bnxt_init_ring_struct()
4201 ring = &cpr->cp_ring_struct; in bnxt_init_ring_struct()
4202 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4203 rmem->nr_pages = bp->cp_nr_pages; in bnxt_init_ring_struct()
4204 rmem->page_size = HW_CMPD_RING_SIZE; in bnxt_init_ring_struct()
4205 rmem->pg_arr = (void **)cpr->cp_desc_ring; in bnxt_init_ring_struct()
4206 rmem->dma_arr = cpr->cp_desc_mapping; in bnxt_init_ring_struct()
4207 rmem->vmem_size = 0; in bnxt_init_ring_struct()
4209 rxr = bnapi->rx_ring; in bnxt_init_ring_struct()
4213 ring = &rxr->rx_ring_struct; in bnxt_init_ring_struct()
4214 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4215 rmem->nr_pages = bp->rx_nr_pages; in bnxt_init_ring_struct()
4216 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_ring_struct()
4217 rmem->pg_arr = (void **)rxr->rx_desc_ring; in bnxt_init_ring_struct()
4218 rmem->dma_arr = rxr->rx_desc_mapping; in bnxt_init_ring_struct()
4219 rmem->vmem_size = SW_RXBD_RING_SIZE * bp->rx_nr_pages; in bnxt_init_ring_struct()
4220 rmem->vmem = (void **)&rxr->rx_buf_ring; in bnxt_init_ring_struct()
4222 ring = &rxr->rx_agg_ring_struct; in bnxt_init_ring_struct()
4223 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4224 rmem->nr_pages = bp->rx_agg_nr_pages; in bnxt_init_ring_struct()
4225 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_ring_struct()
4226 rmem->pg_arr = (void **)rxr->rx_agg_desc_ring; in bnxt_init_ring_struct()
4227 rmem->dma_arr = rxr->rx_agg_desc_mapping; in bnxt_init_ring_struct()
4228 rmem->vmem_size = SW_RXBD_AGG_RING_SIZE * bp->rx_agg_nr_pages; in bnxt_init_ring_struct()
4229 rmem->vmem = (void **)&rxr->rx_agg_ring; in bnxt_init_ring_struct()
4233 ring = &txr->tx_ring_struct; in bnxt_init_ring_struct()
4234 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4235 rmem->nr_pages = bp->tx_nr_pages; in bnxt_init_ring_struct()
4236 rmem->page_size = HW_TXBD_RING_SIZE; in bnxt_init_ring_struct()
4237 rmem->pg_arr = (void **)txr->tx_desc_ring; in bnxt_init_ring_struct()
4238 rmem->dma_arr = txr->tx_desc_mapping; in bnxt_init_ring_struct()
4239 rmem->vmem_size = SW_TXBD_RING_SIZE * bp->tx_nr_pages; in bnxt_init_ring_struct()
4240 rmem->vmem = (void **)&txr->tx_buf_ring; in bnxt_init_ring_struct()
4251 rx_buf_ring = (struct rx_bd **)ring->ring_mem.pg_arr; in bnxt_init_rxbd_pages()
4252 for (i = 0, prod = 0; i < ring->ring_mem.nr_pages; i++) { in bnxt_init_rxbd_pages()
4261 rxbd->rx_bd_len_flags_type = cpu_to_le32(type); in bnxt_init_rxbd_pages()
4262 rxbd->rx_bd_opaque = prod; in bnxt_init_rxbd_pages()
4274 prod = rxr->rx_prod; in bnxt_alloc_one_rx_ring_skb()
4275 for (i = 0; i < bp->rx_ring_size; i++) { in bnxt_alloc_one_rx_ring_skb()
4277 netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d skbs only\n", in bnxt_alloc_one_rx_ring_skb()
4278 ring_nr, i, bp->rx_ring_size); in bnxt_alloc_one_rx_ring_skb()
4283 rxr->rx_prod = prod; in bnxt_alloc_one_rx_ring_skb()
4293 prod = rxr->rx_agg_prod; in bnxt_alloc_one_rx_ring_page()
4294 for (i = 0; i < bp->rx_agg_ring_size; i++) { in bnxt_alloc_one_rx_ring_page()
4296 netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d pages only\n", in bnxt_alloc_one_rx_ring_page()
4297 ring_nr, i, bp->rx_ring_size); in bnxt_alloc_one_rx_ring_page()
4302 rxr->rx_agg_prod = prod; in bnxt_alloc_one_rx_ring_page()
4312 for (i = 0; i < bp->max_tpa; i++) { in bnxt_alloc_one_tpa_info_data()
4316 return -ENOMEM; in bnxt_alloc_one_tpa_info_data()
4318 rxr->rx_tpa[i].data = data; in bnxt_alloc_one_tpa_info_data()
4319 rxr->rx_tpa[i].data_ptr = data + bp->rx_offset; in bnxt_alloc_one_tpa_info_data()
4320 rxr->rx_tpa[i].mapping = mapping; in bnxt_alloc_one_tpa_info_data()
4328 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr]; in bnxt_alloc_one_rx_ring()
4333 if (!(bp->flags & BNXT_FLAG_AGG_RINGS)) in bnxt_alloc_one_rx_ring()
4338 if (rxr->rx_tpa) { in bnxt_alloc_one_rx_ring()
4352 type = (bp->rx_buf_use_size << RX_BD_LEN_SHIFT) | in bnxt_init_one_rx_ring_rxbd()
4358 ring = &rxr->rx_ring_struct; in bnxt_init_one_rx_ring_rxbd()
4360 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_one_rx_ring_rxbd()
4369 ring = &rxr->rx_agg_ring_struct; in bnxt_init_one_rx_agg_ring_rxbd()
4370 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_one_rx_agg_ring_rxbd()
4371 if ((bp->flags & BNXT_FLAG_AGG_RINGS)) { in bnxt_init_one_rx_agg_ring_rxbd()
4383 rxr = &bp->rx_ring[ring_nr]; in bnxt_init_one_rx_ring()
4386 netif_queue_set_napi(bp->dev, ring_nr, NETDEV_QUEUE_TYPE_RX, in bnxt_init_one_rx_ring()
4387 &rxr->bnapi->napi); in bnxt_init_one_rx_ring()
4389 if (BNXT_RX_PAGE_MODE(bp) && bp->xdp_prog) { in bnxt_init_one_rx_ring()
4390 bpf_prog_add(bp->xdp_prog, 1); in bnxt_init_one_rx_ring()
4391 rxr->xdp_prog = bp->xdp_prog; in bnxt_init_one_rx_ring()
4403 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_init_cp_rings()
4404 struct bnxt_cp_ring_info *cpr = &bp->bnapi[i]->cp_ring; in bnxt_init_cp_rings()
4405 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_init_cp_rings()
4407 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_cp_rings()
4408 cpr->rx_ring_coal.coal_ticks = bp->rx_coal.coal_ticks; in bnxt_init_cp_rings()
4409 cpr->rx_ring_coal.coal_bufs = bp->rx_coal.coal_bufs; in bnxt_init_cp_rings()
4410 if (!cpr->cp_ring_arr) in bnxt_init_cp_rings()
4412 for (j = 0; j < cpr->cp_ring_count; j++) { in bnxt_init_cp_rings()
4413 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_init_cp_rings()
4415 ring = &cpr2->cp_ring_struct; in bnxt_init_cp_rings()
4416 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_cp_rings()
4417 cpr2->rx_ring_coal.coal_ticks = bp->rx_coal.coal_ticks; in bnxt_init_cp_rings()
4418 cpr2->rx_ring_coal.coal_bufs = bp->rx_coal.coal_bufs; in bnxt_init_cp_rings()
4428 bp->rx_offset = NET_IP_ALIGN + XDP_PACKET_HEADROOM; in bnxt_init_rx_rings()
4429 bp->rx_dma_offset = XDP_PACKET_HEADROOM; in bnxt_init_rx_rings()
4431 bp->rx_offset = BNXT_RX_OFFSET; in bnxt_init_rx_rings()
4432 bp->rx_dma_offset = BNXT_RX_DMA_OFFSET; in bnxt_init_rx_rings()
4435 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_init_rx_rings()
4448 bp->tx_wake_thresh = max_t(int, bp->tx_ring_size / 2, in bnxt_init_tx_rings()
4451 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_init_tx_rings()
4452 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_init_tx_rings()
4453 struct bnxt_ring_struct *ring = &txr->tx_ring_struct; in bnxt_init_tx_rings()
4455 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_tx_rings()
4457 if (i >= bp->tx_nr_rings_xdp) in bnxt_init_tx_rings()
4458 netif_queue_set_napi(bp->dev, i - bp->tx_nr_rings_xdp, in bnxt_init_tx_rings()
4460 &txr->bnapi->napi); in bnxt_init_tx_rings()
4468 kfree(bp->grp_info); in bnxt_free_ring_grps()
4469 bp->grp_info = NULL; in bnxt_free_ring_grps()
4477 bp->grp_info = kcalloc(bp->cp_nr_rings, in bnxt_init_ring_grps()
4480 if (!bp->grp_info) in bnxt_init_ring_grps()
4481 return -ENOMEM; in bnxt_init_ring_grps()
4483 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_init_ring_grps()
4485 bp->grp_info[i].fw_stats_ctx = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4486 bp->grp_info[i].fw_grp_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4487 bp->grp_info[i].rx_fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4488 bp->grp_info[i].agg_fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4489 bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4496 kfree(bp->vnic_info); in bnxt_free_vnics()
4497 bp->vnic_info = NULL; in bnxt_free_vnics()
4498 bp->nr_vnics = 0; in bnxt_free_vnics()
4506 if (bp->flags & BNXT_FLAG_RFS) { in bnxt_alloc_vnics()
4509 else if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_vnics()
4510 num_vnics += bp->rx_nr_rings; in bnxt_alloc_vnics()
4517 bp->vnic_info = kcalloc(num_vnics, sizeof(struct bnxt_vnic_info), in bnxt_alloc_vnics()
4519 if (!bp->vnic_info) in bnxt_alloc_vnics()
4520 return -ENOMEM; in bnxt_alloc_vnics()
4522 bp->nr_vnics = num_vnics; in bnxt_alloc_vnics()
4528 struct bnxt_vnic_info *vnic0 = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_init_vnics()
4531 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_init_vnics()
4532 struct bnxt_vnic_info *vnic = &bp->vnic_info[i]; in bnxt_init_vnics()
4535 vnic->fw_vnic_id = INVALID_HW_RING_ID; in bnxt_init_vnics()
4536 vnic->vnic_id = i; in bnxt_init_vnics()
4538 vnic->fw_rss_cos_lb_ctx[j] = INVALID_HW_RING_ID; in bnxt_init_vnics()
4540 vnic->fw_l2_ctx_id = INVALID_HW_RING_ID; in bnxt_init_vnics()
4542 if (bp->vnic_info[i].rss_hash_key) { in bnxt_init_vnics()
4544 u8 *key = (void *)vnic->rss_hash_key; in bnxt_init_vnics()
4547 if (!bp->rss_hash_key_valid && in bnxt_init_vnics()
4548 !bp->rss_hash_key_updated) { in bnxt_init_vnics()
4549 get_random_bytes(bp->rss_hash_key, in bnxt_init_vnics()
4551 bp->rss_hash_key_updated = true; in bnxt_init_vnics()
4554 memcpy(vnic->rss_hash_key, bp->rss_hash_key, in bnxt_init_vnics()
4557 if (!bp->rss_hash_key_updated) in bnxt_init_vnics()
4560 bp->rss_hash_key_updated = false; in bnxt_init_vnics()
4561 bp->rss_hash_key_valid = true; in bnxt_init_vnics()
4563 bp->toeplitz_prefix = 0; in bnxt_init_vnics()
4565 bp->toeplitz_prefix <<= 8; in bnxt_init_vnics()
4566 bp->toeplitz_prefix |= key[k]; in bnxt_init_vnics()
4569 memcpy(vnic->rss_hash_key, vnic0->rss_hash_key, in bnxt_init_vnics()
4587 while (pages & (pages - 1)) in bnxt_calc_nr_ring_pages()
4595 bp->flags &= ~BNXT_FLAG_TPA; in bnxt_set_tpa_flags()
4596 if (bp->flags & BNXT_FLAG_NO_AGG_RINGS) in bnxt_set_tpa_flags()
4598 if (bp->dev->features & NETIF_F_LRO) in bnxt_set_tpa_flags()
4599 bp->flags |= BNXT_FLAG_LRO; in bnxt_set_tpa_flags()
4600 else if (bp->dev->features & NETIF_F_GRO_HW) in bnxt_set_tpa_flags()
4601 bp->flags |= BNXT_FLAG_GRO; in bnxt_set_tpa_flags()
4604 /* bp->rx_ring_size, bp->tx_ring_size, dev->mtu, BNXT_FLAG_{G|L}RO flags must
4613 rx_size = SKB_DATA_ALIGN(bp->dev->mtu + ETH_HLEN + NET_IP_ALIGN + 8); in bnxt_set_ring_params()
4618 bp->rx_copy_thresh = BNXT_RX_COPY_THRESH; in bnxt_set_ring_params()
4619 ring_size = bp->rx_ring_size; in bnxt_set_ring_params()
4620 bp->rx_agg_ring_size = 0; in bnxt_set_ring_params()
4621 bp->rx_agg_nr_pages = 0; in bnxt_set_ring_params()
4623 if (bp->flags & BNXT_FLAG_TPA) in bnxt_set_ring_params()
4626 bp->flags &= ~BNXT_FLAG_JUMBO; in bnxt_set_ring_params()
4627 if (rx_space > PAGE_SIZE && !(bp->flags & BNXT_FLAG_NO_AGG_RINGS)) { in bnxt_set_ring_params()
4630 bp->flags |= BNXT_FLAG_JUMBO; in bnxt_set_ring_params()
4631 jumbo_factor = PAGE_ALIGN(bp->dev->mtu - 40) >> PAGE_SHIFT; in bnxt_set_ring_params()
4638 … netdev_warn(bp->dev, "RX ring size reduced from %d to %d because the jumbo ring is now enabled\n", in bnxt_set_ring_params()
4639 bp->rx_ring_size, ring_size); in bnxt_set_ring_params()
4640 bp->rx_ring_size = ring_size; in bnxt_set_ring_params()
4644 bp->rx_agg_nr_pages = bnxt_calc_nr_ring_pages(agg_ring_size, in bnxt_set_ring_params()
4646 if (bp->rx_agg_nr_pages > MAX_RX_AGG_PAGES) { in bnxt_set_ring_params()
4649 bp->rx_agg_nr_pages = MAX_RX_AGG_PAGES; in bnxt_set_ring_params()
4650 agg_ring_size = MAX_RX_AGG_PAGES * RX_DESC_CNT - 1; in bnxt_set_ring_params()
4651 netdev_warn(bp->dev, "rx agg ring size %d reduced to %d.\n", in bnxt_set_ring_params()
4654 bp->rx_agg_ring_size = agg_ring_size; in bnxt_set_ring_params()
4655 bp->rx_agg_ring_mask = (bp->rx_agg_nr_pages * RX_DESC_CNT) - 1; in bnxt_set_ring_params()
4659 rx_size = PAGE_SIZE - in bnxt_set_ring_params()
4660 ALIGN(max(NET_SKB_PAD, XDP_PACKET_HEADROOM), 8) - in bnxt_set_ring_params()
4669 bp->rx_buf_use_size = rx_size; in bnxt_set_ring_params()
4670 bp->rx_buf_size = rx_space; in bnxt_set_ring_params()
4672 bp->rx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, RX_DESC_CNT); in bnxt_set_ring_params()
4673 bp->rx_ring_mask = (bp->rx_nr_pages * RX_DESC_CNT) - 1; in bnxt_set_ring_params()
4675 ring_size = bp->tx_ring_size; in bnxt_set_ring_params()
4676 bp->tx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, TX_DESC_CNT); in bnxt_set_ring_params()
4677 bp->tx_ring_mask = (bp->tx_nr_pages * TX_DESC_CNT) - 1; in bnxt_set_ring_params()
4679 max_rx_cmpl = bp->rx_ring_size; in bnxt_set_ring_params()
4684 if (bp->flags & BNXT_FLAG_TPA) in bnxt_set_ring_params()
4685 max_rx_cmpl += bp->max_tpa; in bnxt_set_ring_params()
4686 /* RX and TPA completions are 32-byte, all others are 16-byte */ in bnxt_set_ring_params()
4687 ring_size = max_rx_cmpl * 2 + agg_ring_size + bp->tx_ring_size; in bnxt_set_ring_params()
4688 bp->cp_ring_size = ring_size; in bnxt_set_ring_params()
4690 bp->cp_nr_pages = bnxt_calc_nr_ring_pages(ring_size, CP_DESC_CNT); in bnxt_set_ring_params()
4691 if (bp->cp_nr_pages > MAX_CP_PAGES) { in bnxt_set_ring_params()
4692 bp->cp_nr_pages = MAX_CP_PAGES; in bnxt_set_ring_params()
4693 bp->cp_ring_size = MAX_CP_PAGES * CP_DESC_CNT - 1; in bnxt_set_ring_params()
4694 netdev_warn(bp->dev, "completion ring size %d reduced to %d.\n", in bnxt_set_ring_params()
4695 ring_size, bp->cp_ring_size); in bnxt_set_ring_params()
4697 bp->cp_bit = bp->cp_nr_pages * CP_DESC_CNT; in bnxt_set_ring_params()
4698 bp->cp_ring_mask = bp->cp_bit - 1; in bnxt_set_ring_params()
4706 struct net_device *dev = bp->dev; in bnxt_set_rx_skb_mode()
4709 bp->flags &= ~(BNXT_FLAG_AGG_RINGS | BNXT_FLAG_NO_AGG_RINGS); in bnxt_set_rx_skb_mode()
4710 bp->flags |= BNXT_FLAG_RX_PAGE_MODE; in bnxt_set_rx_skb_mode()
4712 if (bp->xdp_prog->aux->xdp_has_frags) in bnxt_set_rx_skb_mode()
4713 dev->max_mtu = min_t(u16, bp->max_mtu, BNXT_MAX_MTU); in bnxt_set_rx_skb_mode()
4715 dev->max_mtu = in bnxt_set_rx_skb_mode()
4716 min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU); in bnxt_set_rx_skb_mode()
4717 if (dev->mtu > BNXT_MAX_PAGE_MODE_MTU) { in bnxt_set_rx_skb_mode()
4718 bp->flags |= BNXT_FLAG_JUMBO; in bnxt_set_rx_skb_mode()
4719 bp->rx_skb_func = bnxt_rx_multi_page_skb; in bnxt_set_rx_skb_mode()
4721 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; in bnxt_set_rx_skb_mode()
4722 bp->rx_skb_func = bnxt_rx_page_skb; in bnxt_set_rx_skb_mode()
4724 bp->rx_dir = DMA_BIDIRECTIONAL; in bnxt_set_rx_skb_mode()
4728 dev->max_mtu = bp->max_mtu; in bnxt_set_rx_skb_mode()
4729 bp->flags &= ~BNXT_FLAG_RX_PAGE_MODE; in bnxt_set_rx_skb_mode()
4730 bp->rx_dir = DMA_FROM_DEVICE; in bnxt_set_rx_skb_mode()
4731 bp->rx_skb_func = bnxt_rx_skb; in bnxt_set_rx_skb_mode()
4740 struct pci_dev *pdev = bp->pdev; in bnxt_free_vnic_attributes()
4742 if (!bp->vnic_info) in bnxt_free_vnic_attributes()
4745 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_free_vnic_attributes()
4746 vnic = &bp->vnic_info[i]; in bnxt_free_vnic_attributes()
4748 kfree(vnic->fw_grp_ids); in bnxt_free_vnic_attributes()
4749 vnic->fw_grp_ids = NULL; in bnxt_free_vnic_attributes()
4751 kfree(vnic->uc_list); in bnxt_free_vnic_attributes()
4752 vnic->uc_list = NULL; in bnxt_free_vnic_attributes()
4754 if (vnic->mc_list) { in bnxt_free_vnic_attributes()
4755 dma_free_coherent(&pdev->dev, vnic->mc_list_size, in bnxt_free_vnic_attributes()
4756 vnic->mc_list, vnic->mc_list_mapping); in bnxt_free_vnic_attributes()
4757 vnic->mc_list = NULL; in bnxt_free_vnic_attributes()
4760 if (vnic->rss_table) { in bnxt_free_vnic_attributes()
4761 dma_free_coherent(&pdev->dev, vnic->rss_table_size, in bnxt_free_vnic_attributes()
4762 vnic->rss_table, in bnxt_free_vnic_attributes()
4763 vnic->rss_table_dma_addr); in bnxt_free_vnic_attributes()
4764 vnic->rss_table = NULL; in bnxt_free_vnic_attributes()
4767 vnic->rss_hash_key = NULL; in bnxt_free_vnic_attributes()
4768 vnic->flags = 0; in bnxt_free_vnic_attributes()
4776 struct pci_dev *pdev = bp->pdev; in bnxt_alloc_vnic_attributes()
4779 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_alloc_vnic_attributes()
4780 vnic = &bp->vnic_info[i]; in bnxt_alloc_vnic_attributes()
4782 if (vnic->flags & BNXT_VNIC_UCAST_FLAG) { in bnxt_alloc_vnic_attributes()
4783 int mem_size = (BNXT_MAX_UC_ADDRS - 1) * ETH_ALEN; in bnxt_alloc_vnic_attributes()
4786 vnic->uc_list = kmalloc(mem_size, GFP_KERNEL); in bnxt_alloc_vnic_attributes()
4787 if (!vnic->uc_list) { in bnxt_alloc_vnic_attributes()
4788 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4794 if (vnic->flags & BNXT_VNIC_MCAST_FLAG) { in bnxt_alloc_vnic_attributes()
4795 vnic->mc_list_size = BNXT_MAX_MC_ADDRS * ETH_ALEN; in bnxt_alloc_vnic_attributes()
4796 vnic->mc_list = in bnxt_alloc_vnic_attributes()
4797 dma_alloc_coherent(&pdev->dev, in bnxt_alloc_vnic_attributes()
4798 vnic->mc_list_size, in bnxt_alloc_vnic_attributes()
4799 &vnic->mc_list_mapping, in bnxt_alloc_vnic_attributes()
4801 if (!vnic->mc_list) { in bnxt_alloc_vnic_attributes()
4802 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4807 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_vnic_attributes()
4810 if (vnic->flags & BNXT_VNIC_RSS_FLAG) in bnxt_alloc_vnic_attributes()
4811 max_rings = bp->rx_nr_rings; in bnxt_alloc_vnic_attributes()
4815 vnic->fw_grp_ids = kcalloc(max_rings, sizeof(u16), GFP_KERNEL); in bnxt_alloc_vnic_attributes()
4816 if (!vnic->fw_grp_ids) { in bnxt_alloc_vnic_attributes()
4817 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4821 if ((bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) && in bnxt_alloc_vnic_attributes()
4822 !(vnic->flags & BNXT_VNIC_RSS_FLAG)) in bnxt_alloc_vnic_attributes()
4827 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_vnic_attributes()
4830 vnic->rss_table_size = size + HW_HASH_KEY_SIZE; in bnxt_alloc_vnic_attributes()
4831 vnic->rss_table = dma_alloc_coherent(&pdev->dev, in bnxt_alloc_vnic_attributes()
4832 vnic->rss_table_size, in bnxt_alloc_vnic_attributes()
4833 &vnic->rss_table_dma_addr, in bnxt_alloc_vnic_attributes()
4835 if (!vnic->rss_table) { in bnxt_alloc_vnic_attributes()
4836 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4840 vnic->rss_hash_key = ((void *)vnic->rss_table) + size; in bnxt_alloc_vnic_attributes()
4841 vnic->rss_hash_key_dma_addr = vnic->rss_table_dma_addr + size; in bnxt_alloc_vnic_attributes()
4853 dma_pool_destroy(bp->hwrm_dma_pool); in bnxt_free_hwrm_resources()
4854 bp->hwrm_dma_pool = NULL; in bnxt_free_hwrm_resources()
4857 hlist_for_each_entry_rcu(token, &bp->hwrm_pending_list, node) in bnxt_free_hwrm_resources()
4858 WRITE_ONCE(token->state, BNXT_HWRM_CANCELLED); in bnxt_free_hwrm_resources()
4864 bp->hwrm_dma_pool = dma_pool_create("bnxt_hwrm", &bp->pdev->dev, in bnxt_alloc_hwrm_resources()
4867 if (!bp->hwrm_dma_pool) in bnxt_alloc_hwrm_resources()
4868 return -ENOMEM; in bnxt_alloc_hwrm_resources()
4870 INIT_HLIST_HEAD(&bp->hwrm_pending_list); in bnxt_alloc_hwrm_resources()
4877 kfree(stats->hw_masks); in bnxt_free_stats_mem()
4878 stats->hw_masks = NULL; in bnxt_free_stats_mem()
4879 kfree(stats->sw_stats); in bnxt_free_stats_mem()
4880 stats->sw_stats = NULL; in bnxt_free_stats_mem()
4881 if (stats->hw_stats) { in bnxt_free_stats_mem()
4882 dma_free_coherent(&bp->pdev->dev, stats->len, stats->hw_stats, in bnxt_free_stats_mem()
4883 stats->hw_stats_map); in bnxt_free_stats_mem()
4884 stats->hw_stats = NULL; in bnxt_free_stats_mem()
4891 stats->hw_stats = dma_alloc_coherent(&bp->pdev->dev, stats->len, in bnxt_alloc_stats_mem()
4892 &stats->hw_stats_map, GFP_KERNEL); in bnxt_alloc_stats_mem()
4893 if (!stats->hw_stats) in bnxt_alloc_stats_mem()
4894 return -ENOMEM; in bnxt_alloc_stats_mem()
4896 stats->sw_stats = kzalloc(stats->len, GFP_KERNEL); in bnxt_alloc_stats_mem()
4897 if (!stats->sw_stats) in bnxt_alloc_stats_mem()
4901 stats->hw_masks = kzalloc(stats->len, GFP_KERNEL); in bnxt_alloc_stats_mem()
4902 if (!stats->hw_masks) in bnxt_alloc_stats_mem()
4909 return -ENOMEM; in bnxt_alloc_stats_mem()
4936 if (!(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED) || in bnxt_hwrm_func_qstat_ext()
4937 !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_func_qstat_ext()
4938 return -EOPNOTSUPP; in bnxt_hwrm_func_qstat_ext()
4944 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_func_qstat_ext()
4945 req->flags = FUNC_QSTATS_EXT_REQ_FLAGS_COUNTER_MASK; in bnxt_hwrm_func_qstat_ext()
4950 hw_masks = &resp->rx_ucast_pkts; in bnxt_hwrm_func_qstat_ext()
4951 bnxt_copy_hw_masks(stats->hw_masks, hw_masks, stats->len / 8); in bnxt_hwrm_func_qstat_ext()
4962 struct bnxt_napi *bnapi = bp->bnapi[0]; in bnxt_init_stats()
4971 cpr = &bnapi->cp_ring; in bnxt_init_stats()
4972 stats = &cpr->stats; in bnxt_init_stats()
4975 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_init_stats()
4976 mask = (1ULL << 48) - 1; in bnxt_init_stats()
4978 mask = -1ULL; in bnxt_init_stats()
4979 bnxt_fill_masks(stats->hw_masks, mask, stats->len / 8); in bnxt_init_stats()
4981 if (bp->flags & BNXT_FLAG_PORT_STATS) { in bnxt_init_stats()
4982 stats = &bp->port_stats; in bnxt_init_stats()
4983 rx_stats = stats->hw_stats; in bnxt_init_stats()
4984 rx_masks = stats->hw_masks; in bnxt_init_stats()
4993 mask = (1ULL << 40) - 1; in bnxt_init_stats()
5003 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { in bnxt_init_stats()
5004 stats = &bp->rx_port_stats_ext; in bnxt_init_stats()
5005 rx_stats = stats->hw_stats; in bnxt_init_stats()
5006 rx_masks = stats->hw_masks; in bnxt_init_stats()
5008 stats = &bp->tx_port_stats_ext; in bnxt_init_stats()
5009 tx_stats = stats->hw_stats; in bnxt_init_stats()
5010 tx_masks = stats->hw_masks; in bnxt_init_stats()
5016 mask = (1ULL << 40) - 1; in bnxt_init_stats()
5033 bp->flags &= ~BNXT_FLAG_PORT_STATS; in bnxt_free_port_stats()
5034 bp->flags &= ~BNXT_FLAG_PORT_STATS_EXT; in bnxt_free_port_stats()
5036 bnxt_free_stats_mem(bp, &bp->port_stats); in bnxt_free_port_stats()
5037 bnxt_free_stats_mem(bp, &bp->rx_port_stats_ext); in bnxt_free_port_stats()
5038 bnxt_free_stats_mem(bp, &bp->tx_port_stats_ext); in bnxt_free_port_stats()
5045 if (!bp->bnapi) in bnxt_free_ring_stats()
5048 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_ring_stats()
5049 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_free_ring_stats()
5050 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_free_ring_stats()
5052 bnxt_free_stats_mem(bp, &cpr->stats); in bnxt_free_ring_stats()
5054 kfree(cpr->sw_stats); in bnxt_free_ring_stats()
5055 cpr->sw_stats = NULL; in bnxt_free_ring_stats()
5064 size = bp->hw_ring_stats_size; in bnxt_alloc_stats()
5066 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_alloc_stats()
5067 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_alloc_stats()
5068 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_alloc_stats()
5070 cpr->sw_stats = kzalloc(sizeof(*cpr->sw_stats), GFP_KERNEL); in bnxt_alloc_stats()
5071 if (!cpr->sw_stats) in bnxt_alloc_stats()
5072 return -ENOMEM; in bnxt_alloc_stats()
5074 cpr->stats.len = size; in bnxt_alloc_stats()
5075 rc = bnxt_alloc_stats_mem(bp, &cpr->stats, !i); in bnxt_alloc_stats()
5079 cpr->hw_stats_ctx_id = INVALID_STATS_CTX_ID; in bnxt_alloc_stats()
5082 if (BNXT_VF(bp) || bp->chip_num == CHIP_NUM_58700) in bnxt_alloc_stats()
5085 if (bp->port_stats.hw_stats) in bnxt_alloc_stats()
5088 bp->port_stats.len = BNXT_PORT_STATS_SIZE; in bnxt_alloc_stats()
5089 rc = bnxt_alloc_stats_mem(bp, &bp->port_stats, true); in bnxt_alloc_stats()
5093 bp->flags |= BNXT_FLAG_PORT_STATS; in bnxt_alloc_stats()
5097 if (bp->hwrm_spec_code < 0x10804 || bp->hwrm_spec_code == 0x10900) in bnxt_alloc_stats()
5098 if (!(bp->fw_cap & BNXT_FW_CAP_EXT_STATS_SUPPORTED)) in bnxt_alloc_stats()
5101 if (bp->rx_port_stats_ext.hw_stats) in bnxt_alloc_stats()
5104 bp->rx_port_stats_ext.len = sizeof(struct rx_port_stats_ext); in bnxt_alloc_stats()
5105 rc = bnxt_alloc_stats_mem(bp, &bp->rx_port_stats_ext, true); in bnxt_alloc_stats()
5111 if (bp->tx_port_stats_ext.hw_stats) in bnxt_alloc_stats()
5114 if (bp->hwrm_spec_code >= 0x10902 || in bnxt_alloc_stats()
5115 (bp->fw_cap & BNXT_FW_CAP_EXT_STATS_SUPPORTED)) { in bnxt_alloc_stats()
5116 bp->tx_port_stats_ext.len = sizeof(struct tx_port_stats_ext); in bnxt_alloc_stats()
5117 rc = bnxt_alloc_stats_mem(bp, &bp->tx_port_stats_ext, true); in bnxt_alloc_stats()
5122 bp->flags |= BNXT_FLAG_PORT_STATS_EXT; in bnxt_alloc_stats()
5130 if (!bp->bnapi) in bnxt_clear_ring_indices()
5133 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_clear_ring_indices()
5134 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_clear_ring_indices()
5142 cpr = &bnapi->cp_ring; in bnxt_clear_ring_indices()
5143 cpr->cp_raw_cons = 0; in bnxt_clear_ring_indices()
5146 txr->tx_prod = 0; in bnxt_clear_ring_indices()
5147 txr->tx_cons = 0; in bnxt_clear_ring_indices()
5148 txr->tx_hw_cons = 0; in bnxt_clear_ring_indices()
5151 rxr = bnapi->rx_ring; in bnxt_clear_ring_indices()
5153 rxr->rx_prod = 0; in bnxt_clear_ring_indices()
5154 rxr->rx_agg_prod = 0; in bnxt_clear_ring_indices()
5155 rxr->rx_sw_agg_prod = 0; in bnxt_clear_ring_indices()
5156 rxr->rx_next_cons = 0; in bnxt_clear_ring_indices()
5158 bnapi->events = 0; in bnxt_clear_ring_indices()
5164 u8 type = fltr->type, flags = fltr->flags; in bnxt_insert_usr_fltr()
5166 INIT_LIST_HEAD(&fltr->list); in bnxt_insert_usr_fltr()
5169 list_add_tail(&fltr->list, &bp->usr_fltr_list); in bnxt_insert_usr_fltr()
5174 if (!list_empty(&fltr->list)) in bnxt_del_one_usr_fltr()
5175 list_del_init(&fltr->list); in bnxt_del_one_usr_fltr()
5182 list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) { in bnxt_clear_usr_fltrs()
5183 if (!all && usr_fltr->type == BNXT_FLTR_TYPE_L2) in bnxt_clear_usr_fltrs()
5191 hlist_del(&fltr->hash); in bnxt_del_fltr()
5193 if (fltr->flags) { in bnxt_del_fltr()
5194 clear_bit(fltr->sw_id, bp->ntp_fltr_bmap); in bnxt_del_fltr()
5195 bp->ntp_fltr_count--; in bnxt_del_fltr()
5212 head = &bp->ntp_fltr_hash_tbl[i]; in bnxt_free_ntp_fltrs()
5214 bnxt_del_l2_filter(bp, fltr->l2_fltr); in bnxt_free_ntp_fltrs()
5215 if (!all && ((fltr->base.flags & BNXT_ACT_FUNC_DST) || in bnxt_free_ntp_fltrs()
5216 !list_empty(&fltr->base.list))) in bnxt_free_ntp_fltrs()
5218 bnxt_del_fltr(bp, &fltr->base); in bnxt_free_ntp_fltrs()
5224 bitmap_free(bp->ntp_fltr_bmap); in bnxt_free_ntp_fltrs()
5225 bp->ntp_fltr_bmap = NULL; in bnxt_free_ntp_fltrs()
5226 bp->ntp_fltr_count = 0; in bnxt_free_ntp_fltrs()
5233 if (!(bp->flags & BNXT_FLAG_RFS) || bp->ntp_fltr_bmap) in bnxt_alloc_ntp_fltrs()
5237 INIT_HLIST_HEAD(&bp->ntp_fltr_hash_tbl[i]); in bnxt_alloc_ntp_fltrs()
5239 bp->ntp_fltr_count = 0; in bnxt_alloc_ntp_fltrs()
5240 bp->ntp_fltr_bmap = bitmap_zalloc(bp->max_fltr, GFP_KERNEL); in bnxt_alloc_ntp_fltrs()
5242 if (!bp->ntp_fltr_bmap) in bnxt_alloc_ntp_fltrs()
5243 rc = -ENOMEM; in bnxt_alloc_ntp_fltrs()
5257 head = &bp->l2_fltr_hash_tbl[i]; in bnxt_free_l2_filters()
5259 if (!all && ((fltr->base.flags & BNXT_ACT_FUNC_DST) || in bnxt_free_l2_filters()
5260 !list_empty(&fltr->base.list))) in bnxt_free_l2_filters()
5262 bnxt_del_fltr(bp, &fltr->base); in bnxt_free_l2_filters()
5272 INIT_HLIST_HEAD(&bp->l2_fltr_hash_tbl[i]); in bnxt_init_l2_fltr_tbl()
5273 get_random_bytes(&bp->hash_seed, sizeof(bp->hash_seed)); in bnxt_init_l2_fltr_tbl()
5287 if (!(bp->phy_flags & BNXT_PHY_FL_PORT_STATS_NO_RESET) || in bnxt_free_mem()
5288 test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_free_mem()
5292 kfree(bp->tx_ring_map); in bnxt_free_mem()
5293 bp->tx_ring_map = NULL; in bnxt_free_mem()
5294 kfree(bp->tx_ring); in bnxt_free_mem()
5295 bp->tx_ring = NULL; in bnxt_free_mem()
5296 kfree(bp->rx_ring); in bnxt_free_mem()
5297 bp->rx_ring = NULL; in bnxt_free_mem()
5298 kfree(bp->bnapi); in bnxt_free_mem()
5299 bp->bnapi = NULL; in bnxt_free_mem()
5315 bp->cp_nr_rings); in bnxt_alloc_mem()
5317 bnapi = kzalloc(arr_size + size * bp->cp_nr_rings, GFP_KERNEL); in bnxt_alloc_mem()
5319 return -ENOMEM; in bnxt_alloc_mem()
5321 bp->bnapi = bnapi; in bnxt_alloc_mem()
5323 for (i = 0; i < bp->cp_nr_rings; i++, bnapi += size) { in bnxt_alloc_mem()
5324 bp->bnapi[i] = bnapi; in bnxt_alloc_mem()
5325 bp->bnapi[i]->index = i; in bnxt_alloc_mem()
5326 bp->bnapi[i]->bp = bp; in bnxt_alloc_mem()
5327 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_alloc_mem()
5329 &bp->bnapi[i]->cp_ring; in bnxt_alloc_mem()
5331 cpr->cp_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5336 bp->rx_ring = kcalloc(bp->rx_nr_rings, in bnxt_alloc_mem()
5339 if (!bp->rx_ring) in bnxt_alloc_mem()
5340 return -ENOMEM; in bnxt_alloc_mem()
5342 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_mem()
5343 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_alloc_mem()
5345 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_alloc_mem()
5346 rxr->rx_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5348 rxr->rx_agg_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5351 rxr->rx_cpr = &bp->bnapi[i]->cp_ring; in bnxt_alloc_mem()
5353 rxr->bnapi = bp->bnapi[i]; in bnxt_alloc_mem()
5354 bp->bnapi[i]->rx_ring = &bp->rx_ring[i]; in bnxt_alloc_mem()
5357 bp->tx_ring = kcalloc(bp->tx_nr_rings, in bnxt_alloc_mem()
5360 if (!bp->tx_ring) in bnxt_alloc_mem()
5361 return -ENOMEM; in bnxt_alloc_mem()
5363 bp->tx_ring_map = kcalloc(bp->tx_nr_rings, sizeof(u16), in bnxt_alloc_mem()
5366 if (!bp->tx_ring_map) in bnxt_alloc_mem()
5367 return -ENOMEM; in bnxt_alloc_mem()
5369 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_alloc_mem()
5372 j = bp->rx_nr_rings; in bnxt_alloc_mem()
5374 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_alloc_mem()
5375 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_alloc_mem()
5378 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_mem()
5379 txr->tx_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5381 bp->tx_ring_map[i] = bp->tx_nr_rings_xdp + i; in bnxt_alloc_mem()
5382 if (i >= bp->tx_nr_rings_xdp) { in bnxt_alloc_mem()
5385 bnapi2 = bp->bnapi[k]; in bnxt_alloc_mem()
5386 txr->txq_index = i - bp->tx_nr_rings_xdp; in bnxt_alloc_mem()
5387 txr->tx_napi_idx = in bnxt_alloc_mem()
5388 BNXT_RING_TO_TC(bp, txr->txq_index); in bnxt_alloc_mem()
5389 bnapi2->tx_ring[txr->tx_napi_idx] = txr; in bnxt_alloc_mem()
5390 bnapi2->tx_int = bnxt_tx_int; in bnxt_alloc_mem()
5392 bnapi2 = bp->bnapi[j]; in bnxt_alloc_mem()
5393 bnapi2->flags |= BNXT_NAPI_FLAG_XDP; in bnxt_alloc_mem()
5394 bnapi2->tx_ring[0] = txr; in bnxt_alloc_mem()
5395 bnapi2->tx_int = bnxt_tx_int_xdp; in bnxt_alloc_mem()
5398 txr->bnapi = bnapi2; in bnxt_alloc_mem()
5399 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_mem()
5400 txr->tx_cpr = &bnapi2->cp_ring; in bnxt_alloc_mem()
5435 bp->vnic_info[BNXT_VNIC_DEFAULT].flags |= BNXT_VNIC_RSS_FLAG | in bnxt_alloc_mem()
5438 if (BNXT_SUPPORTS_NTUPLE_VNIC(bp) && (bp->flags & BNXT_FLAG_RFS)) in bnxt_alloc_mem()
5439 bp->vnic_info[BNXT_VNIC_NTUPLE].flags |= in bnxt_alloc_mem()
5456 if (!bp->bnapi) in bnxt_disable_int()
5459 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_disable_int()
5460 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_disable_int()
5461 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_disable_int()
5462 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_disable_int()
5464 if (ring->fw_ring_id != INVALID_HW_RING_ID) in bnxt_disable_int()
5465 bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_disable_int()
5471 struct bnxt_napi *bnapi = bp->bnapi[n]; in bnxt_cp_num_to_irq_num()
5474 cpr = &bnapi->cp_ring; in bnxt_cp_num_to_irq_num()
5475 return cpr->cp_ring_struct.map_idx; in bnxt_cp_num_to_irq_num()
5482 if (!bp->irq_tbl) in bnxt_disable_int_sync()
5485 atomic_inc(&bp->intr_sem); in bnxt_disable_int_sync()
5488 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_disable_int_sync()
5491 synchronize_irq(bp->irq_tbl[map_idx].vector); in bnxt_disable_int_sync()
5499 atomic_set(&bp->intr_sem, 0); in bnxt_enable_int()
5500 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_enable_int()
5501 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_enable_int()
5502 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_enable_int()
5504 bnxt_db_nq_arm(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_enable_int()
5522 req->enables = cpu_to_le32(FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE | in bnxt_hwrm_func_drv_rgtr()
5526 req->os_type = cpu_to_le16(FUNC_DRV_RGTR_REQ_OS_TYPE_LINUX); in bnxt_hwrm_func_drv_rgtr()
5528 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) in bnxt_hwrm_func_drv_rgtr()
5530 if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) in bnxt_hwrm_func_drv_rgtr()
5533 req->flags = cpu_to_le32(flags); in bnxt_hwrm_func_drv_rgtr()
5534 req->ver_maj_8b = DRV_VER_MAJ; in bnxt_hwrm_func_drv_rgtr()
5535 req->ver_min_8b = DRV_VER_MIN; in bnxt_hwrm_func_drv_rgtr()
5536 req->ver_upd_8b = DRV_VER_UPD; in bnxt_hwrm_func_drv_rgtr()
5537 req->ver_maj = cpu_to_le16(DRV_VER_MAJ); in bnxt_hwrm_func_drv_rgtr()
5538 req->ver_min = cpu_to_le16(DRV_VER_MIN); in bnxt_hwrm_func_drv_rgtr()
5539 req->ver_upd = cpu_to_le16(DRV_VER_UPD); in bnxt_hwrm_func_drv_rgtr()
5556 req->vf_req_fwd[i] = cpu_to_le32(data[i]); in bnxt_hwrm_func_drv_rgtr()
5558 req->enables |= in bnxt_hwrm_func_drv_rgtr()
5562 if (bp->fw_cap & BNXT_FW_CAP_OVS_64BIT_HANDLE) in bnxt_hwrm_func_drv_rgtr()
5563 req->flags |= cpu_to_le32( in bnxt_hwrm_func_drv_rgtr()
5571 !(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) in bnxt_hwrm_func_drv_rgtr()
5574 !bp->ptp_cfg) in bnxt_hwrm_func_drv_rgtr()
5585 req->async_event_fwd[i] |= cpu_to_le32(events[i]); in bnxt_hwrm_func_drv_rgtr()
5588 req->enables = in bnxt_hwrm_func_drv_rgtr()
5594 set_bit(BNXT_STATE_DRV_REGISTERED, &bp->state); in bnxt_hwrm_func_drv_rgtr()
5595 if (resp->flags & in bnxt_hwrm_func_drv_rgtr()
5597 bp->fw_cap |= BNXT_FW_CAP_IF_CHANGE; in bnxt_hwrm_func_drv_rgtr()
5608 if (!test_and_clear_bit(BNXT_STATE_DRV_REGISTERED, &bp->state)) in bnxt_hwrm_func_drv_unrgtr()
5625 bp->vxlan_fw_dst_port_id == INVALID_HW_RING_ID) in bnxt_hwrm_tunnel_dst_port_free()
5628 bp->nge_fw_dst_port_id == INVALID_HW_RING_ID) in bnxt_hwrm_tunnel_dst_port_free()
5635 req->tunnel_type = tunnel_type; in bnxt_hwrm_tunnel_dst_port_free()
5639 req->tunnel_dst_port_id = cpu_to_le16(bp->vxlan_fw_dst_port_id); in bnxt_hwrm_tunnel_dst_port_free()
5640 bp->vxlan_port = 0; in bnxt_hwrm_tunnel_dst_port_free()
5641 bp->vxlan_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_hwrm_tunnel_dst_port_free()
5644 req->tunnel_dst_port_id = cpu_to_le16(bp->nge_fw_dst_port_id); in bnxt_hwrm_tunnel_dst_port_free()
5645 bp->nge_port = 0; in bnxt_hwrm_tunnel_dst_port_free()
5646 bp->nge_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_hwrm_tunnel_dst_port_free()
5649 req->tunnel_dst_port_id = cpu_to_le16(bp->vxlan_gpe_fw_dst_port_id); in bnxt_hwrm_tunnel_dst_port_free()
5650 bp->vxlan_gpe_port = 0; in bnxt_hwrm_tunnel_dst_port_free()
5651 bp->vxlan_gpe_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_hwrm_tunnel_dst_port_free()
5659 netdev_err(bp->dev, "hwrm_tunnel_dst_port_free failed. rc:%d\n", in bnxt_hwrm_tunnel_dst_port_free()
5661 if (bp->flags & BNXT_FLAG_TPA) in bnxt_hwrm_tunnel_dst_port_free()
5677 req->tunnel_type = tunnel_type; in bnxt_hwrm_tunnel_dst_port_alloc()
5678 req->tunnel_dst_port_val = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5683 netdev_err(bp->dev, "hwrm_tunnel_dst_port_alloc failed. rc:%d\n", in bnxt_hwrm_tunnel_dst_port_alloc()
5690 bp->vxlan_port = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5691 bp->vxlan_fw_dst_port_id = in bnxt_hwrm_tunnel_dst_port_alloc()
5692 le16_to_cpu(resp->tunnel_dst_port_id); in bnxt_hwrm_tunnel_dst_port_alloc()
5695 bp->nge_port = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5696 bp->nge_fw_dst_port_id = le16_to_cpu(resp->tunnel_dst_port_id); in bnxt_hwrm_tunnel_dst_port_alloc()
5699 bp->vxlan_gpe_port = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5700 bp->vxlan_gpe_fw_dst_port_id = in bnxt_hwrm_tunnel_dst_port_alloc()
5701 le16_to_cpu(resp->tunnel_dst_port_id); in bnxt_hwrm_tunnel_dst_port_alloc()
5706 if (bp->flags & BNXT_FLAG_TPA) in bnxt_hwrm_tunnel_dst_port_alloc()
5717 struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id]; in bnxt_hwrm_cfa_l2_set_rx_mask()
5724 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_cfa_l2_set_rx_mask()
5725 if (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST) { in bnxt_hwrm_cfa_l2_set_rx_mask()
5726 req->num_mc_entries = cpu_to_le32(vnic->mc_list_count); in bnxt_hwrm_cfa_l2_set_rx_mask()
5727 req->mc_tbl_addr = cpu_to_le64(vnic->mc_list_mapping); in bnxt_hwrm_cfa_l2_set_rx_mask()
5729 req->mask = cpu_to_le32(vnic->rx_mask); in bnxt_hwrm_cfa_l2_set_rx_mask()
5735 if (!atomic_dec_and_test(&fltr->refcnt)) in bnxt_del_l2_filter()
5737 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_del_l2_filter()
5738 if (!test_and_clear_bit(BNXT_FLTR_INSERTED, &fltr->base.state)) { in bnxt_del_l2_filter()
5739 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_l2_filter()
5742 hlist_del_rcu(&fltr->base.hash); in bnxt_del_l2_filter()
5743 bnxt_del_one_usr_fltr(bp, &fltr->base); in bnxt_del_l2_filter()
5744 if (fltr->base.flags) { in bnxt_del_l2_filter()
5745 clear_bit(fltr->base.sw_id, bp->ntp_fltr_bmap); in bnxt_del_l2_filter()
5746 bp->ntp_fltr_count--; in bnxt_del_l2_filter()
5748 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_l2_filter()
5756 struct hlist_head *head = &bp->l2_fltr_hash_tbl[idx]; in __bnxt_lookup_l2_filter()
5760 struct bnxt_l2_key *l2_key = &fltr->l2_key; in __bnxt_lookup_l2_filter()
5762 if (ether_addr_equal(l2_key->dst_mac_addr, key->dst_mac_addr) && in __bnxt_lookup_l2_filter()
5763 l2_key->vlan == key->vlan) in __bnxt_lookup_l2_filter()
5778 atomic_inc(&fltr->refcnt); in bnxt_lookup_l2_filter()
5784 (((fkeys)->basic.ip_proto == IPPROTO_TCP && \
5785 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) || \
5786 ((fkeys)->basic.ip_proto == IPPROTO_UDP && \
5787 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4))
5790 (((fkeys)->basic.ip_proto == IPPROTO_TCP && \
5791 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) || \
5792 ((fkeys)->basic.ip_proto == IPPROTO_UDP && \
5793 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6))
5797 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { in bnxt_get_rss_flow_tuple_len()
5799 return sizeof(fkeys->addrs.v4addrs) + in bnxt_get_rss_flow_tuple_len()
5800 sizeof(fkeys->ports); in bnxt_get_rss_flow_tuple_len()
5802 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) in bnxt_get_rss_flow_tuple_len()
5803 return sizeof(fkeys->addrs.v4addrs); in bnxt_get_rss_flow_tuple_len()
5806 if (fkeys->basic.n_proto == htons(ETH_P_IPV6)) { in bnxt_get_rss_flow_tuple_len()
5808 return sizeof(fkeys->addrs.v6addrs) + in bnxt_get_rss_flow_tuple_len()
5809 sizeof(fkeys->ports); in bnxt_get_rss_flow_tuple_len()
5811 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) in bnxt_get_rss_flow_tuple_len()
5812 return sizeof(fkeys->addrs.v6addrs); in bnxt_get_rss_flow_tuple_len()
5821 u64 prefix = bp->toeplitz_prefix, hash = 0; in bnxt_toeplitz()
5831 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { in bnxt_toeplitz()
5832 tuple4.v4addrs = fkeys->addrs.v4addrs; in bnxt_toeplitz()
5833 tuple4.ports = fkeys->ports; in bnxt_toeplitz()
5836 tuple6.v6addrs = fkeys->addrs.v6addrs; in bnxt_toeplitz()
5837 tuple6.ports = fkeys->ports; in bnxt_toeplitz()
5863 idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) & in bnxt_lookup_l2_filter_from_key()
5875 ether_addr_copy(fltr->l2_key.dst_mac_addr, key->dst_mac_addr); in bnxt_init_l2_filter()
5876 fltr->l2_key.vlan = key->vlan; in bnxt_init_l2_filter()
5877 fltr->base.type = BNXT_FLTR_TYPE_L2; in bnxt_init_l2_filter()
5878 if (fltr->base.flags) { in bnxt_init_l2_filter()
5881 bit_id = bitmap_find_free_region(bp->ntp_fltr_bmap, in bnxt_init_l2_filter()
5882 bp->max_fltr, 0); in bnxt_init_l2_filter()
5884 return -ENOMEM; in bnxt_init_l2_filter()
5885 fltr->base.sw_id = (u16)bit_id; in bnxt_init_l2_filter()
5886 bp->ntp_fltr_count++; in bnxt_init_l2_filter()
5888 head = &bp->l2_fltr_hash_tbl[idx]; in bnxt_init_l2_filter()
5889 hlist_add_head_rcu(&fltr->base.hash, head); in bnxt_init_l2_filter()
5890 bnxt_insert_usr_fltr(bp, &fltr->base); in bnxt_init_l2_filter()
5891 set_bit(BNXT_FLTR_INSERTED, &fltr->base.state); in bnxt_init_l2_filter()
5892 atomic_set(&fltr->refcnt, 1); in bnxt_init_l2_filter()
5904 idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) & in bnxt_alloc_l2_filter()
5912 return ERR_PTR(-ENOMEM); in bnxt_alloc_l2_filter()
5913 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_l2_filter()
5915 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_l2_filter()
5931 idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) & in bnxt_alloc_new_l2_filter()
5933 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_new_l2_filter()
5936 fltr = ERR_PTR(-EEXIST); in bnxt_alloc_new_l2_filter()
5941 fltr = ERR_PTR(-ENOMEM); in bnxt_alloc_new_l2_filter()
5944 fltr->base.flags = flags; in bnxt_alloc_new_l2_filter()
5947 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_new_l2_filter()
5953 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_new_l2_filter()
5960 struct bnxt_vf_info *vf = &pf->vf[vf_idx]; in bnxt_vf_target_id()
5962 return vf->fw_fid; in bnxt_vf_target_id()
5974 if (fltr->base.flags & BNXT_ACT_FUNC_DST) { in bnxt_hwrm_l2_filter_free()
5975 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_l2_filter_free()
5977 if (fltr->base.vf_idx >= pf->active_vfs) in bnxt_hwrm_l2_filter_free()
5978 return -EINVAL; in bnxt_hwrm_l2_filter_free()
5980 target_id = bnxt_vf_target_id(pf, fltr->base.vf_idx); in bnxt_hwrm_l2_filter_free()
5982 return -EINVAL; in bnxt_hwrm_l2_filter_free()
5989 req->target_id = cpu_to_le16(target_id); in bnxt_hwrm_l2_filter_free()
5990 req->l2_filter_id = fltr->base.filter_id; in bnxt_hwrm_l2_filter_free()
6001 if (fltr->base.flags & BNXT_ACT_FUNC_DST) { in bnxt_hwrm_l2_filter_alloc()
6002 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_l2_filter_alloc()
6004 if (fltr->base.vf_idx >= pf->active_vfs) in bnxt_hwrm_l2_filter_alloc()
6005 return -EINVAL; in bnxt_hwrm_l2_filter_alloc()
6007 target_id = bnxt_vf_target_id(pf, fltr->base.vf_idx); in bnxt_hwrm_l2_filter_alloc()
6013 req->target_id = cpu_to_le16(target_id); in bnxt_hwrm_l2_filter_alloc()
6014 req->flags = cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX); in bnxt_hwrm_l2_filter_alloc()
6017 req->flags |= in bnxt_hwrm_l2_filter_alloc()
6019 req->dst_id = cpu_to_le16(fltr->base.fw_vnic_id); in bnxt_hwrm_l2_filter_alloc()
6020 req->enables = in bnxt_hwrm_l2_filter_alloc()
6024 ether_addr_copy(req->l2_addr, fltr->l2_key.dst_mac_addr); in bnxt_hwrm_l2_filter_alloc()
6025 eth_broadcast_addr(req->l2_addr_mask); in bnxt_hwrm_l2_filter_alloc()
6027 if (fltr->l2_key.vlan) { in bnxt_hwrm_l2_filter_alloc()
6028 req->enables |= in bnxt_hwrm_l2_filter_alloc()
6032 req->num_vlans = 1; in bnxt_hwrm_l2_filter_alloc()
6033 req->l2_ivlan = cpu_to_le16(fltr->l2_key.vlan); in bnxt_hwrm_l2_filter_alloc()
6034 req->l2_ivlan_mask = cpu_to_le16(0xfff); in bnxt_hwrm_l2_filter_alloc()
6040 fltr->base.filter_id = resp->l2_filter_id; in bnxt_hwrm_l2_filter_alloc()
6041 set_bit(BNXT_FLTR_VALID, &fltr->base.state); in bnxt_hwrm_l2_filter_alloc()
6053 set_bit(BNXT_FLTR_FW_DELETED, &fltr->base.state); in bnxt_hwrm_cfa_ntuple_filter_free()
6058 req->ntuple_filter_id = fltr->base.filter_id; in bnxt_hwrm_cfa_ntuple_filter_free()
6093 u16 rxq = fltr->base.rxq; in bnxt_cfg_rfs_ring_tbl_idx()
6095 if (fltr->base.flags & BNXT_ACT_RSS_CTX) { in bnxt_cfg_rfs_ring_tbl_idx()
6100 ctx = xa_load(&bp->dev->ethtool->rss_ctx, in bnxt_cfg_rfs_ring_tbl_idx()
6101 fltr->base.fw_vnic_id); in bnxt_cfg_rfs_ring_tbl_idx()
6104 vnic = &rss_ctx->vnic; in bnxt_cfg_rfs_ring_tbl_idx()
6106 req->dst_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_cfg_rfs_ring_tbl_idx()
6114 vnic = &bp->vnic_info[BNXT_VNIC_NTUPLE]; in bnxt_cfg_rfs_ring_tbl_idx()
6115 req->dst_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_cfg_rfs_ring_tbl_idx()
6117 req->enables |= cpu_to_le32(enables); in bnxt_cfg_rfs_ring_tbl_idx()
6118 req->rfs_ring_tbl_idx = cpu_to_le16(rxq); in bnxt_cfg_rfs_ring_tbl_idx()
6123 req->flags |= cpu_to_le32(flags); in bnxt_cfg_rfs_ring_tbl_idx()
6124 req->dst_id = cpu_to_le16(rxq); in bnxt_cfg_rfs_ring_tbl_idx()
6133 struct bnxt_flow_masks *masks = &fltr->fmasks; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6134 struct flow_keys *keys = &fltr->fkeys; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6143 l2_fltr = fltr->l2_fltr; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6144 req->l2_filter_id = l2_fltr->base.filter_id; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6146 if (fltr->base.flags & BNXT_ACT_DROP) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6147 req->flags = in bnxt_hwrm_cfa_ntuple_filter_alloc()
6149 } else if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6152 vnic = &bp->vnic_info[fltr->base.rxq + 1]; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6153 req->dst_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6155 req->enables |= cpu_to_le32(BNXT_NTP_FLTR_FLAGS); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6157 req->ethertype = htons(ETH_P_IP); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6158 req->ip_addr_type = CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6159 req->ip_protocol = keys->basic.ip_proto; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6161 if (keys->basic.n_proto == htons(ETH_P_IPV6)) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6162 req->ethertype = htons(ETH_P_IPV6); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6163 req->ip_addr_type = in bnxt_hwrm_cfa_ntuple_filter_alloc()
6165 *(struct in6_addr *)&req->src_ipaddr[0] = keys->addrs.v6addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6166 *(struct in6_addr *)&req->src_ipaddr_mask[0] = masks->addrs.v6addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6167 *(struct in6_addr *)&req->dst_ipaddr[0] = keys->addrs.v6addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6168 *(struct in6_addr *)&req->dst_ipaddr_mask[0] = masks->addrs.v6addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6170 req->src_ipaddr[0] = keys->addrs.v4addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6171 req->src_ipaddr_mask[0] = masks->addrs.v4addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6172 req->dst_ipaddr[0] = keys->addrs.v4addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6173 req->dst_ipaddr_mask[0] = masks->addrs.v4addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6175 if (keys->control.flags & FLOW_DIS_ENCAPSULATION) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6176 req->enables |= cpu_to_le32(BNXT_NTP_TUNNEL_FLTR_FLAG); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6177 req->tunnel_type = in bnxt_hwrm_cfa_ntuple_filter_alloc()
6181 req->src_port = keys->ports.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6182 req->src_port_mask = masks->ports.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6183 req->dst_port = keys->ports.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6184 req->dst_port_mask = masks->ports.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6189 fltr->base.filter_id = resp->ntuple_filter_id; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6207 fltr->base.fw_vnic_id = bp->vnic_info[vnic_id].fw_vnic_id; in bnxt_hwrm_set_vnic_filter()
6212 bp->vnic_info[vnic_id].l2_filters[idx] = fltr; in bnxt_hwrm_set_vnic_filter()
6222 struct bnxt_vnic_info *vnic = &bp->vnic_info[i]; in bnxt_hwrm_clear_vnic_filter()
6224 for (j = 0; j < vnic->uc_filter_count; j++) { in bnxt_hwrm_clear_vnic_filter()
6225 struct bnxt_l2_filter *fltr = vnic->l2_filters[j]; in bnxt_hwrm_clear_vnic_filter()
6230 vnic->uc_filter_count = 0; in bnxt_hwrm_clear_vnic_filter()
6244 if (!(bp->fw_cap & BNXT_FW_CAP_VNIC_TUNNEL_TPA)) in bnxt_hwrm_vnic_update_tunl_tpa()
6247 if (bp->vxlan_port) in bnxt_hwrm_vnic_update_tunl_tpa()
6249 if (bp->vxlan_gpe_port) in bnxt_hwrm_vnic_update_tunl_tpa()
6251 if (bp->nge_port) in bnxt_hwrm_vnic_update_tunl_tpa()
6254 req->enables |= cpu_to_le32(VNIC_TPA_CFG_REQ_ENABLES_TNL_TPA_EN); in bnxt_hwrm_vnic_update_tunl_tpa()
6255 req->tnl_tpa_en_bitmap = cpu_to_le32(tunl_tpa_bmap); in bnxt_hwrm_vnic_update_tunl_tpa()
6265 if (vnic->fw_vnic_id == INVALID_HW_RING_ID) in bnxt_hwrm_vnic_set_tpa()
6273 u16 mss = bp->dev->mtu - 40; in bnxt_hwrm_vnic_set_tpa()
6284 req->flags = cpu_to_le32(flags); in bnxt_hwrm_vnic_set_tpa()
6286 req->enables = in bnxt_hwrm_vnic_set_tpa()
6296 nsegs = (MAX_SKB_FRAGS - 1) * n; in bnxt_hwrm_vnic_set_tpa()
6299 if (mss & (BNXT_RX_PAGE_SIZE - 1)) in bnxt_hwrm_vnic_set_tpa()
6301 nsegs = (MAX_SKB_FRAGS - n) / n; in bnxt_hwrm_vnic_set_tpa()
6304 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_vnic_set_tpa()
6306 max_aggs = bp->max_tpa; in bnxt_hwrm_vnic_set_tpa()
6310 req->max_agg_segs = cpu_to_le16(segs); in bnxt_hwrm_vnic_set_tpa()
6311 req->max_aggs = cpu_to_le16(max_aggs); in bnxt_hwrm_vnic_set_tpa()
6313 req->min_agg_len = cpu_to_le32(512); in bnxt_hwrm_vnic_set_tpa()
6316 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_vnic_set_tpa()
6325 grp_info = &bp->grp_info[ring->grp_idx]; in bnxt_cp_ring_from_grp()
6326 return grp_info->cp_fw_ring_id; in bnxt_cp_ring_from_grp()
6331 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_cp_ring_for_rx()
6332 return rxr->rx_cpr->cp_ring_struct.fw_ring_id; in bnxt_cp_ring_for_rx()
6334 return bnxt_cp_ring_from_grp(bp, &rxr->rx_ring_struct); in bnxt_cp_ring_for_rx()
6339 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_cp_ring_for_tx()
6340 return txr->tx_cpr->cp_ring_struct.fw_ring_id; in bnxt_cp_ring_for_tx()
6342 return bnxt_cp_ring_from_grp(bp, &txr->tx_ring_struct); in bnxt_cp_ring_for_tx()
6349 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_rss_indir_tbl()
6354 bp->rss_indir_tbl_entries = entries; in bnxt_alloc_rss_indir_tbl()
6355 bp->rss_indir_tbl = in bnxt_alloc_rss_indir_tbl()
6356 kmalloc_array(entries, sizeof(*bp->rss_indir_tbl), GFP_KERNEL); in bnxt_alloc_rss_indir_tbl()
6357 if (!bp->rss_indir_tbl) in bnxt_alloc_rss_indir_tbl()
6358 return -ENOMEM; in bnxt_alloc_rss_indir_tbl()
6369 if (!bp->rx_nr_rings) in bnxt_set_dflt_rss_indir_tbl()
6373 max_rings = bp->rx_nr_rings - 1; in bnxt_set_dflt_rss_indir_tbl()
6375 max_rings = bp->rx_nr_rings; in bnxt_set_dflt_rss_indir_tbl()
6377 max_entries = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_set_dflt_rss_indir_tbl()
6381 rss_indir_tbl = &bp->rss_indir_tbl[0]; in bnxt_set_dflt_rss_indir_tbl()
6386 pad = bp->rss_indir_tbl_entries - max_entries; in bnxt_set_dflt_rss_indir_tbl()
6395 if (!bp->rss_indir_tbl) in bnxt_get_max_rss_ring()
6398 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_get_max_rss_ring()
6400 max_ring = max(max_ring, bp->rss_indir_tbl[i]); in bnxt_get_max_rss_ring()
6406 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_get_nr_rss_ctxs()
6409 return bnxt_calc_nr_ring_pages(rx_rings - 1, in bnxt_get_nr_rss_ctxs()
6419 bool no_rss = !(vnic->flags & BNXT_VNIC_RSS_FLAG); in bnxt_fill_hw_rss_tbl()
6425 j = bp->rss_indir_tbl[i]; in bnxt_fill_hw_rss_tbl()
6426 vnic->rss_table[i] = cpu_to_le16(vnic->fw_grp_ids[j]); in bnxt_fill_hw_rss_tbl()
6433 __le16 *ring_tbl = vnic->rss_table; in bnxt_fill_hw_rss_tbl_p5()
6437 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_fill_hw_rss_tbl_p5()
6442 if (vnic->flags & BNXT_VNIC_NTUPLE_FLAG) in bnxt_fill_hw_rss_tbl_p5()
6443 j = ethtool_rxfh_indir_default(i, bp->rx_nr_rings); in bnxt_fill_hw_rss_tbl_p5()
6444 else if (vnic->flags & BNXT_VNIC_RSSCTX_FLAG) in bnxt_fill_hw_rss_tbl_p5()
6445 j = ethtool_rxfh_context_indir(vnic->rss_ctx)[i]; in bnxt_fill_hw_rss_tbl_p5()
6447 j = bp->rss_indir_tbl[i]; in bnxt_fill_hw_rss_tbl_p5()
6448 rxr = &bp->rx_ring[j]; in bnxt_fill_hw_rss_tbl_p5()
6450 ring_id = rxr->rx_ring_struct.fw_ring_id; in bnxt_fill_hw_rss_tbl_p5()
6461 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_vnic_set_rss()
6463 if (bp->flags & BNXT_FLAG_CHIP_P7) in __bnxt_hwrm_vnic_set_rss()
6464 req->flags |= VNIC_RSS_CFG_REQ_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT; in __bnxt_hwrm_vnic_set_rss()
6469 if (bp->rss_hash_delta) { in __bnxt_hwrm_vnic_set_rss()
6470 req->hash_type = cpu_to_le32(bp->rss_hash_delta); in __bnxt_hwrm_vnic_set_rss()
6471 if (bp->rss_hash_cfg & bp->rss_hash_delta) in __bnxt_hwrm_vnic_set_rss()
6472 req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE; in __bnxt_hwrm_vnic_set_rss()
6474 req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE; in __bnxt_hwrm_vnic_set_rss()
6476 req->hash_type = cpu_to_le32(bp->rss_hash_cfg); in __bnxt_hwrm_vnic_set_rss()
6478 req->hash_mode_flags = VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT; in __bnxt_hwrm_vnic_set_rss()
6479 req->ring_grp_tbl_addr = cpu_to_le64(vnic->rss_table_dma_addr); in __bnxt_hwrm_vnic_set_rss()
6480 req->hash_key_tbl_addr = cpu_to_le64(vnic->rss_hash_key_dma_addr); in __bnxt_hwrm_vnic_set_rss()
6489 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) || in bnxt_hwrm_vnic_set_rss()
6490 vnic->fw_rss_cos_lb_ctx[0] == INVALID_HW_RING_ID) in bnxt_hwrm_vnic_set_rss()
6499 req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_vnic_set_rss()
6515 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_vnic_set_rss_p5()
6520 ring_tbl_map = vnic->rss_table_dma_addr; in bnxt_hwrm_vnic_set_rss_p5()
6521 nr_ctxs = bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings); in bnxt_hwrm_vnic_set_rss_p5()
6525 req->ring_grp_tbl_addr = cpu_to_le64(ring_tbl_map); in bnxt_hwrm_vnic_set_rss_p5()
6526 req->ring_table_pair_index = i; in bnxt_hwrm_vnic_set_rss_p5()
6527 req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[i]); in bnxt_hwrm_vnic_set_rss_p5()
6540 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_hwrm_update_rss_hash_cfg()
6547 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_update_rss_hash_cfg()
6549 req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_update_rss_hash_cfg()
6552 bp->rss_hash_cfg = le32_to_cpu(resp->hash_type) ?: bp->rss_hash_cfg; in bnxt_hwrm_update_rss_hash_cfg()
6553 bp->rss_hash_delta = 0; in bnxt_hwrm_update_rss_hash_cfg()
6567 req->flags = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT); in bnxt_hwrm_vnic_set_hds()
6568 req->enables = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID); in bnxt_hwrm_vnic_set_hds()
6571 req->jumbo_thresh = cpu_to_le16(bp->rx_buf_use_size); in bnxt_hwrm_vnic_set_hds()
6573 req->flags |= cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4 | in bnxt_hwrm_vnic_set_hds()
6575 req->enables |= in bnxt_hwrm_vnic_set_hds()
6577 req->jumbo_thresh = cpu_to_le16(bp->rx_copy_thresh); in bnxt_hwrm_vnic_set_hds()
6578 req->hds_threshold = cpu_to_le16(bp->rx_copy_thresh); in bnxt_hwrm_vnic_set_hds()
6580 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_vnic_set_hds()
6593 req->rss_cos_lb_ctx_id = in bnxt_hwrm_vnic_ctx_free_one()
6594 cpu_to_le16(vnic->fw_rss_cos_lb_ctx[ctx_idx]); in bnxt_hwrm_vnic_ctx_free_one()
6597 vnic->fw_rss_cos_lb_ctx[ctx_idx] = INVALID_HW_RING_ID; in bnxt_hwrm_vnic_ctx_free_one()
6604 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_hwrm_vnic_ctx_free()
6605 struct bnxt_vnic_info *vnic = &bp->vnic_info[i]; in bnxt_hwrm_vnic_ctx_free()
6608 if (vnic->fw_rss_cos_lb_ctx[j] != INVALID_HW_RING_ID) in bnxt_hwrm_vnic_ctx_free()
6612 bp->rsscos_nr_ctxs = 0; in bnxt_hwrm_vnic_ctx_free()
6629 vnic->fw_rss_cos_lb_ctx[ctx_idx] = in bnxt_hwrm_vnic_ctx_alloc()
6630 le16_to_cpu(resp->rss_cos_lb_ctx_id); in bnxt_hwrm_vnic_ctx_alloc()
6638 if (bp->flags & BNXT_FLAG_ROCE_MIRROR_CAP) in bnxt_get_roce_vnic_mode()
6645 struct bnxt_vnic_info *vnic0 = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_hwrm_vnic_cfg()
6655 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_vnic_cfg()
6656 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; in bnxt_hwrm_vnic_cfg()
6658 req->default_rx_ring_id = in bnxt_hwrm_vnic_cfg()
6659 cpu_to_le16(rxr->rx_ring_struct.fw_ring_id); in bnxt_hwrm_vnic_cfg()
6660 req->default_cmpl_ring_id = in bnxt_hwrm_vnic_cfg()
6662 req->enables = in bnxt_hwrm_vnic_cfg()
6667 req->enables = cpu_to_le32(VNIC_CFG_REQ_ENABLES_DFLT_RING_GRP); in bnxt_hwrm_vnic_cfg()
6669 if (vnic->fw_rss_cos_lb_ctx[0] != INVALID_HW_RING_ID) { in bnxt_hwrm_vnic_cfg()
6670 req->rss_rule = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_vnic_cfg()
6671 req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_RSS_RULE | in bnxt_hwrm_vnic_cfg()
6673 } else if (vnic->flags & BNXT_VNIC_RFS_NEW_RSS_FLAG) { in bnxt_hwrm_vnic_cfg()
6674 req->rss_rule = cpu_to_le16(vnic0->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_vnic_cfg()
6675 req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_RSS_RULE | in bnxt_hwrm_vnic_cfg()
6677 req->flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_RSS_DFLT_CR_MODE); in bnxt_hwrm_vnic_cfg()
6679 req->rss_rule = cpu_to_le16(0xffff); in bnxt_hwrm_vnic_cfg()
6683 (vnic->fw_rss_cos_lb_ctx[0] != INVALID_HW_RING_ID)) { in bnxt_hwrm_vnic_cfg()
6684 req->cos_rule = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[1]); in bnxt_hwrm_vnic_cfg()
6685 req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_COS_RULE); in bnxt_hwrm_vnic_cfg()
6687 req->cos_rule = cpu_to_le16(0xffff); in bnxt_hwrm_vnic_cfg()
6690 if (vnic->flags & BNXT_VNIC_RSS_FLAG) in bnxt_hwrm_vnic_cfg()
6692 else if (vnic->flags & BNXT_VNIC_RFS_FLAG) in bnxt_hwrm_vnic_cfg()
6693 ring = vnic->vnic_id - 1; in bnxt_hwrm_vnic_cfg()
6694 else if ((vnic->vnic_id == 1) && BNXT_CHIP_TYPE_NITRO_A0(bp)) in bnxt_hwrm_vnic_cfg()
6695 ring = bp->rx_nr_rings - 1; in bnxt_hwrm_vnic_cfg()
6697 grp_idx = bp->rx_ring[ring].bnapi->index; in bnxt_hwrm_vnic_cfg()
6698 req->dflt_ring_grp = cpu_to_le16(bp->grp_info[grp_idx].fw_grp_id); in bnxt_hwrm_vnic_cfg()
6699 req->lb_rule = cpu_to_le16(0xffff); in bnxt_hwrm_vnic_cfg()
6701 vnic->mru = bp->dev->mtu + ETH_HLEN + VLAN_HLEN; in bnxt_hwrm_vnic_cfg()
6702 req->mru = cpu_to_le16(vnic->mru); in bnxt_hwrm_vnic_cfg()
6704 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_vnic_cfg()
6707 def_vlan = bp->vf.vlan; in bnxt_hwrm_vnic_cfg()
6709 if ((bp->flags & BNXT_FLAG_STRIP_VLAN) || def_vlan) in bnxt_hwrm_vnic_cfg()
6710 req->flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_VLAN_STRIP_MODE); in bnxt_hwrm_vnic_cfg()
6711 if (vnic->vnic_id == BNXT_VNIC_DEFAULT && bnxt_ulp_registered(bp->edev)) in bnxt_hwrm_vnic_cfg()
6712 req->flags |= cpu_to_le32(bnxt_get_roce_vnic_mode(bp)); in bnxt_hwrm_vnic_cfg()
6720 if (vnic->fw_vnic_id != INVALID_HW_RING_ID) { in bnxt_hwrm_vnic_free_one()
6726 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_vnic_free_one()
6729 vnic->fw_vnic_id = INVALID_HW_RING_ID; in bnxt_hwrm_vnic_free_one()
6737 for (i = 0; i < bp->nr_vnics; i++) in bnxt_hwrm_vnic_free()
6738 bnxt_hwrm_vnic_free_one(bp, &bp->vnic_info[i]); in bnxt_hwrm_vnic_free()
6754 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_vnic_alloc()
6759 grp_idx = bp->rx_ring[i].bnapi->index; in bnxt_hwrm_vnic_alloc()
6760 if (bp->grp_info[grp_idx].fw_grp_id == INVALID_HW_RING_ID) { in bnxt_hwrm_vnic_alloc()
6761 netdev_err(bp->dev, "Not enough ring groups avail:%x req:%x\n", in bnxt_hwrm_vnic_alloc()
6765 vnic->fw_grp_ids[j] = bp->grp_info[grp_idx].fw_grp_id; in bnxt_hwrm_vnic_alloc()
6770 vnic->fw_rss_cos_lb_ctx[i] = INVALID_HW_RING_ID; in bnxt_hwrm_vnic_alloc()
6771 if (vnic->vnic_id == BNXT_VNIC_DEFAULT) in bnxt_hwrm_vnic_alloc()
6772 req->flags = cpu_to_le32(VNIC_ALLOC_REQ_FLAGS_DEFAULT); in bnxt_hwrm_vnic_alloc()
6777 vnic->fw_vnic_id = le32_to_cpu(resp->vnic_id); in bnxt_hwrm_vnic_alloc()
6788 bp->hw_ring_stats_size = sizeof(struct ctx_hw_stats); in bnxt_hwrm_vnic_qcaps()
6789 bp->flags &= ~BNXT_FLAG_ROCE_MIRROR_CAP; in bnxt_hwrm_vnic_qcaps()
6790 bp->rss_cap &= ~BNXT_RSS_CAP_NEW_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6791 if (bp->hwrm_spec_code < 0x10600) in bnxt_hwrm_vnic_qcaps()
6801 u32 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_vnic_qcaps()
6803 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_hwrm_vnic_qcaps()
6805 bp->rss_cap |= BNXT_RSS_CAP_NEW_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6808 bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP; in bnxt_hwrm_vnic_qcaps()
6815 !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED))) in bnxt_hwrm_vnic_qcaps()
6816 bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP; in bnxt_hwrm_vnic_qcaps()
6818 bp->rss_cap |= BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA; in bnxt_hwrm_vnic_qcaps()
6820 bp->rss_cap |= BNXT_RSS_CAP_RSS_TCAM; in bnxt_hwrm_vnic_qcaps()
6821 bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported); in bnxt_hwrm_vnic_qcaps()
6822 if (bp->max_tpa_v2) { in bnxt_hwrm_vnic_qcaps()
6824 bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P5; in bnxt_hwrm_vnic_qcaps()
6826 bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P7; in bnxt_hwrm_vnic_qcaps()
6829 bp->fw_cap |= BNXT_FW_CAP_VNIC_TUNNEL_TPA; in bnxt_hwrm_vnic_qcaps()
6831 bp->rss_cap |= BNXT_RSS_CAP_AH_V4_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6833 bp->rss_cap |= BNXT_RSS_CAP_AH_V6_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6835 bp->rss_cap |= BNXT_RSS_CAP_ESP_V4_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6837 bp->rss_cap |= BNXT_RSS_CAP_ESP_V6_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6839 bp->fw_cap |= BNXT_FW_CAP_VNIC_RE_FLUSH; in bnxt_hwrm_vnic_qcaps()
6852 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_ring_grp_alloc()
6860 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_grp_alloc()
6861 unsigned int grp_idx = bp->rx_ring[i].bnapi->index; in bnxt_hwrm_ring_grp_alloc()
6863 req->cr = cpu_to_le16(bp->grp_info[grp_idx].cp_fw_ring_id); in bnxt_hwrm_ring_grp_alloc()
6864 req->rr = cpu_to_le16(bp->grp_info[grp_idx].rx_fw_ring_id); in bnxt_hwrm_ring_grp_alloc()
6865 req->ar = cpu_to_le16(bp->grp_info[grp_idx].agg_fw_ring_id); in bnxt_hwrm_ring_grp_alloc()
6866 req->sc = cpu_to_le16(bp->grp_info[grp_idx].fw_stats_ctx); in bnxt_hwrm_ring_grp_alloc()
6873 bp->grp_info[grp_idx].fw_grp_id = in bnxt_hwrm_ring_grp_alloc()
6874 le32_to_cpu(resp->ring_group_id); in bnxt_hwrm_ring_grp_alloc()
6885 if (!bp->grp_info || (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_ring_grp_free()
6892 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_ring_grp_free()
6893 if (bp->grp_info[i].fw_grp_id == INVALID_HW_RING_ID) in bnxt_hwrm_ring_grp_free()
6895 req->ring_group_id = in bnxt_hwrm_ring_grp_free()
6896 cpu_to_le32(bp->grp_info[i].fw_grp_id); in bnxt_hwrm_ring_grp_free()
6899 bp->grp_info[i].fw_grp_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_grp_free()
6910 struct bnxt_ring_mem_info *rmem = &ring->ring_mem; in hwrm_ring_alloc_send_msg()
6919 req->enables = 0; in hwrm_ring_alloc_send_msg()
6920 if (rmem->nr_pages > 1) { in hwrm_ring_alloc_send_msg()
6921 req->page_tbl_addr = cpu_to_le64(rmem->pg_tbl_map); in hwrm_ring_alloc_send_msg()
6923 req->page_size = BNXT_PAGE_SHIFT; in hwrm_ring_alloc_send_msg()
6924 req->page_tbl_depth = 1; in hwrm_ring_alloc_send_msg()
6926 req->page_tbl_addr = cpu_to_le64(rmem->dma_arr[0]); in hwrm_ring_alloc_send_msg()
6928 req->fbo = 0; in hwrm_ring_alloc_send_msg()
6930 req->logical_id = cpu_to_le16(map_index); in hwrm_ring_alloc_send_msg()
6939 req->ring_type = RING_ALLOC_REQ_RING_TYPE_TX; in hwrm_ring_alloc_send_msg()
6941 grp_info = &bp->grp_info[ring->grp_idx]; in hwrm_ring_alloc_send_msg()
6942 req->cmpl_ring_id = cpu_to_le16(bnxt_cp_ring_for_tx(bp, txr)); in hwrm_ring_alloc_send_msg()
6943 req->length = cpu_to_le32(bp->tx_ring_mask + 1); in hwrm_ring_alloc_send_msg()
6944 req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); in hwrm_ring_alloc_send_msg()
6945 req->queue_id = cpu_to_le16(ring->queue_id); in hwrm_ring_alloc_send_msg()
6946 if (bp->flags & BNXT_FLAG_TX_COAL_CMPL) in hwrm_ring_alloc_send_msg()
6947 req->cmpl_coal_cnt = in hwrm_ring_alloc_send_msg()
6949 if ((bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP) && bp->ptp_cfg) in hwrm_ring_alloc_send_msg()
6951 req->flags = cpu_to_le16(flags); in hwrm_ring_alloc_send_msg()
6955 req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX; in hwrm_ring_alloc_send_msg()
6956 req->length = cpu_to_le32(bp->rx_ring_mask + 1); in hwrm_ring_alloc_send_msg()
6957 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in hwrm_ring_alloc_send_msg()
6961 grp_info = &bp->grp_info[ring->grp_idx]; in hwrm_ring_alloc_send_msg()
6962 req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size); in hwrm_ring_alloc_send_msg()
6963 req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); in hwrm_ring_alloc_send_msg()
6964 req->enables |= cpu_to_le32( in hwrm_ring_alloc_send_msg()
6968 req->flags = cpu_to_le16(flags); in hwrm_ring_alloc_send_msg()
6972 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in hwrm_ring_alloc_send_msg()
6973 req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG; in hwrm_ring_alloc_send_msg()
6975 grp_info = &bp->grp_info[ring->grp_idx]; in hwrm_ring_alloc_send_msg()
6976 req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id); in hwrm_ring_alloc_send_msg()
6977 req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE); in hwrm_ring_alloc_send_msg()
6978 req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); in hwrm_ring_alloc_send_msg()
6979 req->enables |= cpu_to_le32( in hwrm_ring_alloc_send_msg()
6983 req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX; in hwrm_ring_alloc_send_msg()
6985 req->length = cpu_to_le32(bp->rx_agg_ring_mask + 1); in hwrm_ring_alloc_send_msg()
6988 req->ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; in hwrm_ring_alloc_send_msg()
6989 req->length = cpu_to_le32(bp->cp_ring_mask + 1); in hwrm_ring_alloc_send_msg()
6990 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in hwrm_ring_alloc_send_msg()
6992 grp_info = &bp->grp_info[map_index]; in hwrm_ring_alloc_send_msg()
6993 req->nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id); in hwrm_ring_alloc_send_msg()
6994 req->cq_handle = cpu_to_le64(ring->handle); in hwrm_ring_alloc_send_msg()
6995 req->enables |= cpu_to_le32( in hwrm_ring_alloc_send_msg()
6998 req->int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; in hwrm_ring_alloc_send_msg()
7002 req->ring_type = RING_ALLOC_REQ_RING_TYPE_NQ; in hwrm_ring_alloc_send_msg()
7003 req->length = cpu_to_le32(bp->cp_ring_mask + 1); in hwrm_ring_alloc_send_msg()
7004 req->int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; in hwrm_ring_alloc_send_msg()
7007 netdev_err(bp->dev, "hwrm alloc invalid ring type %d\n", in hwrm_ring_alloc_send_msg()
7009 return -1; in hwrm_ring_alloc_send_msg()
7014 err = le16_to_cpu(resp->error_code); in hwrm_ring_alloc_send_msg()
7015 ring_id = le16_to_cpu(resp->ring_id); in hwrm_ring_alloc_send_msg()
7020 netdev_err(bp->dev, "hwrm_ring_alloc type %d failed. rc:%x err:%x\n", in hwrm_ring_alloc_send_msg()
7022 return -EIO; in hwrm_ring_alloc_send_msg()
7024 ring->fw_ring_id = ring_id; in hwrm_ring_alloc_send_msg()
7039 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_set_async_event_cr()
7040 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR); in bnxt_hwrm_set_async_event_cr()
7041 req->async_event_cr = cpu_to_le16(idx); in bnxt_hwrm_set_async_event_cr()
7050 req->enables = in bnxt_hwrm_set_async_event_cr()
7052 req->async_event_cr = cpu_to_le16(idx); in bnxt_hwrm_set_async_event_cr()
7062 db->db_ring_mask = bp->tx_ring_mask; in bnxt_set_db_mask()
7065 db->db_ring_mask = bp->rx_ring_mask; in bnxt_set_db_mask()
7068 db->db_ring_mask = bp->rx_agg_ring_mask; in bnxt_set_db_mask()
7072 db->db_ring_mask = bp->cp_ring_mask; in bnxt_set_db_mask()
7075 if (bp->flags & BNXT_FLAG_CHIP_P7) { in bnxt_set_db_mask()
7076 db->db_epoch_mask = db->db_ring_mask + 1; in bnxt_set_db_mask()
7077 db->db_epoch_shift = DBR_EPOCH_SFT - ilog2(db->db_epoch_mask); in bnxt_set_db_mask()
7084 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_set_db()
7087 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ; in bnxt_set_db()
7091 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ; in bnxt_set_db()
7094 db->db_key64 = DBR_PATH_L2; in bnxt_set_db()
7097 db->db_key64 = DBR_PATH_L2; in bnxt_set_db()
7100 db->db_key64 |= (u64)xid << DBR_XID_SFT; in bnxt_set_db()
7102 if (bp->flags & BNXT_FLAG_CHIP_P7) in bnxt_set_db()
7103 db->db_key64 |= DBR_VALID; in bnxt_set_db()
7105 db->doorbell = bp->bar1 + bp->db_offset; in bnxt_set_db()
7107 db->doorbell = bp->bar1 + map_idx * 0x80; in bnxt_set_db()
7110 db->db_key32 = DB_KEY_TX; in bnxt_set_db()
7114 db->db_key32 = DB_KEY_RX; in bnxt_set_db()
7117 db->db_key32 = DB_KEY_CP; in bnxt_set_db()
7127 struct bnxt_ring_struct *ring = &rxr->rx_ring_struct; in bnxt_hwrm_rx_ring_alloc()
7128 struct bnxt_napi *bnapi = rxr->bnapi; in bnxt_hwrm_rx_ring_alloc()
7130 u32 map_idx = bnapi->index; in bnxt_hwrm_rx_ring_alloc()
7137 bnxt_set_db(bp, &rxr->rx_db, type, map_idx, ring->fw_ring_id); in bnxt_hwrm_rx_ring_alloc()
7138 bp->grp_info[map_idx].rx_fw_ring_id = ring->fw_ring_id; in bnxt_hwrm_rx_ring_alloc()
7146 struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct; in bnxt_hwrm_rx_agg_ring_alloc()
7148 u32 grp_idx = ring->grp_idx; in bnxt_hwrm_rx_agg_ring_alloc()
7152 map_idx = grp_idx + bp->rx_nr_rings; in bnxt_hwrm_rx_agg_ring_alloc()
7157 bnxt_set_db(bp, &rxr->rx_agg_db, type, map_idx, in bnxt_hwrm_rx_agg_ring_alloc()
7158 ring->fw_ring_id); in bnxt_hwrm_rx_agg_ring_alloc()
7159 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_hwrm_rx_agg_ring_alloc()
7160 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_hwrm_rx_agg_ring_alloc()
7161 bp->grp_info[grp_idx].agg_fw_ring_id = ring->fw_ring_id; in bnxt_hwrm_rx_agg_ring_alloc()
7168 bool agg_rings = !!(bp->flags & BNXT_FLAG_AGG_RINGS); in bnxt_hwrm_ring_alloc()
7172 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_ring_alloc()
7176 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7177 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_ring_alloc()
7178 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_ring_alloc()
7179 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_hwrm_ring_alloc()
7180 u32 map_idx = ring->map_idx; in bnxt_hwrm_ring_alloc()
7183 vector = bp->irq_tbl[map_idx].vector; in bnxt_hwrm_ring_alloc()
7190 bnxt_set_db(bp, &cpr->cp_db, type, map_idx, ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7191 bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_hwrm_ring_alloc()
7193 bp->grp_info[i].cp_fw_ring_id = ring->fw_ring_id; in bnxt_hwrm_ring_alloc()
7196 rc = bnxt_hwrm_set_async_event_cr(bp, ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7198 netdev_warn(bp->dev, "Failed to set async event completion ring.\n"); in bnxt_hwrm_ring_alloc()
7203 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7204 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_hwrm_ring_alloc()
7208 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_ring_alloc()
7209 struct bnxt_cp_ring_info *cpr2 = txr->tx_cpr; in bnxt_hwrm_ring_alloc()
7210 struct bnxt_napi *bnapi = txr->bnapi; in bnxt_hwrm_ring_alloc()
7213 ring = &cpr2->cp_ring_struct; in bnxt_hwrm_ring_alloc()
7214 ring->handle = BNXT_SET_NQ_HDL(cpr2); in bnxt_hwrm_ring_alloc()
7215 map_idx = bnapi->index; in bnxt_hwrm_ring_alloc()
7219 bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx, in bnxt_hwrm_ring_alloc()
7220 ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7221 bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons); in bnxt_hwrm_ring_alloc()
7223 ring = &txr->tx_ring_struct; in bnxt_hwrm_ring_alloc()
7228 bnxt_set_db(bp, &txr->tx_db, type, map_idx, ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7231 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7232 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_hwrm_ring_alloc()
7239 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_hwrm_ring_alloc()
7240 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_ring_alloc()
7241 struct bnxt_cp_ring_info *cpr2 = rxr->rx_cpr; in bnxt_hwrm_ring_alloc()
7242 struct bnxt_napi *bnapi = rxr->bnapi; in bnxt_hwrm_ring_alloc()
7245 u32 map_idx = bnapi->index; in bnxt_hwrm_ring_alloc()
7247 ring = &cpr2->cp_ring_struct; in bnxt_hwrm_ring_alloc()
7248 ring->handle = BNXT_SET_NQ_HDL(cpr2); in bnxt_hwrm_ring_alloc()
7252 bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx, in bnxt_hwrm_ring_alloc()
7253 ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7254 bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons); in bnxt_hwrm_ring_alloc()
7259 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7260 rc = bnxt_hwrm_rx_agg_ring_alloc(bp, &bp->rx_ring[i]); in bnxt_hwrm_ring_alloc()
7285 req->cmpl_ring = cpu_to_le16(cmpl_ring_id); in hwrm_ring_free_send_msg()
7286 req->ring_type = ring_type; in hwrm_ring_free_send_msg()
7287 req->ring_id = cpu_to_le16(ring->fw_ring_id); in hwrm_ring_free_send_msg()
7291 error_code = le16_to_cpu(resp->error_code); in hwrm_ring_free_send_msg()
7295 netdev_err(bp->dev, "hwrm_ring_free type %d failed. rc:%x err:%x\n", in hwrm_ring_free_send_msg()
7297 return -EIO; in hwrm_ring_free_send_msg()
7306 struct bnxt_ring_struct *ring = &rxr->rx_ring_struct; in bnxt_hwrm_rx_ring_free()
7307 u32 grp_idx = rxr->bnapi->index; in bnxt_hwrm_rx_ring_free()
7310 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_rx_ring_free()
7318 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_ring_free()
7319 bp->grp_info[grp_idx].rx_fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_ring_free()
7326 struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct; in bnxt_hwrm_rx_agg_ring_free()
7327 u32 grp_idx = rxr->bnapi->index; in bnxt_hwrm_rx_agg_ring_free()
7330 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_rx_agg_ring_free()
7335 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_rx_agg_ring_free()
7342 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_agg_ring_free()
7343 bp->grp_info[grp_idx].agg_fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_agg_ring_free()
7351 if (!bp->bnapi) in bnxt_hwrm_ring_free()
7354 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_hwrm_ring_free()
7355 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_hwrm_ring_free()
7356 struct bnxt_ring_struct *ring = &txr->tx_ring_struct; in bnxt_hwrm_ring_free()
7358 if (ring->fw_ring_id != INVALID_HW_RING_ID) { in bnxt_hwrm_ring_free()
7365 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_free()
7369 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_free()
7370 bnxt_hwrm_rx_ring_free(bp, &bp->rx_ring[i], close_path); in bnxt_hwrm_ring_free()
7371 bnxt_hwrm_rx_agg_ring_free(bp, &bp->rx_ring[i], close_path); in bnxt_hwrm_ring_free()
7380 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_ring_free()
7384 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_ring_free()
7385 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_ring_free()
7386 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_ring_free()
7390 for (j = 0; j < cpr->cp_ring_count && cpr->cp_ring_arr; j++) { in bnxt_hwrm_ring_free()
7391 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_hwrm_ring_free()
7393 ring = &cpr2->cp_ring_struct; in bnxt_hwrm_ring_free()
7394 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_ring_free()
7399 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_free()
7401 ring = &cpr->cp_ring_struct; in bnxt_hwrm_ring_free()
7402 if (ring->fw_ring_id != INVALID_HW_RING_ID) { in bnxt_hwrm_ring_free()
7405 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_free()
7406 bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_free()
7418 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_hwrm_get_rings()
7423 if (bp->hwrm_spec_code < 0x10601) in bnxt_hwrm_get_rings()
7430 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_get_rings()
7438 hw_resc->resv_tx_rings = le16_to_cpu(resp->alloc_tx_rings); in bnxt_hwrm_get_rings()
7442 hw_resc->resv_rx_rings = le16_to_cpu(resp->alloc_rx_rings); in bnxt_hwrm_get_rings()
7443 hw_resc->resv_hw_ring_grps = in bnxt_hwrm_get_rings()
7444 le32_to_cpu(resp->alloc_hw_ring_grps); in bnxt_hwrm_get_rings()
7445 hw_resc->resv_vnics = le16_to_cpu(resp->alloc_vnics); in bnxt_hwrm_get_rings()
7446 hw_resc->resv_rsscos_ctxs = le16_to_cpu(resp->alloc_rsscos_ctx); in bnxt_hwrm_get_rings()
7447 cp = le16_to_cpu(resp->alloc_cmpl_rings); in bnxt_hwrm_get_rings()
7448 stats = le16_to_cpu(resp->alloc_stat_ctx); in bnxt_hwrm_get_rings()
7449 hw_resc->resv_irqs = cp; in bnxt_hwrm_get_rings()
7450 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_get_rings()
7451 int rx = hw_resc->resv_rx_rings; in bnxt_hwrm_get_rings()
7452 int tx = hw_resc->resv_tx_rings; in bnxt_hwrm_get_rings()
7454 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_hwrm_get_rings()
7460 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_hwrm_get_rings()
7462 hw_resc->resv_rx_rings = rx; in bnxt_hwrm_get_rings()
7463 hw_resc->resv_tx_rings = tx; in bnxt_hwrm_get_rings()
7465 hw_resc->resv_irqs = le16_to_cpu(resp->alloc_msix); in bnxt_hwrm_get_rings()
7466 hw_resc->resv_hw_ring_grps = rx; in bnxt_hwrm_get_rings()
7468 hw_resc->resv_cp_rings = cp; in bnxt_hwrm_get_rings()
7469 hw_resc->resv_stat_ctxs = stats; in bnxt_hwrm_get_rings()
7482 if (bp->hwrm_spec_code < 0x10601) in __bnxt_hwrm_get_tx_rings()
7489 req->fid = cpu_to_le16(fid); in __bnxt_hwrm_get_tx_rings()
7493 *tx_rings = le16_to_cpu(resp->alloc_tx_rings); in __bnxt_hwrm_get_tx_rings()
7510 req->fid = cpu_to_le16(0xffff); in __bnxt_hwrm_reserve_pf_rings()
7511 enables |= hwr->tx ? FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS : 0; in __bnxt_hwrm_reserve_pf_rings()
7512 req->num_tx_rings = cpu_to_le16(hwr->tx); in __bnxt_hwrm_reserve_pf_rings()
7514 enables |= hwr->rx ? FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS : 0; in __bnxt_hwrm_reserve_pf_rings()
7515 enables |= hwr->stat ? FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0; in __bnxt_hwrm_reserve_pf_rings()
7516 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_pf_rings()
7517 enables |= hwr->cp ? FUNC_CFG_REQ_ENABLES_NUM_MSIX : 0; in __bnxt_hwrm_reserve_pf_rings()
7518 enables |= hwr->cp_p5 ? in __bnxt_hwrm_reserve_pf_rings()
7521 enables |= hwr->cp ? in __bnxt_hwrm_reserve_pf_rings()
7523 enables |= hwr->grp ? in __bnxt_hwrm_reserve_pf_rings()
7526 enables |= hwr->vnic ? FUNC_CFG_REQ_ENABLES_NUM_VNICS : 0; in __bnxt_hwrm_reserve_pf_rings()
7527 enables |= hwr->rss_ctx ? FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS : in __bnxt_hwrm_reserve_pf_rings()
7529 req->num_rx_rings = cpu_to_le16(hwr->rx); in __bnxt_hwrm_reserve_pf_rings()
7530 req->num_rsscos_ctxs = cpu_to_le16(hwr->rss_ctx); in __bnxt_hwrm_reserve_pf_rings()
7531 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_pf_rings()
7532 req->num_cmpl_rings = cpu_to_le16(hwr->cp_p5); in __bnxt_hwrm_reserve_pf_rings()
7533 req->num_msix = cpu_to_le16(hwr->cp); in __bnxt_hwrm_reserve_pf_rings()
7535 req->num_cmpl_rings = cpu_to_le16(hwr->cp); in __bnxt_hwrm_reserve_pf_rings()
7536 req->num_hw_ring_grps = cpu_to_le16(hwr->grp); in __bnxt_hwrm_reserve_pf_rings()
7538 req->num_stat_ctxs = cpu_to_le16(hwr->stat); in __bnxt_hwrm_reserve_pf_rings()
7539 req->num_vnics = cpu_to_le16(hwr->vnic); in __bnxt_hwrm_reserve_pf_rings()
7541 req->enables = cpu_to_le32(enables); in __bnxt_hwrm_reserve_pf_rings()
7554 enables |= hwr->tx ? FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS : 0; in __bnxt_hwrm_reserve_vf_rings()
7555 enables |= hwr->rx ? FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS | in __bnxt_hwrm_reserve_vf_rings()
7557 enables |= hwr->stat ? FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0; in __bnxt_hwrm_reserve_vf_rings()
7558 enables |= hwr->rss_ctx ? FUNC_VF_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS : 0; in __bnxt_hwrm_reserve_vf_rings()
7559 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_vf_rings()
7560 enables |= hwr->cp_p5 ? in __bnxt_hwrm_reserve_vf_rings()
7563 enables |= hwr->cp ? FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS : 0; in __bnxt_hwrm_reserve_vf_rings()
7564 enables |= hwr->grp ? in __bnxt_hwrm_reserve_vf_rings()
7567 enables |= hwr->vnic ? FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS : 0; in __bnxt_hwrm_reserve_vf_rings()
7570 req->num_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX); in __bnxt_hwrm_reserve_vf_rings()
7571 req->num_tx_rings = cpu_to_le16(hwr->tx); in __bnxt_hwrm_reserve_vf_rings()
7572 req->num_rx_rings = cpu_to_le16(hwr->rx); in __bnxt_hwrm_reserve_vf_rings()
7573 req->num_rsscos_ctxs = cpu_to_le16(hwr->rss_ctx); in __bnxt_hwrm_reserve_vf_rings()
7574 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_vf_rings()
7575 req->num_cmpl_rings = cpu_to_le16(hwr->cp_p5); in __bnxt_hwrm_reserve_vf_rings()
7577 req->num_cmpl_rings = cpu_to_le16(hwr->cp); in __bnxt_hwrm_reserve_vf_rings()
7578 req->num_hw_ring_grps = cpu_to_le16(hwr->grp); in __bnxt_hwrm_reserve_vf_rings()
7580 req->num_stat_ctxs = cpu_to_le16(hwr->stat); in __bnxt_hwrm_reserve_vf_rings()
7581 req->num_vnics = cpu_to_le16(hwr->vnic); in __bnxt_hwrm_reserve_vf_rings()
7583 req->enables = cpu_to_le32(enables); in __bnxt_hwrm_reserve_vf_rings()
7595 return -ENOMEM; in bnxt_hwrm_reserve_pf_rings()
7597 if (!req->enables) { in bnxt_hwrm_reserve_pf_rings()
7606 if (bp->hwrm_spec_code < 0x10601) in bnxt_hwrm_reserve_pf_rings()
7607 bp->hw_resc.resv_tx_rings = hwr->tx; in bnxt_hwrm_reserve_pf_rings()
7619 bp->hw_resc.resv_tx_rings = hwr->tx; in bnxt_hwrm_reserve_vf_rings()
7625 return -ENOMEM; in bnxt_hwrm_reserve_vf_rings()
7644 return bp->cp_nr_rings + bnxt_get_ulp_msix_num(bp); in bnxt_nq_rings_in_use()
7651 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_cp_rings_in_use()
7654 cp = bp->tx_nr_rings + bp->rx_nr_rings; in bnxt_cp_rings_in_use()
7660 return bp->cp_nr_rings + bnxt_get_ulp_stat_ctxs(bp); in bnxt_get_func_stat_ctxs()
7665 if (!hwr->grp) in bnxt_get_total_rss_ctxs()
7667 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_get_total_rss_ctxs()
7668 int rss_ctx = bnxt_get_nr_rss_ctxs(bp, hwr->grp); in bnxt_get_total_rss_ctxs()
7671 rss_ctx *= hwr->vnic; in bnxt_get_total_rss_ctxs()
7676 if (!(bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) && bnxt_rfs_supported(bp)) in bnxt_get_total_rss_ctxs()
7677 return hwr->grp + 1; in bnxt_get_total_rss_ctxs()
7686 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_check_rss_tbl_no_rmgr()
7689 if (hw_resc->resv_rx_rings != bp->rx_nr_rings) { in bnxt_check_rss_tbl_no_rmgr()
7690 hw_resc->resv_rx_rings = bp->rx_nr_rings; in bnxt_check_rss_tbl_no_rmgr()
7691 if (!netif_is_rxfh_configured(bp->dev)) in bnxt_check_rss_tbl_no_rmgr()
7698 if (bp->flags & BNXT_FLAG_RFS) { in bnxt_get_total_vnics()
7700 return 2 + bp->num_rss_ctx; in bnxt_get_total_vnics()
7701 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_get_total_vnics()
7709 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_need_reserve_rings()
7712 int rx = bp->rx_nr_rings, stat; in bnxt_need_reserve_rings()
7723 if (hw_resc->resv_tx_rings != bp->tx_nr_rings && in bnxt_need_reserve_rings()
7724 bp->hwrm_spec_code >= 0x10601) in bnxt_need_reserve_rings()
7732 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_need_reserve_rings()
7735 if (hw_resc->resv_rx_rings != rx || hw_resc->resv_cp_rings != cp || in bnxt_need_reserve_rings()
7736 hw_resc->resv_vnics != vnic || hw_resc->resv_stat_ctxs != stat || in bnxt_need_reserve_rings()
7737 (hw_resc->resv_hw_ring_grps != grp && in bnxt_need_reserve_rings()
7738 !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))) in bnxt_need_reserve_rings()
7740 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && BNXT_PF(bp) && in bnxt_need_reserve_rings()
7741 hw_resc->resv_irqs != nq) in bnxt_need_reserve_rings()
7748 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_copy_reserved_rings()
7750 hwr->tx = hw_resc->resv_tx_rings; in bnxt_copy_reserved_rings()
7752 hwr->rx = hw_resc->resv_rx_rings; in bnxt_copy_reserved_rings()
7753 hwr->cp = hw_resc->resv_irqs; in bnxt_copy_reserved_rings()
7754 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_copy_reserved_rings()
7755 hwr->cp_p5 = hw_resc->resv_cp_rings; in bnxt_copy_reserved_rings()
7756 hwr->grp = hw_resc->resv_hw_ring_grps; in bnxt_copy_reserved_rings()
7757 hwr->vnic = hw_resc->resv_vnics; in bnxt_copy_reserved_rings()
7758 hwr->stat = hw_resc->resv_stat_ctxs; in bnxt_copy_reserved_rings()
7759 hwr->rss_ctx = hw_resc->resv_rsscos_ctxs; in bnxt_copy_reserved_rings()
7765 return hwr->tx && hwr->rx && hwr->cp && hwr->grp && hwr->vnic && in bnxt_rings_ok()
7766 hwr->stat && (hwr->cp_p5 || !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)); in bnxt_rings_ok()
7775 int cp = bp->cp_nr_rings; in __bnxt_reserve_rings()
7783 if (BNXT_NEW_RM(bp) && !bnxt_ulp_registered(bp->edev)) { in __bnxt_reserve_rings()
7784 ulp_msix = bnxt_get_avail_msix(bp, bp->ulp_num_msix_want); in __bnxt_reserve_rings()
7788 if (ulp_msix > bp->ulp_num_msix_want) in __bnxt_reserve_rings()
7789 ulp_msix = bp->ulp_num_msix_want; in __bnxt_reserve_rings()
7795 hwr.tx = bp->tx_nr_rings; in __bnxt_reserve_rings()
7796 hwr.rx = bp->rx_nr_rings; in __bnxt_reserve_rings()
7797 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in __bnxt_reserve_rings()
7799 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in __bnxt_reserve_rings()
7804 if (bp->flags & BNXT_FLAG_AGG_RINGS) in __bnxt_reserve_rings()
7806 hwr.grp = bp->rx_nr_rings; in __bnxt_reserve_rings()
7809 old_rx_rings = bp->hw_resc.resv_rx_rings; in __bnxt_reserve_rings()
7818 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in __bnxt_reserve_rings()
7822 if (netif_running(bp->dev)) in __bnxt_reserve_rings()
7823 return -ENOMEM; in __bnxt_reserve_rings()
7825 bp->flags &= ~BNXT_FLAG_AGG_RINGS; in __bnxt_reserve_rings()
7826 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; in __bnxt_reserve_rings()
7827 bp->dev->hw_features &= ~NETIF_F_LRO; in __bnxt_reserve_rings()
7828 bp->dev->features &= ~NETIF_F_LRO; in __bnxt_reserve_rings()
7833 hwr.cp = min_t(int, hwr.cp, bp->cp_nr_rings); in __bnxt_reserve_rings()
7835 hwr.stat -= bnxt_get_ulp_stat_ctxs(bp); in __bnxt_reserve_rings()
7838 if (bp->flags & BNXT_FLAG_AGG_RINGS) in __bnxt_reserve_rings()
7842 bp->tx_nr_rings = hwr.tx; in __bnxt_reserve_rings()
7847 if (rx_rings != bp->rx_nr_rings) { in __bnxt_reserve_rings()
7848 netdev_warn(bp->dev, "Able to reserve only %d out of %d requested RX rings\n", in __bnxt_reserve_rings()
7849 rx_rings, bp->rx_nr_rings); in __bnxt_reserve_rings()
7850 if (netif_is_rxfh_configured(bp->dev) && in __bnxt_reserve_rings()
7851 (bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) != in __bnxt_reserve_rings()
7854 netdev_warn(bp->dev, "RSS table entries reverting to default\n"); in __bnxt_reserve_rings()
7855 bp->dev->priv_flags &= ~IFF_RXFH_CONFIGURED; in __bnxt_reserve_rings()
7858 bp->rx_nr_rings = rx_rings; in __bnxt_reserve_rings()
7859 bp->cp_nr_rings = hwr.cp; in __bnxt_reserve_rings()
7862 return -ENOMEM; in __bnxt_reserve_rings()
7864 if (old_rx_rings != bp->hw_resc.resv_rx_rings && in __bnxt_reserve_rings()
7865 !netif_is_rxfh_configured(bp->dev)) in __bnxt_reserve_rings()
7868 if (!bnxt_ulp_registered(bp->edev) && BNXT_NEW_RM(bp)) { in __bnxt_reserve_rings()
7872 hw_resc = &bp->hw_resc; in __bnxt_reserve_rings()
7873 resv_msix = hw_resc->resv_irqs - bp->cp_nr_rings; in __bnxt_reserve_rings()
7876 resv_ctx = hw_resc->resv_stat_ctxs - bp->cp_nr_rings; in __bnxt_reserve_rings()
7899 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_check_vf_rings()
7902 req->flags = cpu_to_le32(flags); in bnxt_hwrm_check_vf_rings()
7918 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_check_pf_rings()
7925 req->flags = cpu_to_le32(flags); in bnxt_hwrm_check_pf_rings()
7931 if (bp->hwrm_spec_code < 0x10801) in bnxt_hwrm_check_rings()
7942 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_hwrm_coal_params_qcaps()
7947 coal_cap->cmpl_params = BNXT_LEGACY_COAL_CMPL_PARAMS; in bnxt_hwrm_coal_params_qcaps()
7948 coal_cap->num_cmpl_dma_aggr_max = 63; in bnxt_hwrm_coal_params_qcaps()
7949 coal_cap->num_cmpl_dma_aggr_during_int_max = 63; in bnxt_hwrm_coal_params_qcaps()
7950 coal_cap->cmpl_aggr_dma_tmr_max = 65535; in bnxt_hwrm_coal_params_qcaps()
7951 coal_cap->cmpl_aggr_dma_tmr_during_int_max = 65535; in bnxt_hwrm_coal_params_qcaps()
7952 coal_cap->int_lat_tmr_min_max = 65535; in bnxt_hwrm_coal_params_qcaps()
7953 coal_cap->int_lat_tmr_max_max = 65535; in bnxt_hwrm_coal_params_qcaps()
7954 coal_cap->num_cmpl_aggr_int_max = 65535; in bnxt_hwrm_coal_params_qcaps()
7955 coal_cap->timer_units = 80; in bnxt_hwrm_coal_params_qcaps()
7957 if (bp->hwrm_spec_code < 0x10902) in bnxt_hwrm_coal_params_qcaps()
7966 coal_cap->cmpl_params = le32_to_cpu(resp->cmpl_params); in bnxt_hwrm_coal_params_qcaps()
7967 coal_cap->nq_params = le32_to_cpu(resp->nq_params); in bnxt_hwrm_coal_params_qcaps()
7968 coal_cap->num_cmpl_dma_aggr_max = in bnxt_hwrm_coal_params_qcaps()
7969 le16_to_cpu(resp->num_cmpl_dma_aggr_max); in bnxt_hwrm_coal_params_qcaps()
7970 coal_cap->num_cmpl_dma_aggr_during_int_max = in bnxt_hwrm_coal_params_qcaps()
7971 le16_to_cpu(resp->num_cmpl_dma_aggr_during_int_max); in bnxt_hwrm_coal_params_qcaps()
7972 coal_cap->cmpl_aggr_dma_tmr_max = in bnxt_hwrm_coal_params_qcaps()
7973 le16_to_cpu(resp->cmpl_aggr_dma_tmr_max); in bnxt_hwrm_coal_params_qcaps()
7974 coal_cap->cmpl_aggr_dma_tmr_during_int_max = in bnxt_hwrm_coal_params_qcaps()
7975 le16_to_cpu(resp->cmpl_aggr_dma_tmr_during_int_max); in bnxt_hwrm_coal_params_qcaps()
7976 coal_cap->int_lat_tmr_min_max = in bnxt_hwrm_coal_params_qcaps()
7977 le16_to_cpu(resp->int_lat_tmr_min_max); in bnxt_hwrm_coal_params_qcaps()
7978 coal_cap->int_lat_tmr_max_max = in bnxt_hwrm_coal_params_qcaps()
7979 le16_to_cpu(resp->int_lat_tmr_max_max); in bnxt_hwrm_coal_params_qcaps()
7980 coal_cap->num_cmpl_aggr_int_max = in bnxt_hwrm_coal_params_qcaps()
7981 le16_to_cpu(resp->num_cmpl_aggr_int_max); in bnxt_hwrm_coal_params_qcaps()
7982 coal_cap->timer_units = le16_to_cpu(resp->timer_units); in bnxt_hwrm_coal_params_qcaps()
7989 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_usec_to_coal_tmr()
7991 return usec * 1000 / coal_cap->timer_units; in bnxt_usec_to_coal_tmr()
7998 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_hwrm_set_coal_params()
7999 u16 val, tmr, max, flags = hw_coal->flags; in bnxt_hwrm_set_coal_params()
8000 u32 cmpl_params = coal_cap->cmpl_params; in bnxt_hwrm_set_coal_params()
8002 max = hw_coal->bufs_per_record * 128; in bnxt_hwrm_set_coal_params()
8003 if (hw_coal->budget) in bnxt_hwrm_set_coal_params()
8004 max = hw_coal->bufs_per_record * hw_coal->budget; in bnxt_hwrm_set_coal_params()
8005 max = min_t(u16, max, coal_cap->num_cmpl_aggr_int_max); in bnxt_hwrm_set_coal_params()
8007 val = clamp_t(u16, hw_coal->coal_bufs, 1, max); in bnxt_hwrm_set_coal_params()
8008 req->num_cmpl_aggr_int = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8010 val = min_t(u16, val, coal_cap->num_cmpl_dma_aggr_max); in bnxt_hwrm_set_coal_params()
8011 req->num_cmpl_dma_aggr = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8013 val = clamp_t(u16, hw_coal->coal_bufs_irq, 1, in bnxt_hwrm_set_coal_params()
8014 coal_cap->num_cmpl_dma_aggr_during_int_max); in bnxt_hwrm_set_coal_params()
8015 req->num_cmpl_dma_aggr_during_int = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8017 tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks); in bnxt_hwrm_set_coal_params()
8018 tmr = clamp_t(u16, tmr, 1, coal_cap->int_lat_tmr_max_max); in bnxt_hwrm_set_coal_params()
8019 req->int_lat_tmr_max = cpu_to_le16(tmr); in bnxt_hwrm_set_coal_params()
8024 val = clamp_t(u16, val, 1, coal_cap->int_lat_tmr_min_max); in bnxt_hwrm_set_coal_params()
8025 req->int_lat_tmr_min = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8026 req->enables |= cpu_to_le16(BNXT_COAL_CMPL_MIN_TMR_ENABLE); in bnxt_hwrm_set_coal_params()
8030 val = clamp_t(u16, tmr / 4, 1, coal_cap->cmpl_aggr_dma_tmr_max); in bnxt_hwrm_set_coal_params()
8031 req->cmpl_aggr_dma_tmr = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8035 tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks_irq); in bnxt_hwrm_set_coal_params()
8037 coal_cap->cmpl_aggr_dma_tmr_during_int_max); in bnxt_hwrm_set_coal_params()
8038 req->cmpl_aggr_dma_tmr_during_int = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8039 req->enables |= in bnxt_hwrm_set_coal_params()
8044 hw_coal->idle_thresh && hw_coal->coal_ticks < hw_coal->idle_thresh) in bnxt_hwrm_set_coal_params()
8046 req->flags = cpu_to_le16(flags); in bnxt_hwrm_set_coal_params()
8047 req->enables |= cpu_to_le16(BNXT_COAL_CMPL_ENABLES); in bnxt_hwrm_set_coal_params()
8054 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in __bnxt_hwrm_set_coal_nq()
8055 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in __bnxt_hwrm_set_coal_nq()
8056 u32 nq_params = coal_cap->nq_params; in __bnxt_hwrm_set_coal_nq()
8067 req->ring_id = cpu_to_le16(cpr->cp_ring_struct.fw_ring_id); in __bnxt_hwrm_set_coal_nq()
8068 req->flags = in __bnxt_hwrm_set_coal_nq()
8071 tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks) / 2; in __bnxt_hwrm_set_coal_nq()
8072 tmr = clamp_t(u16, tmr, 1, coal_cap->int_lat_tmr_min_max); in __bnxt_hwrm_set_coal_nq()
8073 req->int_lat_tmr_min = cpu_to_le16(tmr); in __bnxt_hwrm_set_coal_nq()
8074 req->enables |= cpu_to_le16(BNXT_COAL_CMPL_MIN_TMR_ENABLE); in __bnxt_hwrm_set_coal_nq()
8081 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_set_ring_coal()
8086 * 1 coal_buf x bufs_per_record = 1 completion record. in bnxt_hwrm_set_ring_coal()
8088 memcpy(&coal, &bp->rx_coal, sizeof(struct bnxt_coal)); in bnxt_hwrm_set_ring_coal()
8090 coal.coal_ticks = cpr->rx_ring_coal.coal_ticks; in bnxt_hwrm_set_ring_coal()
8091 coal.coal_bufs = cpr->rx_ring_coal.coal_bufs; in bnxt_hwrm_set_ring_coal()
8093 if (!bnapi->rx_ring) in bnxt_hwrm_set_ring_coal()
8094 return -ENODEV; in bnxt_hwrm_set_ring_coal()
8102 req_rx->ring_id = cpu_to_le16(bnxt_cp_ring_for_rx(bp, bnapi->rx_ring)); in bnxt_hwrm_set_ring_coal()
8111 u16 ring_id = bnxt_cp_ring_for_rx(bp, bnapi->rx_ring); in bnxt_hwrm_set_rx_coal()
8113 req->ring_id = cpu_to_le16(ring_id); in bnxt_hwrm_set_rx_coal()
8128 req->ring_id = cpu_to_le16(ring_id); in bnxt_hwrm_set_tx_coal()
8132 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_set_tx_coal()
8153 bnxt_hwrm_set_coal_params(bp, &bp->rx_coal, req_rx); in bnxt_hwrm_set_coal()
8154 bnxt_hwrm_set_coal_params(bp, &bp->tx_coal, req_tx); in bnxt_hwrm_set_coal()
8158 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_set_coal()
8159 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_set_coal()
8162 if (!bnapi->rx_ring) in bnxt_hwrm_set_coal()
8169 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_set_coal()
8172 if (bnapi->rx_ring && bnapi->tx_ring[0]) { in bnxt_hwrm_set_coal()
8177 if (bnapi->rx_ring) in bnxt_hwrm_set_coal()
8178 hw_coal = &bp->rx_coal; in bnxt_hwrm_set_coal()
8180 hw_coal = &bp->tx_coal; in bnxt_hwrm_set_coal()
8194 if (!bp->bnapi) in bnxt_hwrm_stat_ctx_free()
8210 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_stat_ctx_free()
8211 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_stat_ctx_free()
8212 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_stat_ctx_free()
8214 if (cpr->hw_stats_ctx_id != INVALID_STATS_CTX_ID) { in bnxt_hwrm_stat_ctx_free()
8215 req->stat_ctx_id = cpu_to_le32(cpr->hw_stats_ctx_id); in bnxt_hwrm_stat_ctx_free()
8217 req0->stat_ctx_id = req->stat_ctx_id; in bnxt_hwrm_stat_ctx_free()
8222 cpr->hw_stats_ctx_id = INVALID_STATS_CTX_ID; in bnxt_hwrm_stat_ctx_free()
8243 req->stats_dma_length = cpu_to_le16(bp->hw_ring_stats_size); in bnxt_hwrm_stat_ctx_alloc()
8244 req->update_period_ms = cpu_to_le32(bp->stats_coal_ticks / 1000); in bnxt_hwrm_stat_ctx_alloc()
8247 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_stat_ctx_alloc()
8248 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_stat_ctx_alloc()
8249 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_stat_ctx_alloc()
8251 req->stats_dma_addr = cpu_to_le64(cpr->stats.hw_stats_map); in bnxt_hwrm_stat_ctx_alloc()
8257 cpr->hw_stats_ctx_id = le32_to_cpu(resp->stat_ctx_id); in bnxt_hwrm_stat_ctx_alloc()
8259 bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id; in bnxt_hwrm_stat_ctx_alloc()
8276 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_func_qcfg()
8284 struct bnxt_vf_info *vf = &bp->vf; in bnxt_hwrm_func_qcfg()
8286 vf->vlan = le16_to_cpu(resp->vlan) & VLAN_VID_MASK; in bnxt_hwrm_func_qcfg()
8288 bp->pf.registered_vfs = le16_to_cpu(resp->registered_vfs); in bnxt_hwrm_func_qcfg()
8291 flags = le16_to_cpu(resp->flags); in bnxt_hwrm_func_qcfg()
8294 bp->fw_cap |= BNXT_FW_CAP_LLDP_AGENT; in bnxt_hwrm_func_qcfg()
8296 bp->fw_cap |= BNXT_FW_CAP_DCBX_AGENT; in bnxt_hwrm_func_qcfg()
8299 bp->flags |= BNXT_FLAG_MULTI_HOST; in bnxt_hwrm_func_qcfg()
8302 bp->fw_cap |= BNXT_FW_CAP_RING_MONITOR; in bnxt_hwrm_func_qcfg()
8305 bp->fw_cap |= BNXT_FW_CAP_ENABLE_RDMA_SRIOV; in bnxt_hwrm_func_qcfg()
8307 switch (resp->port_partition_type) { in bnxt_hwrm_func_qcfg()
8311 bp->port_partition_type = resp->port_partition_type; in bnxt_hwrm_func_qcfg()
8314 if (bp->hwrm_spec_code < 0x10707 || in bnxt_hwrm_func_qcfg()
8315 resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEB) in bnxt_hwrm_func_qcfg()
8316 bp->br_mode = BRIDGE_MODE_VEB; in bnxt_hwrm_func_qcfg()
8317 else if (resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEPA) in bnxt_hwrm_func_qcfg()
8318 bp->br_mode = BRIDGE_MODE_VEPA; in bnxt_hwrm_func_qcfg()
8320 bp->br_mode = BRIDGE_MODE_UNDEF; in bnxt_hwrm_func_qcfg()
8322 bp->max_mtu = le16_to_cpu(resp->max_mtu_configured); in bnxt_hwrm_func_qcfg()
8323 if (!bp->max_mtu) in bnxt_hwrm_func_qcfg()
8324 bp->max_mtu = BNXT_MAX_MTU; in bnxt_hwrm_func_qcfg()
8326 if (bp->db_size) in bnxt_hwrm_func_qcfg()
8329 bp->db_offset = le16_to_cpu(resp->legacy_l2_db_size_kb) * 1024; in bnxt_hwrm_func_qcfg()
8332 bp->db_offset = DB_PF_OFFSET_P5; in bnxt_hwrm_func_qcfg()
8334 bp->db_offset = DB_VF_OFFSET_P5; in bnxt_hwrm_func_qcfg()
8336 bp->db_size = PAGE_ALIGN(le16_to_cpu(resp->l2_doorbell_bar_size_kb) * in bnxt_hwrm_func_qcfg()
8338 if (!bp->db_size || bp->db_size > pci_resource_len(bp->pdev, 2) || in bnxt_hwrm_func_qcfg()
8339 bp->db_size <= bp->db_offset) in bnxt_hwrm_func_qcfg()
8340 bp->db_size = pci_resource_len(bp->pdev, 2); in bnxt_hwrm_func_qcfg()
8351 ctxm->init_value = init_val; in bnxt_init_ctx_initializer()
8352 ctxm->init_offset = BNXT_CTX_INIT_INVALID_OFFSET; in bnxt_init_ctx_initializer()
8354 ctxm->init_offset = init_offset * 4; in bnxt_init_ctx_initializer()
8356 ctxm->init_value = 0; in bnxt_init_ctx_initializer()
8361 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_alloc_all_ctx_pg_info()
8365 struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type]; in bnxt_alloc_all_ctx_pg_info()
8368 if (!ctxm->max_entries || ctxm->pg_info) in bnxt_alloc_all_ctx_pg_info()
8371 if (ctxm->instance_bmap) in bnxt_alloc_all_ctx_pg_info()
8372 n = hweight32(ctxm->instance_bmap); in bnxt_alloc_all_ctx_pg_info()
8373 ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_KERNEL); in bnxt_alloc_all_ctx_pg_info()
8374 if (!ctxm->pg_info) in bnxt_alloc_all_ctx_pg_info()
8375 return -ENOMEM; in bnxt_alloc_all_ctx_pg_info()
8391 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_hwrm_func_backing_store_qcaps_v2()
8402 return -ENOMEM; in bnxt_hwrm_func_backing_store_qcaps_v2()
8403 bp->ctx = ctx; in bnxt_hwrm_func_backing_store_qcaps_v2()
8409 struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type]; in bnxt_hwrm_func_backing_store_qcaps_v2()
8416 req->type = cpu_to_le16(type); in bnxt_hwrm_func_backing_store_qcaps_v2()
8420 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_func_backing_store_qcaps_v2()
8421 type = le16_to_cpu(resp->next_valid_type); in bnxt_hwrm_func_backing_store_qcaps_v2()
8426 entry_size = le16_to_cpu(resp->entry_size); in bnxt_hwrm_func_backing_store_qcaps_v2()
8427 max_entries = le32_to_cpu(resp->max_num_entries); in bnxt_hwrm_func_backing_store_qcaps_v2()
8428 if (ctxm->mem_valid) { in bnxt_hwrm_func_backing_store_qcaps_v2()
8430 ctxm->entry_size != entry_size || in bnxt_hwrm_func_backing_store_qcaps_v2()
8431 ctxm->max_entries != max_entries) in bnxt_hwrm_func_backing_store_qcaps_v2()
8436 ctxm->type = le16_to_cpu(resp->type); in bnxt_hwrm_func_backing_store_qcaps_v2()
8437 ctxm->entry_size = entry_size; in bnxt_hwrm_func_backing_store_qcaps_v2()
8438 ctxm->flags = flags; in bnxt_hwrm_func_backing_store_qcaps_v2()
8439 ctxm->instance_bmap = le32_to_cpu(resp->instance_bit_map); in bnxt_hwrm_func_backing_store_qcaps_v2()
8440 ctxm->entry_multiple = resp->entry_multiple; in bnxt_hwrm_func_backing_store_qcaps_v2()
8441 ctxm->max_entries = max_entries; in bnxt_hwrm_func_backing_store_qcaps_v2()
8442 ctxm->min_entries = le32_to_cpu(resp->min_num_entries); in bnxt_hwrm_func_backing_store_qcaps_v2()
8443 init_val = resp->ctx_init_value; in bnxt_hwrm_func_backing_store_qcaps_v2()
8444 init_off = resp->ctx_init_offset; in bnxt_hwrm_func_backing_store_qcaps_v2()
8447 ctxm->split_entry_cnt = min_t(u8, resp->subtype_valid_cnt, in bnxt_hwrm_func_backing_store_qcaps_v2()
8449 for (i = 0, p = &resp->split_entry_0; i < ctxm->split_entry_cnt; in bnxt_hwrm_func_backing_store_qcaps_v2()
8451 ctxm->split[i] = le32_to_cpu(*p); in bnxt_hwrm_func_backing_store_qcaps_v2()
8466 if (bp->hwrm_spec_code < 0x10902 || BNXT_VF(bp) || in bnxt_hwrm_func_backing_store_qcaps()
8467 (bp->ctx && bp->ctx->flags & BNXT_CTX_FLAG_INITED)) in bnxt_hwrm_func_backing_store_qcaps()
8470 if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2) in bnxt_hwrm_func_backing_store_qcaps()
8485 ctx = bp->ctx; in bnxt_hwrm_func_backing_store_qcaps()
8489 rc = -ENOMEM; in bnxt_hwrm_func_backing_store_qcaps()
8492 bp->ctx = ctx; in bnxt_hwrm_func_backing_store_qcaps()
8494 init_val = resp->ctx_kind_initializer; in bnxt_hwrm_func_backing_store_qcaps()
8495 init_mask = le16_to_cpu(resp->ctx_init_mask); in bnxt_hwrm_func_backing_store_qcaps()
8497 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_hwrm_func_backing_store_qcaps()
8498 ctxm->max_entries = le32_to_cpu(resp->qp_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8499 ctxm->qp_qp1_entries = le16_to_cpu(resp->qp_min_qp1_entries); in bnxt_hwrm_func_backing_store_qcaps()
8500 ctxm->qp_l2_entries = le16_to_cpu(resp->qp_max_l2_entries); in bnxt_hwrm_func_backing_store_qcaps()
8501 ctxm->qp_fast_qpmd_entries = le16_to_cpu(resp->fast_qpmd_qp_num_entries); in bnxt_hwrm_func_backing_store_qcaps()
8502 ctxm->entry_size = le16_to_cpu(resp->qp_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8503 bnxt_init_ctx_initializer(ctxm, init_val, resp->qp_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8506 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_hwrm_func_backing_store_qcaps()
8507 ctxm->srq_l2_entries = le16_to_cpu(resp->srq_max_l2_entries); in bnxt_hwrm_func_backing_store_qcaps()
8508 ctxm->max_entries = le32_to_cpu(resp->srq_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8509 ctxm->entry_size = le16_to_cpu(resp->srq_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8510 bnxt_init_ctx_initializer(ctxm, init_val, resp->srq_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8513 ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; in bnxt_hwrm_func_backing_store_qcaps()
8514 ctxm->cq_l2_entries = le16_to_cpu(resp->cq_max_l2_entries); in bnxt_hwrm_func_backing_store_qcaps()
8515 ctxm->max_entries = le32_to_cpu(resp->cq_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8516 ctxm->entry_size = le16_to_cpu(resp->cq_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8517 bnxt_init_ctx_initializer(ctxm, init_val, resp->cq_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8520 ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; in bnxt_hwrm_func_backing_store_qcaps()
8521 ctxm->vnic_entries = le16_to_cpu(resp->vnic_max_vnic_entries); in bnxt_hwrm_func_backing_store_qcaps()
8522 ctxm->max_entries = ctxm->vnic_entries + in bnxt_hwrm_func_backing_store_qcaps()
8523 le16_to_cpu(resp->vnic_max_ring_table_entries); in bnxt_hwrm_func_backing_store_qcaps()
8524 ctxm->entry_size = le16_to_cpu(resp->vnic_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8526 resp->vnic_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8529 ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; in bnxt_hwrm_func_backing_store_qcaps()
8530 ctxm->max_entries = le32_to_cpu(resp->stat_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8531 ctxm->entry_size = le16_to_cpu(resp->stat_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8533 resp->stat_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8536 ctxm = &ctx->ctx_arr[BNXT_CTX_STQM]; in bnxt_hwrm_func_backing_store_qcaps()
8537 ctxm->entry_size = le16_to_cpu(resp->tqm_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8538 ctxm->min_entries = le32_to_cpu(resp->tqm_min_entries_per_ring); in bnxt_hwrm_func_backing_store_qcaps()
8539 ctxm->max_entries = le32_to_cpu(resp->tqm_max_entries_per_ring); in bnxt_hwrm_func_backing_store_qcaps()
8540 ctxm->entry_multiple = resp->tqm_entries_multiple; in bnxt_hwrm_func_backing_store_qcaps()
8541 if (!ctxm->entry_multiple) in bnxt_hwrm_func_backing_store_qcaps()
8542 ctxm->entry_multiple = 1; in bnxt_hwrm_func_backing_store_qcaps()
8544 memcpy(&ctx->ctx_arr[BNXT_CTX_FTQM], ctxm, sizeof(*ctxm)); in bnxt_hwrm_func_backing_store_qcaps()
8546 ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; in bnxt_hwrm_func_backing_store_qcaps()
8547 ctxm->max_entries = le32_to_cpu(resp->mrav_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8548 ctxm->entry_size = le16_to_cpu(resp->mrav_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8549 ctxm->mrav_num_entries_units = in bnxt_hwrm_func_backing_store_qcaps()
8550 le16_to_cpu(resp->mrav_num_entries_units); in bnxt_hwrm_func_backing_store_qcaps()
8552 resp->mrav_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8555 ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; in bnxt_hwrm_func_backing_store_qcaps()
8556 ctxm->entry_size = le16_to_cpu(resp->tim_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8557 ctxm->max_entries = le32_to_cpu(resp->tim_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8559 ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count; in bnxt_hwrm_func_backing_store_qcaps()
8560 if (!ctx->tqm_fp_rings_count) in bnxt_hwrm_func_backing_store_qcaps()
8561 ctx->tqm_fp_rings_count = bp->max_q; in bnxt_hwrm_func_backing_store_qcaps()
8562 else if (ctx->tqm_fp_rings_count > BNXT_MAX_TQM_FP_RINGS) in bnxt_hwrm_func_backing_store_qcaps()
8563 ctx->tqm_fp_rings_count = BNXT_MAX_TQM_FP_RINGS; in bnxt_hwrm_func_backing_store_qcaps()
8565 ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM]; in bnxt_hwrm_func_backing_store_qcaps()
8566 memcpy(ctxm, &ctx->ctx_arr[BNXT_CTX_STQM], sizeof(*ctxm)); in bnxt_hwrm_func_backing_store_qcaps()
8567 ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1; in bnxt_hwrm_func_backing_store_qcaps()
8581 if (!rmem->nr_pages) in bnxt_hwrm_set_pg_attr()
8585 if (rmem->depth >= 1) { in bnxt_hwrm_set_pg_attr()
8586 if (rmem->depth == 2) in bnxt_hwrm_set_pg_attr()
8590 *pg_dir = cpu_to_le64(rmem->pg_tbl_map); in bnxt_hwrm_set_pg_attr()
8592 *pg_dir = cpu_to_le64(rmem->dma_arr[0]); in bnxt_hwrm_set_pg_attr()
8606 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_hwrm_func_backing_store_cfg()
8622 if (req_len > bp->hwrm_max_ext_req_len) in bnxt_hwrm_func_backing_store_cfg()
8628 req->enables = cpu_to_le32(enables); in bnxt_hwrm_func_backing_store_cfg()
8630 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_hwrm_func_backing_store_cfg()
8631 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8632 req->qp_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8633 req->qp_num_qp1_entries = cpu_to_le16(ctxm->qp_qp1_entries); in bnxt_hwrm_func_backing_store_cfg()
8634 req->qp_num_l2_entries = cpu_to_le16(ctxm->qp_l2_entries); in bnxt_hwrm_func_backing_store_cfg()
8635 req->qp_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8636 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8637 &req->qpc_pg_size_qpc_lvl, in bnxt_hwrm_func_backing_store_cfg()
8638 &req->qpc_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8641 req->qp_num_fast_qpmd_entries = cpu_to_le16(ctxm->qp_fast_qpmd_entries); in bnxt_hwrm_func_backing_store_cfg()
8644 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_hwrm_func_backing_store_cfg()
8645 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8646 req->srq_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8647 req->srq_num_l2_entries = cpu_to_le16(ctxm->srq_l2_entries); in bnxt_hwrm_func_backing_store_cfg()
8648 req->srq_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8649 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8650 &req->srq_pg_size_srq_lvl, in bnxt_hwrm_func_backing_store_cfg()
8651 &req->srq_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8654 ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; in bnxt_hwrm_func_backing_store_cfg()
8655 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8656 req->cq_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8657 req->cq_num_l2_entries = cpu_to_le16(ctxm->cq_l2_entries); in bnxt_hwrm_func_backing_store_cfg()
8658 req->cq_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8659 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8660 &req->cq_pg_size_cq_lvl, in bnxt_hwrm_func_backing_store_cfg()
8661 &req->cq_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8664 ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; in bnxt_hwrm_func_backing_store_cfg()
8665 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8666 req->vnic_num_vnic_entries = cpu_to_le16(ctxm->vnic_entries); in bnxt_hwrm_func_backing_store_cfg()
8667 req->vnic_num_ring_table_entries = in bnxt_hwrm_func_backing_store_cfg()
8668 cpu_to_le16(ctxm->max_entries - ctxm->vnic_entries); in bnxt_hwrm_func_backing_store_cfg()
8669 req->vnic_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8670 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8671 &req->vnic_pg_size_vnic_lvl, in bnxt_hwrm_func_backing_store_cfg()
8672 &req->vnic_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8675 ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; in bnxt_hwrm_func_backing_store_cfg()
8676 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8677 req->stat_num_entries = cpu_to_le32(ctxm->max_entries); in bnxt_hwrm_func_backing_store_cfg()
8678 req->stat_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8679 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8680 &req->stat_pg_size_stat_lvl, in bnxt_hwrm_func_backing_store_cfg()
8681 &req->stat_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8686 ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; in bnxt_hwrm_func_backing_store_cfg()
8687 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8688 req->mrav_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8689 units = ctxm->mrav_num_entries_units; in bnxt_hwrm_func_backing_store_cfg()
8691 u32 num_mr, num_ah = ctxm->mrav_av_entries; in bnxt_hwrm_func_backing_store_cfg()
8694 num_mr = ctx_pg->entries - num_ah; in bnxt_hwrm_func_backing_store_cfg()
8696 req->mrav_num_entries = cpu_to_le32(entries); in bnxt_hwrm_func_backing_store_cfg()
8699 req->mrav_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8700 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8701 &req->mrav_pg_size_mrav_lvl, in bnxt_hwrm_func_backing_store_cfg()
8702 &req->mrav_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8705 ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; in bnxt_hwrm_func_backing_store_cfg()
8706 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8707 req->tim_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8708 req->tim_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8709 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8710 &req->tim_pg_size_tim_lvl, in bnxt_hwrm_func_backing_store_cfg()
8711 &req->tim_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8713 ctxm = &ctx->ctx_arr[BNXT_CTX_STQM]; in bnxt_hwrm_func_backing_store_cfg()
8714 for (i = 0, num_entries = &req->tqm_sp_num_entries, in bnxt_hwrm_func_backing_store_cfg()
8715 pg_attr = &req->tqm_sp_pg_size_tqm_sp_lvl, in bnxt_hwrm_func_backing_store_cfg()
8716 pg_dir = &req->tqm_sp_page_dir, in bnxt_hwrm_func_backing_store_cfg()
8718 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8720 ctx_pg = &ctx->ctx_arr[BNXT_CTX_FTQM].pg_info[i], in bnxt_hwrm_func_backing_store_cfg()
8725 req->tqm_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8726 *num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8727 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, pg_attr, pg_dir); in bnxt_hwrm_func_backing_store_cfg()
8729 req->flags = cpu_to_le32(flags); in bnxt_hwrm_func_backing_store_cfg()
8736 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_alloc_ctx_mem_blk()
8738 rmem->page_size = BNXT_PAGE_SIZE; in bnxt_alloc_ctx_mem_blk()
8739 rmem->pg_arr = ctx_pg->ctx_pg_arr; in bnxt_alloc_ctx_mem_blk()
8740 rmem->dma_arr = ctx_pg->ctx_dma_arr; in bnxt_alloc_ctx_mem_blk()
8741 rmem->flags = BNXT_RMEM_VALID_PTE_FLAG; in bnxt_alloc_ctx_mem_blk()
8742 if (rmem->depth >= 1) in bnxt_alloc_ctx_mem_blk()
8743 rmem->flags |= BNXT_RMEM_USE_FULL_PAGE_FLAG; in bnxt_alloc_ctx_mem_blk()
8751 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_alloc_ctx_pg_tbls()
8755 return -EINVAL; in bnxt_alloc_ctx_pg_tbls()
8757 ctx_pg->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE); in bnxt_alloc_ctx_pg_tbls()
8758 if (ctx_pg->nr_pages > MAX_CTX_TOTAL_PAGES) { in bnxt_alloc_ctx_pg_tbls()
8759 ctx_pg->nr_pages = 0; in bnxt_alloc_ctx_pg_tbls()
8760 return -EINVAL; in bnxt_alloc_ctx_pg_tbls()
8762 if (ctx_pg->nr_pages > MAX_CTX_PAGES || depth > 1) { in bnxt_alloc_ctx_pg_tbls()
8765 rmem->depth = 2; in bnxt_alloc_ctx_pg_tbls()
8766 ctx_pg->ctx_pg_tbl = kcalloc(MAX_CTX_PAGES, sizeof(ctx_pg), in bnxt_alloc_ctx_pg_tbls()
8768 if (!ctx_pg->ctx_pg_tbl) in bnxt_alloc_ctx_pg_tbls()
8769 return -ENOMEM; in bnxt_alloc_ctx_pg_tbls()
8770 nr_tbls = DIV_ROUND_UP(ctx_pg->nr_pages, MAX_CTX_PAGES); in bnxt_alloc_ctx_pg_tbls()
8771 rmem->nr_pages = nr_tbls; in bnxt_alloc_ctx_pg_tbls()
8780 return -ENOMEM; in bnxt_alloc_ctx_pg_tbls()
8781 ctx_pg->ctx_pg_tbl[i] = pg_tbl; in bnxt_alloc_ctx_pg_tbls()
8782 rmem = &pg_tbl->ring_mem; in bnxt_alloc_ctx_pg_tbls()
8783 rmem->pg_tbl = ctx_pg->ctx_pg_arr[i]; in bnxt_alloc_ctx_pg_tbls()
8784 rmem->pg_tbl_map = ctx_pg->ctx_dma_arr[i]; in bnxt_alloc_ctx_pg_tbls()
8785 rmem->depth = 1; in bnxt_alloc_ctx_pg_tbls()
8786 rmem->nr_pages = MAX_CTX_PAGES; in bnxt_alloc_ctx_pg_tbls()
8787 rmem->ctx_mem = ctxm; in bnxt_alloc_ctx_pg_tbls()
8788 if (i == (nr_tbls - 1)) { in bnxt_alloc_ctx_pg_tbls()
8789 int rem = ctx_pg->nr_pages % MAX_CTX_PAGES; in bnxt_alloc_ctx_pg_tbls()
8792 rmem->nr_pages = rem; in bnxt_alloc_ctx_pg_tbls()
8799 rmem->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE); in bnxt_alloc_ctx_pg_tbls()
8800 if (rmem->nr_pages > 1 || depth) in bnxt_alloc_ctx_pg_tbls()
8801 rmem->depth = 1; in bnxt_alloc_ctx_pg_tbls()
8802 rmem->ctx_mem = ctxm; in bnxt_alloc_ctx_pg_tbls()
8813 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_copy_ctx_pg_tbls()
8814 size_t nr_pages = ctx_pg->nr_pages; in bnxt_copy_ctx_pg_tbls()
8815 int page_size = rmem->page_size; in bnxt_copy_ctx_pg_tbls()
8817 u16 depth = rmem->depth; in bnxt_copy_ctx_pg_tbls()
8825 pg_tbl = ctx_pg->ctx_pg_tbl[i]; in bnxt_copy_ctx_pg_tbls()
8826 rmem = &pg_tbl->ring_mem; in bnxt_copy_ctx_pg_tbls()
8841 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_free_ctx_pg_tbls()
8843 if (rmem->depth > 1 || ctx_pg->nr_pages > MAX_CTX_PAGES || in bnxt_free_ctx_pg_tbls()
8844 ctx_pg->ctx_pg_tbl) { in bnxt_free_ctx_pg_tbls()
8845 int i, nr_tbls = rmem->nr_pages; in bnxt_free_ctx_pg_tbls()
8851 pg_tbl = ctx_pg->ctx_pg_tbl[i]; in bnxt_free_ctx_pg_tbls()
8854 rmem2 = &pg_tbl->ring_mem; in bnxt_free_ctx_pg_tbls()
8856 ctx_pg->ctx_pg_arr[i] = NULL; in bnxt_free_ctx_pg_tbls()
8858 ctx_pg->ctx_pg_tbl[i] = NULL; in bnxt_free_ctx_pg_tbls()
8860 kfree(ctx_pg->ctx_pg_tbl); in bnxt_free_ctx_pg_tbls()
8861 ctx_pg->ctx_pg_tbl = NULL; in bnxt_free_ctx_pg_tbls()
8864 ctx_pg->nr_pages = 0; in bnxt_free_ctx_pg_tbls()
8871 struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; in bnxt_setup_ctxm_pg_tbls()
8875 if (!ctxm->entry_size || !ctx_pg) in bnxt_setup_ctxm_pg_tbls()
8876 return -EINVAL; in bnxt_setup_ctxm_pg_tbls()
8877 if (ctxm->instance_bmap) in bnxt_setup_ctxm_pg_tbls()
8878 n = hweight32(ctxm->instance_bmap); in bnxt_setup_ctxm_pg_tbls()
8879 if (ctxm->entry_multiple) in bnxt_setup_ctxm_pg_tbls()
8880 entries = roundup(entries, ctxm->entry_multiple); in bnxt_setup_ctxm_pg_tbls()
8881 entries = clamp_t(u32, entries, ctxm->min_entries, ctxm->max_entries); in bnxt_setup_ctxm_pg_tbls()
8882 mem_size = entries * ctxm->entry_size; in bnxt_setup_ctxm_pg_tbls()
8886 ctxm->init_value ? ctxm : NULL); in bnxt_setup_ctxm_pg_tbls()
8889 ctxm->mem_valid = 1; in bnxt_setup_ctxm_pg_tbls()
8898 u32 instance_bmap = ctxm->instance_bmap; in bnxt_hwrm_func_backing_store_cfg_v2()
8902 if (!(ctxm->flags & BNXT_CTX_MEM_TYPE_VALID) || !ctxm->pg_info) in bnxt_hwrm_func_backing_store_cfg_v2()
8906 n = hweight32(ctxm->instance_bmap); in bnxt_hwrm_func_backing_store_cfg_v2()
8914 req->type = cpu_to_le16(ctxm->type); in bnxt_hwrm_func_backing_store_cfg_v2()
8915 req->entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg_v2()
8916 if ((ctxm->flags & BNXT_CTX_MEM_PERSIST) && in bnxt_hwrm_func_backing_store_cfg_v2()
8917 bnxt_bs_trace_avail(bp, ctxm->type)) { in bnxt_hwrm_func_backing_store_cfg_v2()
8922 req->enables = cpu_to_le32(enables); in bnxt_hwrm_func_backing_store_cfg_v2()
8923 bs_trace = &bp->bs_trace[bnxt_bstore_to_trace[ctxm->type]]; in bnxt_hwrm_func_backing_store_cfg_v2()
8924 req->next_bs_offset = cpu_to_le32(bs_trace->last_offset); in bnxt_hwrm_func_backing_store_cfg_v2()
8926 req->subtype_valid_cnt = ctxm->split_entry_cnt; in bnxt_hwrm_func_backing_store_cfg_v2()
8927 for (i = 0, p = &req->split_entry_0; i < ctxm->split_entry_cnt; i++) in bnxt_hwrm_func_backing_store_cfg_v2()
8928 p[i] = cpu_to_le32(ctxm->split[i]); in bnxt_hwrm_func_backing_store_cfg_v2()
8934 req->instance = cpu_to_le16(i); in bnxt_hwrm_func_backing_store_cfg_v2()
8935 ctx_pg = &ctxm->pg_info[j++]; in bnxt_hwrm_func_backing_store_cfg_v2()
8936 if (!ctx_pg->entries) in bnxt_hwrm_func_backing_store_cfg_v2()
8938 req->num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg_v2()
8939 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg_v2()
8940 &req->page_size_pbl_level, in bnxt_hwrm_func_backing_store_cfg_v2()
8941 &req->page_dir); in bnxt_hwrm_func_backing_store_cfg_v2()
8943 req->flags = in bnxt_hwrm_func_backing_store_cfg_v2()
8953 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_backing_store_cfg_v2()
8960 ctxm = &ctx->ctx_arr[type]; in bnxt_backing_store_cfg_v2()
8963 if (!ctxm->mem_valid) { in bnxt_backing_store_cfg_v2()
8965 ctxm->max_entries, 1); in bnxt_backing_store_cfg_v2()
8967 netdev_warn(bp->dev, "Unable to setup ctx page for type:0x%x.\n", in bnxt_backing_store_cfg_v2()
8980 last_type = BNXT_CTX_MAX - 1; in bnxt_backing_store_cfg_v2()
8982 last_type = BNXT_CTX_L2_MAX - 1; in bnxt_backing_store_cfg_v2()
8984 ctx->ctx_arr[last_type].last = 1; in bnxt_backing_store_cfg_v2()
8987 ctxm = &ctx->ctx_arr[type]; in bnxt_backing_store_cfg_v2()
8989 if (!ctxm->mem_valid) in bnxt_backing_store_cfg_v2()
8991 rc = bnxt_hwrm_func_backing_store_cfg_v2(bp, ctxm, ctxm->last); in bnxt_backing_store_cfg_v2()
8999 * __bnxt_copy_ctx_mem - copy host context memory
9016 struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; in __bnxt_copy_ctx_mem()
9023 if (ctxm->instance_bmap) in __bnxt_copy_ctx_mem()
9024 n = hweight32(ctxm->instance_bmap); in __bnxt_copy_ctx_mem()
9037 size_t tail = ctxm->max_entries * ctxm->entry_size; in bnxt_copy_ctx_mem()
9048 ctxm->last = 0; in bnxt_free_one_ctx_mem()
9050 if (ctxm->mem_valid && !force && (ctxm->flags & BNXT_CTX_MEM_PERSIST)) in bnxt_free_one_ctx_mem()
9053 ctx_pg = ctxm->pg_info; in bnxt_free_one_ctx_mem()
9055 if (ctxm->instance_bmap) in bnxt_free_one_ctx_mem()
9056 n = hweight32(ctxm->instance_bmap); in bnxt_free_one_ctx_mem()
9061 ctxm->pg_info = NULL; in bnxt_free_one_ctx_mem()
9062 ctxm->mem_valid = 0; in bnxt_free_one_ctx_mem()
9069 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_free_ctx_mem()
9076 bnxt_free_one_ctx_mem(bp, &ctx->ctx_arr[type], force); in bnxt_free_ctx_mem()
9078 ctx->flags &= ~BNXT_CTX_FLAG_INITED; in bnxt_free_ctx_mem()
9081 bp->ctx = NULL; in bnxt_free_ctx_mem()
9101 netdev_err(bp->dev, "Failed querying context mem capability, rc = %d.\n", in bnxt_alloc_ctx_mem()
9105 ctx = bp->ctx; in bnxt_alloc_ctx_mem()
9106 if (!ctx || (ctx->flags & BNXT_CTX_FLAG_INITED)) in bnxt_alloc_ctx_mem()
9109 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_alloc_ctx_mem()
9110 l2_qps = ctxm->qp_l2_entries; in bnxt_alloc_ctx_mem()
9111 qp1_qps = ctxm->qp_qp1_entries; in bnxt_alloc_ctx_mem()
9112 fast_qpmd_qps = ctxm->qp_fast_qpmd_entries; in bnxt_alloc_ctx_mem()
9113 max_qps = ctxm->max_entries; in bnxt_alloc_ctx_mem()
9114 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_alloc_ctx_mem()
9115 srqs = ctxm->srq_l2_entries; in bnxt_alloc_ctx_mem()
9116 max_srqs = ctxm->max_entries; in bnxt_alloc_ctx_mem()
9118 if ((bp->flags & BNXT_FLAG_ROCE_CAP) && !is_kdump_kernel()) { in bnxt_alloc_ctx_mem()
9120 extra_qps = min_t(u32, 65536, max_qps - l2_qps - qp1_qps); in bnxt_alloc_ctx_mem()
9123 extra_srqs = min_t(u32, 8192, max_srqs - srqs); in bnxt_alloc_ctx_mem()
9128 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_alloc_ctx_mem()
9134 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_alloc_ctx_mem()
9139 ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; in bnxt_alloc_ctx_mem()
9140 rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->cq_l2_entries + in bnxt_alloc_ctx_mem()
9145 ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; in bnxt_alloc_ctx_mem()
9146 rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1); in bnxt_alloc_ctx_mem()
9150 ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; in bnxt_alloc_ctx_mem()
9151 rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1); in bnxt_alloc_ctx_mem()
9155 if (!(bp->flags & BNXT_FLAG_ROCE_CAP)) in bnxt_alloc_ctx_mem()
9158 ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; in bnxt_alloc_ctx_mem()
9162 num_mr = min_t(u32, ctxm->max_entries / 2, 1024 * 256); in bnxt_alloc_ctx_mem()
9164 ctxm->split_entry_cnt = BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1; in bnxt_alloc_ctx_mem()
9165 if (!ctxm->mrav_av_entries || ctxm->mrav_av_entries > num_ah) in bnxt_alloc_ctx_mem()
9166 ctxm->mrav_av_entries = num_ah; in bnxt_alloc_ctx_mem()
9173 ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; in bnxt_alloc_ctx_mem()
9180 ctxm = &ctx->ctx_arr[BNXT_CTX_STQM]; in bnxt_alloc_ctx_mem()
9181 min = ctxm->min_entries; in bnxt_alloc_ctx_mem()
9182 entries_sp = ctx->ctx_arr[BNXT_CTX_VNIC].vnic_entries + l2_qps + in bnxt_alloc_ctx_mem()
9188 ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM]; in bnxt_alloc_ctx_mem()
9193 for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++) in bnxt_alloc_ctx_mem()
9197 if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2) in bnxt_alloc_ctx_mem()
9202 netdev_err(bp->dev, "Failed configuring context mem, rc = %d.\n", in bnxt_alloc_ctx_mem()
9206 ctx->flags |= BNXT_CTX_FLAG_INITED; in bnxt_alloc_ctx_mem()
9216 if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR)) in bnxt_hwrm_crash_dump_mem_cfg()
9229 req->pg_size_lvl = cpu_to_le16(page_attr | in bnxt_hwrm_crash_dump_mem_cfg()
9230 bp->fw_crash_mem->ring_mem.depth); in bnxt_hwrm_crash_dump_mem_cfg()
9231 req->pbl = cpu_to_le64(bp->fw_crash_mem->ring_mem.pg_tbl_map); in bnxt_hwrm_crash_dump_mem_cfg()
9232 req->size = cpu_to_le32(bp->fw_crash_len); in bnxt_hwrm_crash_dump_mem_cfg()
9233 req->output_dest_flags = cpu_to_le16(BNXT_DBG_CR_DUMP_MDM_CFG_DDR); in bnxt_hwrm_crash_dump_mem_cfg()
9239 if (bp->fw_crash_mem) { in bnxt_free_crash_dump_mem()
9240 bnxt_free_ctx_pg_tbls(bp, bp->fw_crash_mem); in bnxt_free_crash_dump_mem()
9241 kfree(bp->fw_crash_mem); in bnxt_free_crash_dump_mem()
9242 bp->fw_crash_mem = NULL; in bnxt_free_crash_dump_mem()
9251 if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR)) in bnxt_alloc_crash_dump_mem()
9261 if (bp->fw_crash_mem && in bnxt_alloc_crash_dump_mem()
9262 mem_size <= bp->fw_crash_mem->nr_pages * BNXT_PAGE_SIZE) in bnxt_alloc_crash_dump_mem()
9265 if (bp->fw_crash_mem) in bnxt_alloc_crash_dump_mem()
9266 bnxt_free_ctx_pg_tbls(bp, bp->fw_crash_mem); in bnxt_alloc_crash_dump_mem()
9268 bp->fw_crash_mem = kzalloc(sizeof(*bp->fw_crash_mem), in bnxt_alloc_crash_dump_mem()
9270 if (!bp->fw_crash_mem) in bnxt_alloc_crash_dump_mem()
9271 return -ENOMEM; in bnxt_alloc_crash_dump_mem()
9273 rc = bnxt_alloc_ctx_pg_tbls(bp, bp->fw_crash_mem, mem_size, 1, NULL); in bnxt_alloc_crash_dump_mem()
9280 bp->fw_crash_len = mem_size; in bnxt_alloc_crash_dump_mem()
9288 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_hwrm_func_resc_qcaps()
9295 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_func_resc_qcaps()
9301 hw_resc->max_tx_sch_inputs = le16_to_cpu(resp->max_tx_scheduler_inputs); in bnxt_hwrm_func_resc_qcaps()
9305 hw_resc->min_rsscos_ctxs = le16_to_cpu(resp->min_rsscos_ctx); in bnxt_hwrm_func_resc_qcaps()
9306 hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx); in bnxt_hwrm_func_resc_qcaps()
9307 hw_resc->min_cp_rings = le16_to_cpu(resp->min_cmpl_rings); in bnxt_hwrm_func_resc_qcaps()
9308 hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings); in bnxt_hwrm_func_resc_qcaps()
9309 hw_resc->min_tx_rings = le16_to_cpu(resp->min_tx_rings); in bnxt_hwrm_func_resc_qcaps()
9310 hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings); in bnxt_hwrm_func_resc_qcaps()
9311 hw_resc->min_rx_rings = le16_to_cpu(resp->min_rx_rings); in bnxt_hwrm_func_resc_qcaps()
9312 hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings); in bnxt_hwrm_func_resc_qcaps()
9313 hw_resc->min_hw_ring_grps = le16_to_cpu(resp->min_hw_ring_grps); in bnxt_hwrm_func_resc_qcaps()
9314 hw_resc->max_hw_ring_grps = le16_to_cpu(resp->max_hw_ring_grps); in bnxt_hwrm_func_resc_qcaps()
9315 hw_resc->min_l2_ctxs = le16_to_cpu(resp->min_l2_ctxs); in bnxt_hwrm_func_resc_qcaps()
9316 hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs); in bnxt_hwrm_func_resc_qcaps()
9317 hw_resc->min_vnics = le16_to_cpu(resp->min_vnics); in bnxt_hwrm_func_resc_qcaps()
9318 hw_resc->max_vnics = le16_to_cpu(resp->max_vnics); in bnxt_hwrm_func_resc_qcaps()
9319 hw_resc->min_stat_ctxs = le16_to_cpu(resp->min_stat_ctx); in bnxt_hwrm_func_resc_qcaps()
9320 hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx); in bnxt_hwrm_func_resc_qcaps()
9322 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_func_resc_qcaps()
9323 u16 max_msix = le16_to_cpu(resp->max_msix); in bnxt_hwrm_func_resc_qcaps()
9325 hw_resc->max_nqs = max_msix; in bnxt_hwrm_func_resc_qcaps()
9326 hw_resc->max_hw_ring_grps = hw_resc->max_rx_rings; in bnxt_hwrm_func_resc_qcaps()
9330 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_func_resc_qcaps()
9332 pf->vf_resv_strategy = in bnxt_hwrm_func_resc_qcaps()
9333 le16_to_cpu(resp->vf_reservation_strategy); in bnxt_hwrm_func_resc_qcaps()
9334 if (pf->vf_resv_strategy > BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) in bnxt_hwrm_func_resc_qcaps()
9335 pf->vf_resv_strategy = BNXT_VF_RESV_STRATEGY_MAXIMAL; in bnxt_hwrm_func_resc_qcaps()
9346 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in __bnxt_hwrm_ptp_qcfg()
9350 if (bp->hwrm_spec_code < 0x10801 || !BNXT_CHIP_P5_PLUS(bp)) { in __bnxt_hwrm_ptp_qcfg()
9351 rc = -ENODEV; in __bnxt_hwrm_ptp_qcfg()
9359 req->port_id = cpu_to_le16(bp->pf.port_id); in __bnxt_hwrm_ptp_qcfg()
9365 flags = resp->flags; in __bnxt_hwrm_ptp_qcfg()
9368 rc = -ENODEV; in __bnxt_hwrm_ptp_qcfg()
9374 rc = -ENOMEM; in __bnxt_hwrm_ptp_qcfg()
9377 ptp->bp = bp; in __bnxt_hwrm_ptp_qcfg()
9378 bp->ptp_cfg = ptp; in __bnxt_hwrm_ptp_qcfg()
9384 ptp->refclk_regs[0] = le32_to_cpu(resp->ts_ref_clock_reg_lower); in __bnxt_hwrm_ptp_qcfg()
9385 ptp->refclk_regs[1] = le32_to_cpu(resp->ts_ref_clock_reg_upper); in __bnxt_hwrm_ptp_qcfg()
9387 ptp->refclk_regs[0] = BNXT_TS_REG_TIMESYNC_TS0_LOWER; in __bnxt_hwrm_ptp_qcfg()
9388 ptp->refclk_regs[1] = BNXT_TS_REG_TIMESYNC_TS0_UPPER; in __bnxt_hwrm_ptp_qcfg()
9390 rc = -ENODEV; in __bnxt_hwrm_ptp_qcfg()
9393 ptp->rtc_configured = in __bnxt_hwrm_ptp_qcfg()
9397 netdev_warn(bp->dev, "PTP initialization failed.\n"); in __bnxt_hwrm_ptp_qcfg()
9406 bp->ptp_cfg = NULL; in __bnxt_hwrm_ptp_qcfg()
9414 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in __bnxt_hwrm_func_qcaps()
9422 req->fid = cpu_to_le16(0xffff); in __bnxt_hwrm_func_qcaps()
9428 flags = le32_to_cpu(resp->flags); in __bnxt_hwrm_func_qcaps()
9430 bp->flags |= BNXT_FLAG_ROCEV1_CAP; in __bnxt_hwrm_func_qcaps()
9432 bp->flags |= BNXT_FLAG_ROCEV2_CAP; in __bnxt_hwrm_func_qcaps()
9434 bp->fw_cap |= BNXT_FW_CAP_PCIE_STATS_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9436 bp->fw_cap |= BNXT_FW_CAP_HOT_RESET; in __bnxt_hwrm_func_qcaps()
9438 bp->fw_cap |= BNXT_FW_CAP_EXT_STATS_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9440 bp->fw_cap |= BNXT_FW_CAP_ERROR_RECOVERY; in __bnxt_hwrm_func_qcaps()
9442 bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD; in __bnxt_hwrm_func_qcaps()
9444 bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT; in __bnxt_hwrm_func_qcaps()
9446 bp->fw_cap |= BNXT_FW_CAP_DBG_QCAPS; in __bnxt_hwrm_func_qcaps()
9448 flags_ext = le32_to_cpu(resp->flags_ext); in __bnxt_hwrm_func_qcaps()
9450 bp->fw_cap |= BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9452 bp->fw_cap |= BNXT_FW_CAP_PTP_PPS; in __bnxt_hwrm_func_qcaps()
9454 bp->fw_cap |= BNXT_FW_CAP_PTP_RTC; in __bnxt_hwrm_func_qcaps()
9456 bp->fw_cap |= BNXT_FW_CAP_HOT_RESET_IF; in __bnxt_hwrm_func_qcaps()
9458 bp->fw_cap |= BNXT_FW_CAP_LIVEPATCH; in __bnxt_hwrm_func_qcaps()
9460 bp->fw_cap |= BNXT_FW_CAP_DFLT_VLAN_TPID_PCP; in __bnxt_hwrm_func_qcaps()
9462 bp->fw_cap |= BNXT_FW_CAP_BACKING_STORE_V2; in __bnxt_hwrm_func_qcaps()
9464 bp->flags |= BNXT_FLAG_TX_COAL_CMPL; in __bnxt_hwrm_func_qcaps()
9466 flags_ext2 = le32_to_cpu(resp->flags_ext2); in __bnxt_hwrm_func_qcaps()
9468 bp->fw_cap |= BNXT_FW_CAP_RX_ALL_PKT_TS; in __bnxt_hwrm_func_qcaps()
9470 bp->flags |= BNXT_FLAG_UDP_GSO_CAP; in __bnxt_hwrm_func_qcaps()
9472 bp->fw_cap |= BNXT_FW_CAP_TX_TS_CMP; in __bnxt_hwrm_func_qcaps()
9475 bp->fw_cap |= BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9477 bp->tx_push_thresh = 0; in __bnxt_hwrm_func_qcaps()
9480 bp->tx_push_thresh = BNXT_TX_PUSH_THRESH; in __bnxt_hwrm_func_qcaps()
9482 hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx); in __bnxt_hwrm_func_qcaps()
9483 hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings); in __bnxt_hwrm_func_qcaps()
9484 hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings); in __bnxt_hwrm_func_qcaps()
9485 hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings); in __bnxt_hwrm_func_qcaps()
9486 hw_resc->max_hw_ring_grps = le32_to_cpu(resp->max_hw_ring_grps); in __bnxt_hwrm_func_qcaps()
9487 if (!hw_resc->max_hw_ring_grps) in __bnxt_hwrm_func_qcaps()
9488 hw_resc->max_hw_ring_grps = hw_resc->max_tx_rings; in __bnxt_hwrm_func_qcaps()
9489 hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs); in __bnxt_hwrm_func_qcaps()
9490 hw_resc->max_vnics = le16_to_cpu(resp->max_vnics); in __bnxt_hwrm_func_qcaps()
9491 hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx); in __bnxt_hwrm_func_qcaps()
9493 hw_resc->max_encap_records = le32_to_cpu(resp->max_encap_records); in __bnxt_hwrm_func_qcaps()
9494 hw_resc->max_decap_records = le32_to_cpu(resp->max_decap_records); in __bnxt_hwrm_func_qcaps()
9495 hw_resc->max_tx_em_flows = le32_to_cpu(resp->max_tx_em_flows); in __bnxt_hwrm_func_qcaps()
9496 hw_resc->max_tx_wm_flows = le32_to_cpu(resp->max_tx_wm_flows); in __bnxt_hwrm_func_qcaps()
9497 hw_resc->max_rx_em_flows = le32_to_cpu(resp->max_rx_em_flows); in __bnxt_hwrm_func_qcaps()
9498 hw_resc->max_rx_wm_flows = le32_to_cpu(resp->max_rx_wm_flows); in __bnxt_hwrm_func_qcaps()
9501 struct bnxt_pf_info *pf = &bp->pf; in __bnxt_hwrm_func_qcaps()
9503 pf->fw_fid = le16_to_cpu(resp->fid); in __bnxt_hwrm_func_qcaps()
9504 pf->port_id = le16_to_cpu(resp->port_id); in __bnxt_hwrm_func_qcaps()
9505 memcpy(pf->mac_addr, resp->mac_address, ETH_ALEN); in __bnxt_hwrm_func_qcaps()
9506 pf->first_vf_id = le16_to_cpu(resp->first_vf_id); in __bnxt_hwrm_func_qcaps()
9507 pf->max_vfs = le16_to_cpu(resp->max_vfs); in __bnxt_hwrm_func_qcaps()
9508 bp->flags &= ~BNXT_FLAG_WOL_CAP; in __bnxt_hwrm_func_qcaps()
9510 bp->flags |= BNXT_FLAG_WOL_CAP; in __bnxt_hwrm_func_qcaps()
9512 bp->fw_cap |= BNXT_FW_CAP_PTP; in __bnxt_hwrm_func_qcaps()
9515 kfree(bp->ptp_cfg); in __bnxt_hwrm_func_qcaps()
9516 bp->ptp_cfg = NULL; in __bnxt_hwrm_func_qcaps()
9520 struct bnxt_vf_info *vf = &bp->vf; in __bnxt_hwrm_func_qcaps()
9522 vf->fw_fid = le16_to_cpu(resp->fid); in __bnxt_hwrm_func_qcaps()
9523 memcpy(vf->mac_addr, resp->mac_address, ETH_ALEN); in __bnxt_hwrm_func_qcaps()
9526 bp->tso_max_segs = le16_to_cpu(resp->max_tso_segs); in __bnxt_hwrm_func_qcaps()
9539 bp->fw_dbg_cap = 0; in bnxt_hwrm_dbg_qcaps()
9540 if (!(bp->fw_cap & BNXT_FW_CAP_DBG_QCAPS)) in bnxt_hwrm_dbg_qcaps()
9547 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_dbg_qcaps()
9553 bp->fw_dbg_cap = le32_to_cpu(resp->flags); in bnxt_hwrm_dbg_qcaps()
9573 netdev_err(bp->dev, "hwrm query qportcfg failure rc: %d\n", rc); in bnxt_hwrm_func_qcaps()
9576 if (bp->hwrm_spec_code >= 0x10803) { in bnxt_hwrm_func_qcaps()
9582 bp->fw_cap |= BNXT_FW_CAP_NEW_RM; in bnxt_hwrm_func_qcaps()
9594 if (!(bp->fw_cap & BNXT_FW_CAP_CFA_ADV_FLOW)) in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9606 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9609 bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2; in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9613 bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V3; in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9617 bp->fw_cap |= BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO; in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9626 if (bp->fw_health) in __bnxt_alloc_fw_health()
9629 bp->fw_health = kzalloc(sizeof(*bp->fw_health), GFP_KERNEL); in __bnxt_alloc_fw_health()
9630 if (!bp->fw_health) in __bnxt_alloc_fw_health()
9631 return -ENOMEM; in __bnxt_alloc_fw_health()
9633 mutex_init(&bp->fw_health->lock); in __bnxt_alloc_fw_health()
9641 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET) && in bnxt_alloc_fw_health()
9642 !(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) in bnxt_alloc_fw_health()
9647 bp->fw_cap &= ~BNXT_FW_CAP_HOT_RESET; in bnxt_alloc_fw_health()
9648 bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY; in bnxt_alloc_fw_health()
9657 writel(reg & BNXT_GRC_BASE_MASK, bp->bar0 + in __bnxt_map_fw_health_reg()
9664 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_inv_fw_health_reg()
9670 reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_HEALTH_REG]); in bnxt_inv_fw_health_reg()
9672 fw_health->status_reliable = false; in bnxt_inv_fw_health_reg()
9674 reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_RESET_CNT_REG]); in bnxt_inv_fw_health_reg()
9676 fw_health->resets_reliable = false; in bnxt_inv_fw_health_reg()
9686 if (bp->fw_health) in bnxt_try_map_fw_health_reg()
9687 bp->fw_health->status_reliable = false; in bnxt_try_map_fw_health_reg()
9690 hs = bp->bar0 + BNXT_FW_HEALTH_WIN_OFF(HCOMM_STATUS_STRUCT_LOC); in bnxt_try_map_fw_health_reg()
9694 if (!bp->chip_num) { in bnxt_try_map_fw_health_reg()
9696 bp->chip_num = readl(bp->bar0 + in bnxt_try_map_fw_health_reg()
9711 netdev_warn(bp->dev, "no memory for firmware status checks\n"); in bnxt_try_map_fw_health_reg()
9715 bp->fw_health->regs[BNXT_FW_HEALTH_REG] = status_loc; in bnxt_try_map_fw_health_reg()
9719 bp->fw_health->mapped_regs[BNXT_FW_HEALTH_REG] = in bnxt_try_map_fw_health_reg()
9723 bp->fw_health->status_reliable = true; in bnxt_try_map_fw_health_reg()
9728 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_map_fw_health_regs()
9732 bp->fw_health->status_reliable = false; in bnxt_map_fw_health_regs()
9733 bp->fw_health->resets_reliable = false; in bnxt_map_fw_health_regs()
9734 /* Only pre-map the monitoring GRC registers using window 3 */ in bnxt_map_fw_health_regs()
9736 u32 reg = fw_health->regs[i]; in bnxt_map_fw_health_regs()
9743 return -ERANGE; in bnxt_map_fw_health_regs()
9744 fw_health->mapped_regs[i] = BNXT_FW_HEALTH_WIN_OFF(reg); in bnxt_map_fw_health_regs()
9746 bp->fw_health->status_reliable = true; in bnxt_map_fw_health_regs()
9747 bp->fw_health->resets_reliable = true; in bnxt_map_fw_health_regs()
9757 if (!bp->fw_health) in bnxt_remap_fw_health_regs()
9760 if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) { in bnxt_remap_fw_health_regs()
9761 bp->fw_health->status_reliable = true; in bnxt_remap_fw_health_regs()
9762 bp->fw_health->resets_reliable = true; in bnxt_remap_fw_health_regs()
9770 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_hwrm_error_recovery_qcfg()
9775 if (!(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) in bnxt_hwrm_error_recovery_qcfg()
9786 fw_health->flags = le32_to_cpu(resp->flags); in bnxt_hwrm_error_recovery_qcfg()
9787 if ((fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) && in bnxt_hwrm_error_recovery_qcfg()
9788 !(bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL)) { in bnxt_hwrm_error_recovery_qcfg()
9789 rc = -EINVAL; in bnxt_hwrm_error_recovery_qcfg()
9792 fw_health->polling_dsecs = le32_to_cpu(resp->driver_polling_freq); in bnxt_hwrm_error_recovery_qcfg()
9793 fw_health->master_func_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9794 le32_to_cpu(resp->master_func_wait_period); in bnxt_hwrm_error_recovery_qcfg()
9795 fw_health->normal_func_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9796 le32_to_cpu(resp->normal_func_wait_period); in bnxt_hwrm_error_recovery_qcfg()
9797 fw_health->post_reset_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9798 le32_to_cpu(resp->master_func_wait_period_after_reset); in bnxt_hwrm_error_recovery_qcfg()
9799 fw_health->post_reset_max_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9800 le32_to_cpu(resp->max_bailout_time_after_reset); in bnxt_hwrm_error_recovery_qcfg()
9801 fw_health->regs[BNXT_FW_HEALTH_REG] = in bnxt_hwrm_error_recovery_qcfg()
9802 le32_to_cpu(resp->fw_health_status_reg); in bnxt_hwrm_error_recovery_qcfg()
9803 fw_health->regs[BNXT_FW_HEARTBEAT_REG] = in bnxt_hwrm_error_recovery_qcfg()
9804 le32_to_cpu(resp->fw_heartbeat_reg); in bnxt_hwrm_error_recovery_qcfg()
9805 fw_health->regs[BNXT_FW_RESET_CNT_REG] = in bnxt_hwrm_error_recovery_qcfg()
9806 le32_to_cpu(resp->fw_reset_cnt_reg); in bnxt_hwrm_error_recovery_qcfg()
9807 fw_health->regs[BNXT_FW_RESET_INPROG_REG] = in bnxt_hwrm_error_recovery_qcfg()
9808 le32_to_cpu(resp->reset_inprogress_reg); in bnxt_hwrm_error_recovery_qcfg()
9809 fw_health->fw_reset_inprog_reg_mask = in bnxt_hwrm_error_recovery_qcfg()
9810 le32_to_cpu(resp->reset_inprogress_reg_mask); in bnxt_hwrm_error_recovery_qcfg()
9811 fw_health->fw_reset_seq_cnt = resp->reg_array_cnt; in bnxt_hwrm_error_recovery_qcfg()
9812 if (fw_health->fw_reset_seq_cnt >= 16) { in bnxt_hwrm_error_recovery_qcfg()
9813 rc = -EINVAL; in bnxt_hwrm_error_recovery_qcfg()
9816 for (i = 0; i < fw_health->fw_reset_seq_cnt; i++) { in bnxt_hwrm_error_recovery_qcfg()
9817 fw_health->fw_reset_seq_regs[i] = in bnxt_hwrm_error_recovery_qcfg()
9818 le32_to_cpu(resp->reset_reg[i]); in bnxt_hwrm_error_recovery_qcfg()
9819 fw_health->fw_reset_seq_vals[i] = in bnxt_hwrm_error_recovery_qcfg()
9820 le32_to_cpu(resp->reset_reg_val[i]); in bnxt_hwrm_error_recovery_qcfg()
9821 fw_health->fw_reset_seq_delay_msec[i] = in bnxt_hwrm_error_recovery_qcfg()
9822 resp->delay_after_reset[i]; in bnxt_hwrm_error_recovery_qcfg()
9829 bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY; in bnxt_hwrm_error_recovery_qcfg()
9842 req->enables = 0; in bnxt_hwrm_func_reset()
9852 snprintf(bp->nvm_cfg_ver, FW_VER_STR_LEN, "%d.%d.%d", in bnxt_nvm_cfg_ver_get()
9874 if (!resp->max_configurable_queues) { in bnxt_hwrm_queue_qportcfg()
9875 rc = -EINVAL; in bnxt_hwrm_queue_qportcfg()
9878 bp->max_tc = resp->max_configurable_queues; in bnxt_hwrm_queue_qportcfg()
9879 bp->max_lltc = resp->max_configurable_lossless_queues; in bnxt_hwrm_queue_qportcfg()
9880 if (bp->max_tc > BNXT_MAX_QUEUE) in bnxt_hwrm_queue_qportcfg()
9881 bp->max_tc = BNXT_MAX_QUEUE; in bnxt_hwrm_queue_qportcfg()
9883 no_rdma = !(bp->flags & BNXT_FLAG_ROCE_CAP); in bnxt_hwrm_queue_qportcfg()
9884 qptr = &resp->queue_id0; in bnxt_hwrm_queue_qportcfg()
9885 for (i = 0, j = 0; i < bp->max_tc; i++) { in bnxt_hwrm_queue_qportcfg()
9886 bp->q_info[j].queue_id = *qptr; in bnxt_hwrm_queue_qportcfg()
9887 bp->q_ids[i] = *qptr++; in bnxt_hwrm_queue_qportcfg()
9888 bp->q_info[j].queue_profile = *qptr++; in bnxt_hwrm_queue_qportcfg()
9889 bp->tc_to_qidx[j] = j; in bnxt_hwrm_queue_qportcfg()
9890 if (!BNXT_CNPQ(bp->q_info[j].queue_profile) || in bnxt_hwrm_queue_qportcfg()
9894 bp->max_q = bp->max_tc; in bnxt_hwrm_queue_qportcfg()
9895 bp->max_tc = max_t(u8, j, 1); in bnxt_hwrm_queue_qportcfg()
9897 if (resp->queue_cfg_info & QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG) in bnxt_hwrm_queue_qportcfg()
9898 bp->max_tc = 1; in bnxt_hwrm_queue_qportcfg()
9900 if (bp->max_lltc > bp->max_tc) in bnxt_hwrm_queue_qportcfg()
9901 bp->max_lltc = bp->max_tc; in bnxt_hwrm_queue_qportcfg()
9917 req->hwrm_intf_maj = HWRM_VERSION_MAJOR; in bnxt_hwrm_poll()
9918 req->hwrm_intf_min = HWRM_VERSION_MINOR; in bnxt_hwrm_poll()
9919 req->hwrm_intf_upd = HWRM_VERSION_UPDATE; in bnxt_hwrm_poll()
9939 bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN; in bnxt_hwrm_ver_get()
9940 req->hwrm_intf_maj = HWRM_VERSION_MAJOR; in bnxt_hwrm_ver_get()
9941 req->hwrm_intf_min = HWRM_VERSION_MINOR; in bnxt_hwrm_ver_get()
9942 req->hwrm_intf_upd = HWRM_VERSION_UPDATE; in bnxt_hwrm_ver_get()
9949 memcpy(&bp->ver_resp, resp, sizeof(struct hwrm_ver_get_output)); in bnxt_hwrm_ver_get()
9951 bp->hwrm_spec_code = resp->hwrm_intf_maj_8b << 16 | in bnxt_hwrm_ver_get()
9952 resp->hwrm_intf_min_8b << 8 | in bnxt_hwrm_ver_get()
9953 resp->hwrm_intf_upd_8b; in bnxt_hwrm_ver_get()
9954 if (resp->hwrm_intf_maj_8b < 1) { in bnxt_hwrm_ver_get()
9955 netdev_warn(bp->dev, "HWRM interface %d.%d.%d is older than 1.0.0.\n", in bnxt_hwrm_ver_get()
9956 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, in bnxt_hwrm_ver_get()
9957 resp->hwrm_intf_upd_8b); in bnxt_hwrm_ver_get()
9958 netdev_warn(bp->dev, "Please update firmware with HWRM interface 1.0.0 or newer.\n"); in bnxt_hwrm_ver_get()
9964 if (bp->hwrm_spec_code > hwrm_ver) in bnxt_hwrm_ver_get()
9965 snprintf(bp->hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d", in bnxt_hwrm_ver_get()
9969 snprintf(bp->hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d", in bnxt_hwrm_ver_get()
9970 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, in bnxt_hwrm_ver_get()
9971 resp->hwrm_intf_upd_8b); in bnxt_hwrm_ver_get()
9973 fw_maj = le16_to_cpu(resp->hwrm_fw_major); in bnxt_hwrm_ver_get()
9974 if (bp->hwrm_spec_code > 0x10803 && fw_maj) { in bnxt_hwrm_ver_get()
9975 fw_min = le16_to_cpu(resp->hwrm_fw_minor); in bnxt_hwrm_ver_get()
9976 fw_bld = le16_to_cpu(resp->hwrm_fw_build); in bnxt_hwrm_ver_get()
9977 fw_rsv = le16_to_cpu(resp->hwrm_fw_patch); in bnxt_hwrm_ver_get()
9980 fw_maj = resp->hwrm_fw_maj_8b; in bnxt_hwrm_ver_get()
9981 fw_min = resp->hwrm_fw_min_8b; in bnxt_hwrm_ver_get()
9982 fw_bld = resp->hwrm_fw_bld_8b; in bnxt_hwrm_ver_get()
9983 fw_rsv = resp->hwrm_fw_rsvd_8b; in bnxt_hwrm_ver_get()
9986 bp->fw_ver_code = BNXT_FW_VER_CODE(fw_maj, fw_min, fw_bld, fw_rsv); in bnxt_hwrm_ver_get()
9987 snprintf(bp->fw_ver_str, len, "%d.%d.%d.%d", fw_maj, fw_min, fw_bld, in bnxt_hwrm_ver_get()
9990 if (strlen(resp->active_pkg_name)) { in bnxt_hwrm_ver_get()
9991 int fw_ver_len = strlen(bp->fw_ver_str); in bnxt_hwrm_ver_get()
9993 snprintf(bp->fw_ver_str + fw_ver_len, in bnxt_hwrm_ver_get()
9994 FW_VER_STR_LEN - fw_ver_len - 1, "/pkg %s", in bnxt_hwrm_ver_get()
9995 resp->active_pkg_name); in bnxt_hwrm_ver_get()
9996 bp->fw_cap |= BNXT_FW_CAP_PKG_VER; in bnxt_hwrm_ver_get()
9999 bp->hwrm_cmd_timeout = le16_to_cpu(resp->def_req_timeout); in bnxt_hwrm_ver_get()
10000 if (!bp->hwrm_cmd_timeout) in bnxt_hwrm_ver_get()
10001 bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT; in bnxt_hwrm_ver_get()
10002 bp->hwrm_cmd_max_timeout = le16_to_cpu(resp->max_req_timeout) * 1000; in bnxt_hwrm_ver_get()
10003 if (!bp->hwrm_cmd_max_timeout) in bnxt_hwrm_ver_get()
10004 bp->hwrm_cmd_max_timeout = HWRM_CMD_MAX_TIMEOUT; in bnxt_hwrm_ver_get()
10005 else if (bp->hwrm_cmd_max_timeout > HWRM_CMD_MAX_TIMEOUT) in bnxt_hwrm_ver_get()
10006 …netdev_warn(bp->dev, "Device requests max timeout of %d seconds, may trigger hung task watchdog\n", in bnxt_hwrm_ver_get()
10007 bp->hwrm_cmd_max_timeout / 1000); in bnxt_hwrm_ver_get()
10009 if (resp->hwrm_intf_maj_8b >= 1) { in bnxt_hwrm_ver_get()
10010 bp->hwrm_max_req_len = le16_to_cpu(resp->max_req_win_len); in bnxt_hwrm_ver_get()
10011 bp->hwrm_max_ext_req_len = le16_to_cpu(resp->max_ext_req_len); in bnxt_hwrm_ver_get()
10013 if (bp->hwrm_max_ext_req_len < HWRM_MAX_REQ_LEN) in bnxt_hwrm_ver_get()
10014 bp->hwrm_max_ext_req_len = HWRM_MAX_REQ_LEN; in bnxt_hwrm_ver_get()
10016 bp->chip_num = le16_to_cpu(resp->chip_num); in bnxt_hwrm_ver_get()
10017 bp->chip_rev = resp->chip_rev; in bnxt_hwrm_ver_get()
10018 if (bp->chip_num == CHIP_NUM_58700 && !resp->chip_rev && in bnxt_hwrm_ver_get()
10019 !resp->chip_metal) in bnxt_hwrm_ver_get()
10020 bp->flags |= BNXT_FLAG_CHIP_NITRO_A0; in bnxt_hwrm_ver_get()
10022 dev_caps_cfg = le32_to_cpu(resp->dev_caps_cfg); in bnxt_hwrm_ver_get()
10025 bp->fw_cap |= BNXT_FW_CAP_SHORT_CMD; in bnxt_hwrm_ver_get()
10028 bp->fw_cap |= BNXT_FW_CAP_KONG_MB_CHNL; in bnxt_hwrm_ver_get()
10032 bp->fw_cap |= BNXT_FW_CAP_OVS_64BIT_HANDLE; in bnxt_hwrm_ver_get()
10036 bp->fw_cap |= BNXT_FW_CAP_TRUSTED_VF; in bnxt_hwrm_ver_get()
10040 bp->fw_cap |= BNXT_FW_CAP_CFA_ADV_FLOW; in bnxt_hwrm_ver_get()
10054 if ((BNXT_VF(bp) && bp->hwrm_spec_code < 0x10901) || in bnxt_hwrm_fw_set_time()
10055 bp->hwrm_spec_code < 0x10400) in bnxt_hwrm_fw_set_time()
10056 return -EOPNOTSUPP; in bnxt_hwrm_fw_set_time()
10063 req->year = cpu_to_le16(1900 + tm.tm_year); in bnxt_hwrm_fw_set_time()
10064 req->month = 1 + tm.tm_mon; in bnxt_hwrm_fw_set_time()
10065 req->day = tm.tm_mday; in bnxt_hwrm_fw_set_time()
10066 req->hour = tm.tm_hour; in bnxt_hwrm_fw_set_time()
10067 req->minute = tm.tm_min; in bnxt_hwrm_fw_set_time()
10068 req->second = tm.tm_sec; in bnxt_hwrm_fw_set_time()
10094 if (masks[i] == -1ULL) in __bnxt_accumulate_stats()
10103 if (!stats->hw_stats) in bnxt_accumulate_stats()
10106 __bnxt_accumulate_stats(stats->hw_stats, stats->sw_stats, in bnxt_accumulate_stats()
10107 stats->hw_masks, stats->len / 8, false); in bnxt_accumulate_stats()
10117 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_accumulate_all_stats()
10120 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_accumulate_all_stats()
10121 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_accumulate_all_stats()
10125 cpr = &bnapi->cp_ring; in bnxt_accumulate_all_stats()
10126 stats = &cpr->stats; in bnxt_accumulate_all_stats()
10129 __bnxt_accumulate_stats(stats->hw_stats, stats->sw_stats, in bnxt_accumulate_all_stats()
10130 ring0_stats->hw_masks, in bnxt_accumulate_all_stats()
10131 ring0_stats->len / 8, ignore_zero); in bnxt_accumulate_all_stats()
10133 if (bp->flags & BNXT_FLAG_PORT_STATS) { in bnxt_accumulate_all_stats()
10134 struct bnxt_stats_mem *stats = &bp->port_stats; in bnxt_accumulate_all_stats()
10135 __le64 *hw_stats = stats->hw_stats; in bnxt_accumulate_all_stats()
10136 u64 *sw_stats = stats->sw_stats; in bnxt_accumulate_all_stats()
10137 u64 *masks = stats->hw_masks; in bnxt_accumulate_all_stats()
10149 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { in bnxt_accumulate_all_stats()
10150 bnxt_accumulate_stats(&bp->rx_port_stats_ext); in bnxt_accumulate_all_stats()
10151 bnxt_accumulate_stats(&bp->tx_port_stats_ext); in bnxt_accumulate_all_stats()
10158 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_port_qstats()
10161 if (!(bp->flags & BNXT_FLAG_PORT_STATS)) in bnxt_hwrm_port_qstats()
10164 if (flags && !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)) in bnxt_hwrm_port_qstats()
10165 return -EOPNOTSUPP; in bnxt_hwrm_port_qstats()
10171 req->flags = flags; in bnxt_hwrm_port_qstats()
10172 req->port_id = cpu_to_le16(pf->port_id); in bnxt_hwrm_port_qstats()
10173 req->tx_stat_host_addr = cpu_to_le64(bp->port_stats.hw_stats_map + in bnxt_hwrm_port_qstats()
10175 req->rx_stat_host_addr = cpu_to_le64(bp->port_stats.hw_stats_map); in bnxt_hwrm_port_qstats()
10185 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_port_qstats_ext()
10189 if (!(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) in bnxt_hwrm_port_qstats_ext()
10192 if (flags && !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)) in bnxt_hwrm_port_qstats_ext()
10193 return -EOPNOTSUPP; in bnxt_hwrm_port_qstats_ext()
10199 req_qs->flags = flags; in bnxt_hwrm_port_qstats_ext()
10200 req_qs->port_id = cpu_to_le16(pf->port_id); in bnxt_hwrm_port_qstats_ext()
10201 req_qs->rx_stat_size = cpu_to_le16(sizeof(struct rx_port_stats_ext)); in bnxt_hwrm_port_qstats_ext()
10202 req_qs->rx_stat_host_addr = cpu_to_le64(bp->rx_port_stats_ext.hw_stats_map); in bnxt_hwrm_port_qstats_ext()
10203 tx_stat_size = bp->tx_port_stats_ext.hw_stats ? in bnxt_hwrm_port_qstats_ext()
10205 req_qs->tx_stat_size = cpu_to_le16(tx_stat_size); in bnxt_hwrm_port_qstats_ext()
10206 req_qs->tx_stat_host_addr = cpu_to_le64(bp->tx_port_stats_ext.hw_stats_map); in bnxt_hwrm_port_qstats_ext()
10210 bp->fw_rx_stats_ext_size = in bnxt_hwrm_port_qstats_ext()
10211 le16_to_cpu(resp_qs->rx_stat_size) / 8; in bnxt_hwrm_port_qstats_ext()
10213 bp->fw_rx_stats_ext_size > BNXT_RX_STATS_EXT_NUM_LEGACY) in bnxt_hwrm_port_qstats_ext()
10214 bp->fw_rx_stats_ext_size = BNXT_RX_STATS_EXT_NUM_LEGACY; in bnxt_hwrm_port_qstats_ext()
10216 bp->fw_tx_stats_ext_size = tx_stat_size ? in bnxt_hwrm_port_qstats_ext()
10217 le16_to_cpu(resp_qs->tx_stat_size) / 8 : 0; in bnxt_hwrm_port_qstats_ext()
10219 bp->fw_rx_stats_ext_size = 0; in bnxt_hwrm_port_qstats_ext()
10220 bp->fw_tx_stats_ext_size = 0; in bnxt_hwrm_port_qstats_ext()
10227 if (bp->fw_tx_stats_ext_size <= in bnxt_hwrm_port_qstats_ext()
10229 bp->pri2cos_valid = 0; in bnxt_hwrm_port_qstats_ext()
10237 req_qc->flags = cpu_to_le32(QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN); in bnxt_hwrm_port_qstats_ext()
10245 pri2cos = &resp_qc->pri0_cos_queue_id; in bnxt_hwrm_port_qstats_ext()
10253 bp->pri2cos_valid = false; in bnxt_hwrm_port_qstats_ext()
10257 for (j = 0; j < bp->max_q; j++) { in bnxt_hwrm_port_qstats_ext()
10258 if (bp->q_ids[j] == queue_id) in bnxt_hwrm_port_qstats_ext()
10259 bp->pri2cos_idx[i] = queue_idx; in bnxt_hwrm_port_qstats_ext()
10262 bp->pri2cos_valid = true; in bnxt_hwrm_port_qstats_ext()
10283 tpa_flags = bp->flags & BNXT_FLAG_TPA; in bnxt_set_tpa()
10286 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_set_tpa()
10287 rc = bnxt_hwrm_vnic_set_tpa(bp, &bp->vnic_info[i], tpa_flags); in bnxt_set_tpa()
10289 netdev_err(bp->dev, "hwrm vnic set tpa failure rc for vnic %d: %x\n", in bnxt_set_tpa()
10301 for (i = 0; i < bp->nr_vnics; i++) in bnxt_hwrm_clear_vnic_rss()
10302 bnxt_hwrm_vnic_set_rss(bp, &bp->vnic_info[i], false); in bnxt_hwrm_clear_vnic_rss()
10307 if (!bp->vnic_info) in bnxt_clear_vnic()
10311 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) { in bnxt_clear_vnic()
10317 if (bp->flags & BNXT_FLAG_TPA) in bnxt_clear_vnic()
10320 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_clear_vnic()
10347 return -EINVAL; in bnxt_hwrm_set_br_mode()
10353 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_set_br_mode()
10354 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_EVB_MODE); in bnxt_hwrm_set_br_mode()
10355 req->evb_mode = evb_mode; in bnxt_hwrm_set_br_mode()
10364 if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10803) in bnxt_hwrm_set_cache_line_size()
10371 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_set_cache_line_size()
10372 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_CACHE_LINESIZE); in bnxt_hwrm_set_cache_line_size()
10373 req->options = FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_64; in bnxt_hwrm_set_cache_line_size()
10375 req->options = FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_128; in bnxt_hwrm_set_cache_line_size()
10384 if (vnic->flags & BNXT_VNIC_RFS_NEW_RSS_FLAG) in __bnxt_setup_vnic()
10390 netdev_err(bp->dev, "hwrm vnic %d alloc failure rc: %x\n", in __bnxt_setup_vnic()
10391 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10394 bp->rsscos_nr_ctxs++; in __bnxt_setup_vnic()
10399 netdev_err(bp->dev, "hwrm vnic %d cos ctx alloc failure rc: %x\n", in __bnxt_setup_vnic()
10400 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10403 bp->rsscos_nr_ctxs++; in __bnxt_setup_vnic()
10410 netdev_err(bp->dev, "hwrm vnic %d cfg failure rc: %x\n", in __bnxt_setup_vnic()
10411 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10418 netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %x\n", in __bnxt_setup_vnic()
10419 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10423 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in __bnxt_setup_vnic()
10426 netdev_err(bp->dev, "hwrm vnic %d set hds failure rc: %x\n", in __bnxt_setup_vnic()
10427 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10445 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_vnic_update()
10448 req->mru = cpu_to_le16(vnic->mru); in bnxt_hwrm_vnic_update()
10450 req->enables = cpu_to_le32(valid); in bnxt_hwrm_vnic_update()
10461 netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %d\n", in bnxt_hwrm_vnic_rss_cfg_p5()
10462 vnic->vnic_id, rc); in bnxt_hwrm_vnic_rss_cfg_p5()
10467 netdev_err(bp->dev, "hwrm vnic %d cfg failure rc: %x\n", in bnxt_hwrm_vnic_rss_cfg_p5()
10468 vnic->vnic_id, rc); in bnxt_hwrm_vnic_rss_cfg_p5()
10476 nr_ctxs = bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings); in __bnxt_setup_vnic_p5()
10480 netdev_err(bp->dev, "hwrm vnic %d ctx %d alloc failure rc: %x\n", in __bnxt_setup_vnic_p5()
10481 vnic->vnic_id, i, rc); in __bnxt_setup_vnic_p5()
10484 bp->rsscos_nr_ctxs++; in __bnxt_setup_vnic_p5()
10487 return -ENOMEM; in __bnxt_setup_vnic_p5()
10493 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in __bnxt_setup_vnic_p5()
10496 netdev_err(bp->dev, "hwrm vnic %d set hds failure rc: %x\n", in __bnxt_setup_vnic_p5()
10497 vnic->vnic_id, rc); in __bnxt_setup_vnic_p5()
10505 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_setup_vnic()
10519 netdev_err(bp->dev, "hwrm vnic %d alloc failure rc: %x\n", in bnxt_alloc_and_setup_vnic()
10520 vnic->vnic_id, rc); in bnxt_alloc_and_setup_vnic()
10532 vnic = &bp->vnic_info[BNXT_VNIC_NTUPLE]; in bnxt_alloc_rfs_vnics()
10533 return bnxt_alloc_and_setup_vnic(bp, vnic, 0, bp->rx_nr_rings); in bnxt_alloc_rfs_vnics()
10536 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_rfs_vnics()
10539 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_rfs_vnics()
10543 if (vnic_id >= bp->nr_vnics) in bnxt_alloc_rfs_vnics()
10546 vnic = &bp->vnic_info[vnic_id]; in bnxt_alloc_rfs_vnics()
10547 vnic->flags |= BNXT_VNIC_RFS_FLAG; in bnxt_alloc_rfs_vnics()
10548 if (bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) in bnxt_alloc_rfs_vnics()
10549 vnic->flags |= BNXT_VNIC_RFS_NEW_RSS_FLAG; in bnxt_alloc_rfs_vnics()
10550 if (bnxt_alloc_and_setup_vnic(bp, &bp->vnic_info[vnic_id], ring_id, 1)) in bnxt_alloc_rfs_vnics()
10559 struct bnxt_vnic_info *vnic = &rss_ctx->vnic; in bnxt_del_one_rss_ctx()
10564 if (netif_running(bp->dev)) { in bnxt_del_one_rss_ctx()
10565 bnxt_hwrm_vnic_free_one(bp, &rss_ctx->vnic); in bnxt_del_one_rss_ctx()
10567 if (vnic->fw_rss_cos_lb_ctx[i] != INVALID_HW_RING_ID) in bnxt_del_one_rss_ctx()
10574 list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) { in bnxt_del_one_rss_ctx()
10575 if ((usr_fltr->flags & BNXT_ACT_RSS_CTX) && in bnxt_del_one_rss_ctx()
10576 usr_fltr->fw_vnic_id == rss_ctx->index) { in bnxt_del_one_rss_ctx()
10586 if (vnic->rss_table) in bnxt_del_one_rss_ctx()
10587 dma_free_coherent(&bp->pdev->dev, vnic->rss_table_size, in bnxt_del_one_rss_ctx()
10588 vnic->rss_table, in bnxt_del_one_rss_ctx()
10589 vnic->rss_table_dma_addr); in bnxt_del_one_rss_ctx()
10590 bp->num_rss_ctx--; in bnxt_del_one_rss_ctx()
10595 bool set_tpa = !!(bp->flags & BNXT_FLAG_TPA); in bnxt_hwrm_realloc_rss_ctx_vnic()
10599 xa_for_each(&bp->dev->ethtool->rss_ctx, context, ctx) { in bnxt_hwrm_realloc_rss_ctx_vnic()
10601 struct bnxt_vnic_info *vnic = &rss_ctx->vnic; in bnxt_hwrm_realloc_rss_ctx_vnic()
10603 if (bnxt_hwrm_vnic_alloc(bp, vnic, 0, bp->rx_nr_rings) || in bnxt_hwrm_realloc_rss_ctx_vnic()
10606 netdev_err(bp->dev, "Failed to restore RSS ctx %d\n", in bnxt_hwrm_realloc_rss_ctx_vnic()
10607 rss_ctx->index); in bnxt_hwrm_realloc_rss_ctx_vnic()
10609 ethtool_rxfh_context_lost(bp->dev, rss_ctx->index); in bnxt_hwrm_realloc_rss_ctx_vnic()
10619 xa_for_each(&bp->dev->ethtool->rss_ctx, context, ctx) { in bnxt_clear_rss_ctxs()
10630 if (BNXT_VF(bp) && !bp->vf.vlan && !bnxt_is_trusted_vf(bp, &bp->vf)) in bnxt_promisc_ok()
10638 struct bnxt_vnic_info *vnic = &bp->vnic_info[1]; in bnxt_setup_nitroa0_vnic()
10641 rc = bnxt_hwrm_vnic_alloc(bp, vnic, bp->rx_nr_rings - 1, 1); in bnxt_setup_nitroa0_vnic()
10643 netdev_err(bp->dev, "Cannot allocate special vnic for NS2 A0: %x\n", in bnxt_setup_nitroa0_vnic()
10650 netdev_err(bp->dev, "Cannot allocate special vnic for NS2 A0: %x\n", in bnxt_setup_nitroa0_vnic()
10662 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_init_chip()
10664 unsigned int rx_nr_rings = bp->rx_nr_rings; in bnxt_init_chip()
10669 netdev_err(bp->dev, "hwrm stat ctx alloc failure rc: %x\n", in bnxt_init_chip()
10677 netdev_err(bp->dev, "hwrm ring alloc failure rc: %x\n", rc); in bnxt_init_chip()
10683 netdev_err(bp->dev, "hwrm_ring_grp alloc failure: %x\n", rc); in bnxt_init_chip()
10688 rx_nr_rings--; in bnxt_init_chip()
10693 netdev_err(bp->dev, "hwrm vnic alloc failure rc: %x\n", rc); in bnxt_init_chip()
10703 if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA) in bnxt_init_chip()
10706 if (bp->flags & BNXT_FLAG_RFS) { in bnxt_init_chip()
10712 if (bp->flags & BNXT_FLAG_TPA) { in bnxt_init_chip()
10722 rc = bnxt_hwrm_set_vnic_filter(bp, 0, 0, bp->dev->dev_addr); in bnxt_init_chip()
10724 if (BNXT_VF(bp) && rc == -ENODEV) in bnxt_init_chip()
10725 netdev_err(bp->dev, "Cannot configure L2 filter while PF is unavailable\n"); in bnxt_init_chip()
10727 netdev_err(bp->dev, "HWRM vnic filter failure rc: %x\n", rc); in bnxt_init_chip()
10730 vnic->uc_filter_count = 1; in bnxt_init_chip()
10732 vnic->rx_mask = 0; in bnxt_init_chip()
10733 if (test_bit(BNXT_STATE_HALF_OPEN, &bp->state)) in bnxt_init_chip()
10736 if (bp->dev->flags & IFF_BROADCAST) in bnxt_init_chip()
10737 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST; in bnxt_init_chip()
10739 if (bp->dev->flags & IFF_PROMISC) in bnxt_init_chip()
10740 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; in bnxt_init_chip()
10742 if (bp->dev->flags & IFF_ALLMULTI) { in bnxt_init_chip()
10743 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; in bnxt_init_chip()
10744 vnic->mc_list_count = 0; in bnxt_init_chip()
10745 } else if (bp->dev->flags & IFF_MULTICAST) { in bnxt_init_chip()
10749 vnic->rx_mask |= mask; in bnxt_init_chip()
10759 netdev_warn(bp->dev, "HWRM set coalescing failure rc: %x\n", in bnxt_init_chip()
10765 netdev_err(bp->dev, "Special vnic setup failure for NS2 A0 rc: %x\n", in bnxt_init_chip()
10771 netdev_update_features(bp->dev); in bnxt_init_chip()
10802 struct net_device *dev = bp->dev; in bnxt_set_real_num_queues()
10804 rc = netif_set_real_num_tx_queues(dev, bp->tx_nr_rings - in bnxt_set_real_num_queues()
10805 bp->tx_nr_rings_xdp); in bnxt_set_real_num_queues()
10809 rc = netif_set_real_num_rx_queues(dev, bp->rx_nr_rings); in bnxt_set_real_num_queues()
10814 if (bp->flags & BNXT_FLAG_RFS) in bnxt_set_real_num_queues()
10815 dev->rx_cpu_rmap = alloc_irq_cpu_rmap(bp->rx_nr_rings); in bnxt_set_real_num_queues()
10831 return -ENOMEM; in __bnxt_trim_rings()
10835 _rx--; in __bnxt_trim_rings()
10837 _tx--; in __bnxt_trim_rings()
10847 return (tx - tx_xdp) / tx_sets + tx_xdp; in __bnxt_num_tx_to_cp()
10852 int tcs = bp->num_tc; in bnxt_num_tx_to_cp()
10856 return __bnxt_num_tx_to_cp(bp, tx, tcs, bp->tx_nr_rings_xdp); in bnxt_num_tx_to_cp()
10861 int tcs = bp->num_tc; in bnxt_num_cp_to_tx()
10863 return (tx_cp - bp->tx_nr_rings_xdp) * tcs + in bnxt_num_cp_to_tx()
10864 bp->tx_nr_rings_xdp; in bnxt_num_cp_to_tx()
10887 const int len = sizeof(bp->irq_tbl[0].name); in bnxt_setup_msix()
10888 struct net_device *dev = bp->dev; in bnxt_setup_msix()
10891 tcs = bp->num_tc; in bnxt_setup_msix()
10896 count = bp->tx_nr_rings_per_tc; in bnxt_setup_msix()
10902 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_setup_msix()
10906 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_setup_msix()
10908 else if (i < bp->rx_nr_rings) in bnxt_setup_msix()
10913 snprintf(bp->irq_tbl[map_idx].name, len, "%s-%s-%d", dev->name, in bnxt_setup_msix()
10915 bp->irq_tbl[map_idx].handler = bnxt_msix; in bnxt_setup_msix()
10927 for (i = bp->total_irqs; i < total; i++) { in bnxt_change_msix()
10928 map = pci_msix_alloc_irq_at(bp->pdev, i, NULL); in bnxt_change_msix()
10930 return bp->total_irqs; in bnxt_change_msix()
10931 bp->irq_tbl[i].vector = map.virq; in bnxt_change_msix()
10932 bp->total_irqs++; in bnxt_change_msix()
10936 for (i = bp->total_irqs; i > total; i--) { in bnxt_change_msix()
10937 map.index = i - 1; in bnxt_change_msix()
10938 map.virq = bp->irq_tbl[i - 1].vector; in bnxt_change_msix()
10939 pci_msix_free_irq(bp->pdev, map); in bnxt_change_msix()
10940 bp->total_irqs--; in bnxt_change_msix()
10942 return bp->total_irqs; in bnxt_change_msix()
10949 if (!bp->irq_tbl) { in bnxt_setup_int_mode()
10951 if (rc || !bp->irq_tbl) in bnxt_setup_int_mode()
10952 return rc ?: -ENODEV; in bnxt_setup_int_mode()
10963 return bp->hw_resc.max_rsscos_ctxs; in bnxt_get_max_func_rss_ctxs()
10968 return bp->hw_resc.max_vnics; in bnxt_get_max_func_vnics()
10973 return bp->hw_resc.max_stat_ctxs; in bnxt_get_max_func_stat_ctxs()
10978 return bp->hw_resc.max_cp_rings; in bnxt_get_max_func_cp_rings()
10983 unsigned int cp = bp->hw_resc.max_cp_rings; in bnxt_get_max_func_cp_rings_for_en()
10985 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_get_max_func_cp_rings_for_en()
10986 cp -= bnxt_get_ulp_msix_num(bp); in bnxt_get_max_func_cp_rings_for_en()
10993 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_get_max_func_irqs()
10995 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_get_max_func_irqs()
10996 return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_nqs); in bnxt_get_max_func_irqs()
10998 return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_cp_rings); in bnxt_get_max_func_irqs()
11003 bp->hw_resc.max_irqs = max_irqs; in bnxt_set_max_func_irqs()
11011 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_get_avail_cp_rings_for_en()
11012 return cp - bp->rx_nr_rings - bp->tx_nr_rings; in bnxt_get_avail_cp_rings_for_en()
11014 return cp - bp->cp_nr_rings; in bnxt_get_avail_cp_rings_for_en()
11019 return bnxt_get_max_func_stat_ctxs(bp) - bnxt_get_func_stat_ctxs(bp); in bnxt_get_avail_stat_ctxs_for_en()
11025 int total_req = bp->cp_nr_rings + num; in bnxt_get_avail_msix()
11028 num = max_irq - bp->cp_nr_rings; in bnxt_get_avail_msix()
11055 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) in bnxt_init_int_mode()
11058 total_vecs = pci_alloc_irq_vectors(bp->pdev, min, total_vecs, in bnxt_init_int_mode()
11062 rc = -ENODEV; in bnxt_init_int_mode()
11067 if (pci_msix_can_alloc_dyn(bp->pdev)) in bnxt_init_int_mode()
11069 bp->irq_tbl = kcalloc(tbl_size, sizeof(*bp->irq_tbl), GFP_KERNEL); in bnxt_init_int_mode()
11070 if (bp->irq_tbl) { in bnxt_init_int_mode()
11072 bp->irq_tbl[i].vector = pci_irq_vector(bp->pdev, i); in bnxt_init_int_mode()
11074 bp->total_irqs = total_vecs; in bnxt_init_int_mode()
11076 rc = bnxt_trim_rings(bp, &bp->rx_nr_rings, &bp->tx_nr_rings, in bnxt_init_int_mode()
11077 total_vecs - ulp_msix, min == 1); in bnxt_init_int_mode()
11081 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings); in bnxt_init_int_mode()
11082 bp->cp_nr_rings = (min == 1) ? in bnxt_init_int_mode()
11083 max_t(int, tx_cp, bp->rx_nr_rings) : in bnxt_init_int_mode()
11084 tx_cp + bp->rx_nr_rings; in bnxt_init_int_mode()
11087 rc = -ENOMEM; in bnxt_init_int_mode()
11093 netdev_err(bp->dev, "bnxt_init_int_mode err: %x\n", rc); in bnxt_init_int_mode()
11094 kfree(bp->irq_tbl); in bnxt_init_int_mode()
11095 bp->irq_tbl = NULL; in bnxt_init_int_mode()
11096 pci_free_irq_vectors(bp->pdev); in bnxt_init_int_mode()
11102 pci_free_irq_vectors(bp->pdev); in bnxt_clear_int_mode()
11104 kfree(bp->irq_tbl); in bnxt_clear_int_mode()
11105 bp->irq_tbl = NULL; in bnxt_clear_int_mode()
11112 int tcs = bp->num_tc; in bnxt_reserve_rings()
11119 if (BNXT_NEW_RM(bp) && !bnxt_ulp_registered(bp->edev)) { in bnxt_reserve_rings()
11120 int ulp_msix = bnxt_get_avail_msix(bp, bp->ulp_num_msix_want); in bnxt_reserve_rings()
11122 if (ulp_msix > bp->ulp_num_msix_want) in bnxt_reserve_rings()
11123 ulp_msix = bp->ulp_num_msix_want; in bnxt_reserve_rings()
11124 irqs_required = ulp_msix + bp->cp_nr_rings; in bnxt_reserve_rings()
11129 if (irq_re_init && BNXT_NEW_RM(bp) && irqs_required != bp->total_irqs) { in bnxt_reserve_rings()
11131 if (!pci_msix_can_alloc_dyn(bp->pdev)) { in bnxt_reserve_rings()
11144 rc = -ENOSPC; in bnxt_reserve_rings()
11147 netdev_err(bp->dev, "ring reservation/IRQ init failure rc: %d\n", rc); in bnxt_reserve_rings()
11150 if (tcs && (bp->tx_nr_rings_per_tc * tcs != in bnxt_reserve_rings()
11151 bp->tx_nr_rings - bp->tx_nr_rings_xdp)) { in bnxt_reserve_rings()
11152 netdev_err(bp->dev, "tx ring reservation failure\n"); in bnxt_reserve_rings()
11153 netdev_reset_tc(bp->dev); in bnxt_reserve_rings()
11154 bp->num_tc = 0; in bnxt_reserve_rings()
11155 if (bp->tx_nr_rings_xdp) in bnxt_reserve_rings()
11156 bp->tx_nr_rings_per_tc = bp->tx_nr_rings_xdp; in bnxt_reserve_rings()
11158 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_reserve_rings()
11159 return -ENOMEM; in bnxt_reserve_rings()
11170 free_irq_cpu_rmap(bp->dev->rx_cpu_rmap); in bnxt_free_irq()
11171 bp->dev->rx_cpu_rmap = NULL; in bnxt_free_irq()
11173 if (!bp->irq_tbl || !bp->bnapi) in bnxt_free_irq()
11176 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_irq()
11179 irq = &bp->irq_tbl[map_idx]; in bnxt_free_irq()
11180 if (irq->requested) { in bnxt_free_irq()
11181 if (irq->have_cpumask) { in bnxt_free_irq()
11182 irq_update_affinity_hint(irq->vector, NULL); in bnxt_free_irq()
11183 free_cpumask_var(irq->cpu_mask); in bnxt_free_irq()
11184 irq->have_cpumask = 0; in bnxt_free_irq()
11186 free_irq(irq->vector, bp->bnapi[i]); in bnxt_free_irq()
11189 irq->requested = 0; in bnxt_free_irq()
11203 netdev_err(bp->dev, "bnxt_setup_int_mode err: %x\n", in bnxt_request_irq()
11208 rmap = bp->dev->rx_cpu_rmap; in bnxt_request_irq()
11210 for (i = 0, j = 0; i < bp->cp_nr_rings; i++) { in bnxt_request_irq()
11212 struct bnxt_irq *irq = &bp->irq_tbl[map_idx]; in bnxt_request_irq()
11215 if (rmap && bp->bnapi[i]->rx_ring) { in bnxt_request_irq()
11216 rc = irq_cpu_rmap_add(rmap, irq->vector); in bnxt_request_irq()
11218 netdev_warn(bp->dev, "failed adding irq rmap for ring %d\n", in bnxt_request_irq()
11223 rc = request_irq(irq->vector, irq->handler, flags, irq->name, in bnxt_request_irq()
11224 bp->bnapi[i]); in bnxt_request_irq()
11228 netif_napi_set_irq(&bp->bnapi[i]->napi, irq->vector); in bnxt_request_irq()
11229 irq->requested = 1; in bnxt_request_irq()
11231 if (zalloc_cpumask_var(&irq->cpu_mask, GFP_KERNEL)) { in bnxt_request_irq()
11232 int numa_node = dev_to_node(&bp->pdev->dev); in bnxt_request_irq()
11234 irq->have_cpumask = 1; in bnxt_request_irq()
11236 irq->cpu_mask); in bnxt_request_irq()
11237 rc = irq_update_affinity_hint(irq->vector, irq->cpu_mask); in bnxt_request_irq()
11239 netdev_warn(bp->dev, in bnxt_request_irq()
11241 irq->vector); in bnxt_request_irq()
11253 if (!bp->bnapi) in bnxt_del_napi()
11256 for (i = 0; i < bp->rx_nr_rings; i++) in bnxt_del_napi()
11257 netif_queue_set_napi(bp->dev, i, NETDEV_QUEUE_TYPE_RX, NULL); in bnxt_del_napi()
11258 for (i = 0; i < bp->tx_nr_rings - bp->tx_nr_rings_xdp; i++) in bnxt_del_napi()
11259 netif_queue_set_napi(bp->dev, i, NETDEV_QUEUE_TYPE_TX, NULL); in bnxt_del_napi()
11261 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_del_napi()
11262 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_del_napi()
11264 __netif_napi_del(&bnapi->napi); in bnxt_del_napi()
11275 unsigned int cp_nr_rings = bp->cp_nr_rings; in bnxt_init_napi()
11279 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_init_napi()
11282 cp_nr_rings--; in bnxt_init_napi()
11284 bnapi = bp->bnapi[i]; in bnxt_init_napi()
11285 netif_napi_add_config(bp->dev, &bnapi->napi, poll_fn, in bnxt_init_napi()
11286 bnapi->index); in bnxt_init_napi()
11289 bnapi = bp->bnapi[cp_nr_rings]; in bnxt_init_napi()
11290 netif_napi_add(bp->dev, &bnapi->napi, bnxt_poll_nitroa0); in bnxt_init_napi()
11298 if (!bp->bnapi || in bnxt_disable_napi()
11299 test_and_set_bit(BNXT_STATE_NAPI_DISABLED, &bp->state)) in bnxt_disable_napi()
11302 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_disable_napi()
11303 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_disable_napi()
11306 cpr = &bnapi->cp_ring; in bnxt_disable_napi()
11307 if (bnapi->tx_fault) in bnxt_disable_napi()
11308 cpr->sw_stats->tx.tx_resets++; in bnxt_disable_napi()
11309 if (bnapi->in_reset) in bnxt_disable_napi()
11310 cpr->sw_stats->rx.rx_resets++; in bnxt_disable_napi()
11311 napi_disable(&bnapi->napi); in bnxt_disable_napi()
11312 if (bnapi->rx_ring) in bnxt_disable_napi()
11313 cancel_work_sync(&cpr->dim.work); in bnxt_disable_napi()
11321 clear_bit(BNXT_STATE_NAPI_DISABLED, &bp->state); in bnxt_enable_napi()
11322 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_enable_napi()
11323 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_enable_napi()
11326 bnapi->tx_fault = 0; in bnxt_enable_napi()
11328 cpr = &bnapi->cp_ring; in bnxt_enable_napi()
11329 bnapi->in_reset = false; in bnxt_enable_napi()
11331 if (bnapi->rx_ring) { in bnxt_enable_napi()
11332 INIT_WORK(&cpr->dim.work, bnxt_dim_work); in bnxt_enable_napi()
11333 cpr->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in bnxt_enable_napi()
11335 napi_enable(&bnapi->napi); in bnxt_enable_napi()
11344 if (bp->tx_ring) { in bnxt_tx_disable()
11345 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_tx_disable()
11346 txr = &bp->tx_ring[i]; in bnxt_tx_disable()
11347 WRITE_ONCE(txr->dev_state, BNXT_DEV_STATE_CLOSING); in bnxt_tx_disable()
11353 netif_carrier_off(bp->dev); in bnxt_tx_disable()
11355 netif_tx_disable(bp->dev); in bnxt_tx_disable()
11363 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_tx_enable()
11364 txr = &bp->tx_ring[i]; in bnxt_tx_enable()
11365 WRITE_ONCE(txr->dev_state, 0); in bnxt_tx_enable()
11369 netif_tx_wake_all_queues(bp->dev); in bnxt_tx_enable()
11371 netif_carrier_on(bp->dev); in bnxt_tx_enable()
11376 u8 active_fec = link_info->active_fec_sig_mode & in bnxt_report_fec()
11407 netif_carrier_on(bp->dev); in bnxt_report_link()
11408 speed = bnxt_fw_to_ethtool_speed(bp->link_info.link_speed); in bnxt_report_link()
11410 netdev_info(bp->dev, "NIC Link is Up, speed unknown\n"); in bnxt_report_link()
11413 if (bp->link_info.duplex == BNXT_LINK_DUPLEX_FULL) in bnxt_report_link()
11417 if (bp->link_info.pause == BNXT_LINK_PAUSE_BOTH) in bnxt_report_link()
11418 flow_ctrl = "ON - receive & transmit"; in bnxt_report_link()
11419 else if (bp->link_info.pause == BNXT_LINK_PAUSE_TX) in bnxt_report_link()
11420 flow_ctrl = "ON - transmit"; in bnxt_report_link()
11421 else if (bp->link_info.pause == BNXT_LINK_PAUSE_RX) in bnxt_report_link()
11422 flow_ctrl = "ON - receive"; in bnxt_report_link()
11425 if (bp->link_info.phy_qcfg_resp.option_flags & in bnxt_report_link()
11427 u8 sig_mode = bp->link_info.active_fec_sig_mode & in bnxt_report_link()
11443 netdev_info(bp->dev, "NIC Link is Up, %u Mbps %s%s duplex, Flow control: %s\n", in bnxt_report_link()
11445 if (bp->phy_flags & BNXT_PHY_FL_EEE_CAP) in bnxt_report_link()
11446 netdev_info(bp->dev, "EEE is %s\n", in bnxt_report_link()
11447 bp->eee.eee_active ? "active" : in bnxt_report_link()
11449 fec = bp->link_info.fec_cfg; in bnxt_report_link()
11451 netdev_info(bp->dev, "FEC autoneg %s encoding: %s\n", in bnxt_report_link()
11453 bnxt_report_fec(&bp->link_info)); in bnxt_report_link()
11455 netif_carrier_off(bp->dev); in bnxt_report_link()
11456 netdev_err(bp->dev, "NIC Link is Down\n"); in bnxt_report_link()
11462 if (!resp->supported_speeds_auto_mode && in bnxt_phy_qcaps_no_speed()
11463 !resp->supported_speeds_force_mode && in bnxt_phy_qcaps_no_speed()
11464 !resp->supported_pam4_speeds_auto_mode && in bnxt_phy_qcaps_no_speed()
11465 !resp->supported_pam4_speeds_force_mode && in bnxt_phy_qcaps_no_speed()
11466 !resp->supported_speeds2_auto_mode && in bnxt_phy_qcaps_no_speed()
11467 !resp->supported_speeds2_force_mode) in bnxt_phy_qcaps_no_speed()
11474 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_hwrm_phy_qcaps()
11479 if (bp->hwrm_spec_code < 0x10201) in bnxt_hwrm_phy_qcaps()
11491 bp->phy_flags = resp->flags | (le16_to_cpu(resp->flags2) << 8); in bnxt_hwrm_phy_qcaps()
11492 if (resp->flags & PORT_PHY_QCAPS_RESP_FLAGS_EEE_SUPPORTED) { in bnxt_hwrm_phy_qcaps()
11493 struct ethtool_keee *eee = &bp->eee; in bnxt_hwrm_phy_qcaps()
11494 u16 fw_speeds = le16_to_cpu(resp->supported_speeds_eee_mode); in bnxt_hwrm_phy_qcaps()
11496 _bnxt_fw_to_linkmode(eee->supported, fw_speeds); in bnxt_hwrm_phy_qcaps()
11497 bp->lpi_tmr_lo = le32_to_cpu(resp->tx_lpi_timer_low) & in bnxt_hwrm_phy_qcaps()
11499 bp->lpi_tmr_hi = le32_to_cpu(resp->valid_tx_lpi_timer_high) & in bnxt_hwrm_phy_qcaps()
11503 if (bp->hwrm_spec_code >= 0x10a01) { in bnxt_hwrm_phy_qcaps()
11505 link_info->phy_state = BNXT_PHY_STATE_DISABLED; in bnxt_hwrm_phy_qcaps()
11506 netdev_warn(bp->dev, "Ethernet link disabled\n"); in bnxt_hwrm_phy_qcaps()
11507 } else if (link_info->phy_state == BNXT_PHY_STATE_DISABLED) { in bnxt_hwrm_phy_qcaps()
11508 link_info->phy_state = BNXT_PHY_STATE_ENABLED; in bnxt_hwrm_phy_qcaps()
11509 netdev_info(bp->dev, "Ethernet link enabled\n"); in bnxt_hwrm_phy_qcaps()
11510 /* Phy re-enabled, reprobe the speeds */ in bnxt_hwrm_phy_qcaps()
11511 link_info->support_auto_speeds = 0; in bnxt_hwrm_phy_qcaps()
11512 link_info->support_pam4_auto_speeds = 0; in bnxt_hwrm_phy_qcaps()
11513 link_info->support_auto_speeds2 = 0; in bnxt_hwrm_phy_qcaps()
11516 if (resp->supported_speeds_auto_mode) in bnxt_hwrm_phy_qcaps()
11517 link_info->support_auto_speeds = in bnxt_hwrm_phy_qcaps()
11518 le16_to_cpu(resp->supported_speeds_auto_mode); in bnxt_hwrm_phy_qcaps()
11519 if (resp->supported_pam4_speeds_auto_mode) in bnxt_hwrm_phy_qcaps()
11520 link_info->support_pam4_auto_speeds = in bnxt_hwrm_phy_qcaps()
11521 le16_to_cpu(resp->supported_pam4_speeds_auto_mode); in bnxt_hwrm_phy_qcaps()
11522 if (resp->supported_speeds2_auto_mode) in bnxt_hwrm_phy_qcaps()
11523 link_info->support_auto_speeds2 = in bnxt_hwrm_phy_qcaps()
11524 le16_to_cpu(resp->supported_speeds2_auto_mode); in bnxt_hwrm_phy_qcaps()
11526 bp->port_count = resp->port_cnt; in bnxt_hwrm_phy_qcaps()
11547 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_support_speed_dropped()
11548 if (bnxt_support_dropped(link_info->advertising, in bnxt_support_speed_dropped()
11549 link_info->support_auto_speeds2)) { in bnxt_support_speed_dropped()
11550 link_info->advertising = link_info->support_auto_speeds2; in bnxt_support_speed_dropped()
11555 if (bnxt_support_dropped(link_info->advertising, in bnxt_support_speed_dropped()
11556 link_info->support_auto_speeds)) { in bnxt_support_speed_dropped()
11557 link_info->advertising = link_info->support_auto_speeds; in bnxt_support_speed_dropped()
11560 if (bnxt_support_dropped(link_info->advertising_pam4, in bnxt_support_speed_dropped()
11561 link_info->support_pam4_auto_speeds)) { in bnxt_support_speed_dropped()
11562 link_info->advertising_pam4 = link_info->support_pam4_auto_speeds; in bnxt_support_speed_dropped()
11570 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_update_link()
11573 u8 link_state = link_info->link_state; in bnxt_update_link()
11585 if (BNXT_VF(bp) && rc == -ENODEV) { in bnxt_update_link()
11586 netdev_warn(bp->dev, "Cannot obtain link state while PF unavailable.\n"); in bnxt_update_link()
11592 memcpy(&link_info->phy_qcfg_resp, resp, sizeof(*resp)); in bnxt_update_link()
11593 link_info->phy_link_status = resp->link; in bnxt_update_link()
11594 link_info->duplex = resp->duplex_cfg; in bnxt_update_link()
11595 if (bp->hwrm_spec_code >= 0x10800) in bnxt_update_link()
11596 link_info->duplex = resp->duplex_state; in bnxt_update_link()
11597 link_info->pause = resp->pause; in bnxt_update_link()
11598 link_info->auto_mode = resp->auto_mode; in bnxt_update_link()
11599 link_info->auto_pause_setting = resp->auto_pause; in bnxt_update_link()
11600 link_info->lp_pause = resp->link_partner_adv_pause; in bnxt_update_link()
11601 link_info->force_pause_setting = resp->force_pause; in bnxt_update_link()
11602 link_info->duplex_setting = resp->duplex_cfg; in bnxt_update_link()
11603 if (link_info->phy_link_status == BNXT_LINK_LINK) { in bnxt_update_link()
11604 link_info->link_speed = le16_to_cpu(resp->link_speed); in bnxt_update_link()
11605 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) in bnxt_update_link()
11606 link_info->active_lanes = resp->active_lanes; in bnxt_update_link()
11608 link_info->link_speed = 0; in bnxt_update_link()
11609 link_info->active_lanes = 0; in bnxt_update_link()
11611 link_info->force_link_speed = le16_to_cpu(resp->force_link_speed); in bnxt_update_link()
11612 link_info->force_pam4_link_speed = in bnxt_update_link()
11613 le16_to_cpu(resp->force_pam4_link_speed); in bnxt_update_link()
11614 link_info->force_link_speed2 = le16_to_cpu(resp->force_link_speeds2); in bnxt_update_link()
11615 link_info->support_speeds = le16_to_cpu(resp->support_speeds); in bnxt_update_link()
11616 link_info->support_pam4_speeds = le16_to_cpu(resp->support_pam4_speeds); in bnxt_update_link()
11617 link_info->support_speeds2 = le16_to_cpu(resp->support_speeds2); in bnxt_update_link()
11618 link_info->auto_link_speeds = le16_to_cpu(resp->auto_link_speed_mask); in bnxt_update_link()
11619 link_info->auto_pam4_link_speeds = in bnxt_update_link()
11620 le16_to_cpu(resp->auto_pam4_link_speed_mask); in bnxt_update_link()
11621 link_info->auto_link_speeds2 = le16_to_cpu(resp->auto_link_speeds2); in bnxt_update_link()
11622 link_info->lp_auto_link_speeds = in bnxt_update_link()
11623 le16_to_cpu(resp->link_partner_adv_speeds); in bnxt_update_link()
11624 link_info->lp_auto_pam4_link_speeds = in bnxt_update_link()
11625 resp->link_partner_pam4_adv_speeds; in bnxt_update_link()
11626 link_info->preemphasis = le32_to_cpu(resp->preemphasis); in bnxt_update_link()
11627 link_info->phy_ver[0] = resp->phy_maj; in bnxt_update_link()
11628 link_info->phy_ver[1] = resp->phy_min; in bnxt_update_link()
11629 link_info->phy_ver[2] = resp->phy_bld; in bnxt_update_link()
11630 link_info->media_type = resp->media_type; in bnxt_update_link()
11631 link_info->phy_type = resp->phy_type; in bnxt_update_link()
11632 link_info->transceiver = resp->xcvr_pkg_type; in bnxt_update_link()
11633 link_info->phy_addr = resp->eee_config_phy_addr & in bnxt_update_link()
11635 link_info->module_status = resp->module_status; in bnxt_update_link()
11637 if (bp->phy_flags & BNXT_PHY_FL_EEE_CAP) { in bnxt_update_link()
11638 struct ethtool_keee *eee = &bp->eee; in bnxt_update_link()
11641 eee->eee_active = 0; in bnxt_update_link()
11642 if (resp->eee_config_phy_addr & in bnxt_update_link()
11644 eee->eee_active = 1; in bnxt_update_link()
11646 resp->link_partner_adv_eee_link_speed_mask); in bnxt_update_link()
11647 _bnxt_fw_to_linkmode(eee->lp_advertised, fw_speeds); in bnxt_update_link()
11652 if (resp->eee_config_phy_addr & in bnxt_update_link()
11654 eee->eee_enabled = 1; in bnxt_update_link()
11656 fw_speeds = le16_to_cpu(resp->adv_eee_link_speed_mask); in bnxt_update_link()
11657 _bnxt_fw_to_linkmode(eee->advertised, fw_speeds); in bnxt_update_link()
11659 if (resp->eee_config_phy_addr & in bnxt_update_link()
11663 eee->tx_lpi_enabled = 1; in bnxt_update_link()
11664 tmr = resp->xcvr_identifier_type_tx_lpi_timer; in bnxt_update_link()
11665 eee->tx_lpi_timer = le32_to_cpu(tmr) & in bnxt_update_link()
11671 link_info->fec_cfg = PORT_PHY_QCFG_RESP_FEC_CFG_FEC_NONE_SUPPORTED; in bnxt_update_link()
11672 if (bp->hwrm_spec_code >= 0x10504) { in bnxt_update_link()
11673 link_info->fec_cfg = le16_to_cpu(resp->fec_cfg); in bnxt_update_link()
11674 link_info->active_fec_sig_mode = resp->active_fec_signal_mode; in bnxt_update_link()
11678 if (link_info->phy_link_status == BNXT_LINK_LINK) in bnxt_update_link()
11679 link_info->link_state = BNXT_LINK_STATE_UP; in bnxt_update_link()
11681 link_info->link_state = BNXT_LINK_STATE_DOWN; in bnxt_update_link()
11682 if (link_state != link_info->link_state) in bnxt_update_link()
11686 link_info->link_state = BNXT_LINK_STATE_DOWN; in bnxt_update_link()
11694 if (support_changed && (link_info->autoneg & BNXT_AUTONEG_SPEED)) in bnxt_update_link()
11701 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_get_port_module_status()
11702 struct hwrm_port_phy_qcfg_output *resp = &link_info->phy_qcfg_resp; in bnxt_get_port_module_status()
11708 module_status = link_info->module_status; in bnxt_get_port_module_status()
11713 netdev_warn(bp->dev, "Unqualified SFP+ module detected on port %d\n", in bnxt_get_port_module_status()
11714 bp->pf.port_id); in bnxt_get_port_module_status()
11715 if (bp->hwrm_spec_code >= 0x10201) { in bnxt_get_port_module_status()
11716 netdev_warn(bp->dev, "Module part number %s\n", in bnxt_get_port_module_status()
11717 resp->phy_vendor_partnumber); in bnxt_get_port_module_status()
11720 netdev_warn(bp->dev, "TX is disabled\n"); in bnxt_get_port_module_status()
11722 netdev_warn(bp->dev, "SFP+ module is shutdown\n"); in bnxt_get_port_module_status()
11729 if (bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) { in bnxt_hwrm_set_pause_common()
11730 if (bp->hwrm_spec_code >= 0x10201) in bnxt_hwrm_set_pause_common()
11731 req->auto_pause = in bnxt_hwrm_set_pause_common()
11733 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_RX) in bnxt_hwrm_set_pause_common()
11734 req->auto_pause |= PORT_PHY_CFG_REQ_AUTO_PAUSE_RX; in bnxt_hwrm_set_pause_common()
11735 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_TX) in bnxt_hwrm_set_pause_common()
11736 req->auto_pause |= PORT_PHY_CFG_REQ_AUTO_PAUSE_TX; in bnxt_hwrm_set_pause_common()
11737 req->enables |= in bnxt_hwrm_set_pause_common()
11740 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_RX) in bnxt_hwrm_set_pause_common()
11741 req->force_pause |= PORT_PHY_CFG_REQ_FORCE_PAUSE_RX; in bnxt_hwrm_set_pause_common()
11742 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_TX) in bnxt_hwrm_set_pause_common()
11743 req->force_pause |= PORT_PHY_CFG_REQ_FORCE_PAUSE_TX; in bnxt_hwrm_set_pause_common()
11744 req->enables |= in bnxt_hwrm_set_pause_common()
11746 if (bp->hwrm_spec_code >= 0x10201) { in bnxt_hwrm_set_pause_common()
11747 req->auto_pause = req->force_pause; in bnxt_hwrm_set_pause_common()
11748 req->enables |= cpu_to_le32( in bnxt_hwrm_set_pause_common()
11756 if (bp->link_info.autoneg & BNXT_AUTONEG_SPEED) { in bnxt_hwrm_set_link_common()
11757 req->auto_mode |= PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK; in bnxt_hwrm_set_link_common()
11758 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_hwrm_set_link_common()
11759 req->enables |= in bnxt_hwrm_set_link_common()
11761 req->auto_link_speeds2_mask = cpu_to_le16(bp->link_info.advertising); in bnxt_hwrm_set_link_common()
11762 } else if (bp->link_info.advertising) { in bnxt_hwrm_set_link_common()
11763 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED_MASK); in bnxt_hwrm_set_link_common()
11764 req->auto_link_speed_mask = cpu_to_le16(bp->link_info.advertising); in bnxt_hwrm_set_link_common()
11766 if (bp->link_info.advertising_pam4) { in bnxt_hwrm_set_link_common()
11767 req->enables |= in bnxt_hwrm_set_link_common()
11769 req->auto_link_pam4_speed_mask = in bnxt_hwrm_set_link_common()
11770 cpu_to_le16(bp->link_info.advertising_pam4); in bnxt_hwrm_set_link_common()
11772 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_AUTO_MODE); in bnxt_hwrm_set_link_common()
11773 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_RESTART_AUTONEG); in bnxt_hwrm_set_link_common()
11775 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE); in bnxt_hwrm_set_link_common()
11776 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_hwrm_set_link_common()
11777 req->force_link_speeds2 = cpu_to_le16(bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
11778 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_FORCE_LINK_SPEEDS2); in bnxt_hwrm_set_link_common()
11779 netif_info(bp, link, bp->dev, "Forcing FW speed2: %d\n", in bnxt_hwrm_set_link_common()
11780 (u32)bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
11781 } else if (bp->link_info.req_signal_mode == BNXT_SIG_MODE_PAM4) { in bnxt_hwrm_set_link_common()
11782 req->force_pam4_link_speed = cpu_to_le16(bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
11783 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_FORCE_PAM4_LINK_SPEED); in bnxt_hwrm_set_link_common()
11785 req->force_link_speed = cpu_to_le16(bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
11790 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); in bnxt_hwrm_set_link_common()
11804 if ((bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) || in bnxt_hwrm_set_pause()
11805 bp->link_info.force_link_chng) in bnxt_hwrm_set_pause()
11809 if (!rc && !(bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)) { in bnxt_hwrm_set_pause()
11814 bp->link_info.pause = in bnxt_hwrm_set_pause()
11815 bp->link_info.force_pause_setting = bp->link_info.req_flow_ctrl; in bnxt_hwrm_set_pause()
11816 bp->link_info.auto_pause_setting = 0; in bnxt_hwrm_set_pause()
11817 if (!bp->link_info.force_link_chng) in bnxt_hwrm_set_pause()
11820 bp->link_info.force_link_chng = false; in bnxt_hwrm_set_pause()
11827 struct ethtool_keee *eee = &bp->eee; in bnxt_hwrm_set_eee()
11829 if (eee->eee_enabled) { in bnxt_hwrm_set_eee()
11833 if (eee->tx_lpi_enabled) in bnxt_hwrm_set_eee()
11838 req->flags |= cpu_to_le32(flags); in bnxt_hwrm_set_eee()
11839 eee_speeds = bnxt_get_fw_auto_link_speeds(eee->advertised); in bnxt_hwrm_set_eee()
11840 req->eee_link_speed_mask = cpu_to_le16(eee_speeds); in bnxt_hwrm_set_eee()
11841 req->tx_lpi_timer = cpu_to_le32(eee->tx_lpi_timer); in bnxt_hwrm_set_eee()
11843 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_EEE_DISABLE); in bnxt_hwrm_set_eee()
11874 if (pci_num_vf(bp->pdev) && in bnxt_hwrm_shutdown_link()
11875 !(bp->phy_flags & BNXT_PHY_FL_FW_MANAGED_LKDN)) in bnxt_hwrm_shutdown_link()
11882 req->flags = cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE_LINK_DWN); in bnxt_hwrm_shutdown_link()
11885 mutex_lock(&bp->link_lock); in bnxt_hwrm_shutdown_link()
11891 bp->link_info.link_state = BNXT_LINK_STATE_UNKNOWN; in bnxt_hwrm_shutdown_link()
11892 mutex_unlock(&bp->link_lock); in bnxt_hwrm_shutdown_link()
11903 netdev_err(bp->dev, "Failed FW reset via OP-TEE, rc=%d\n", rc); in bnxt_fw_reset_via_optee()
11907 netdev_err(bp->dev, "OP-TEE not supported\n"); in bnxt_fw_reset_via_optee()
11908 return -ENODEV; in bnxt_fw_reset_via_optee()
11914 if (bp->fw_health && bp->fw_health->status_reliable) { in bnxt_try_recover_fw()
11925 } while (rc == -EBUSY && retry < BNXT_FW_RETRY); in bnxt_try_recover_fw()
11928 netdev_err(bp->dev, in bnxt_try_recover_fw()
11929 "Firmware not responding, status: 0x%x\n", in bnxt_try_recover_fw()
11931 rc = -ENODEV; in bnxt_try_recover_fw()
11934 netdev_warn(bp->dev, "Firmware recover via OP-TEE requested\n"); in bnxt_try_recover_fw()
11940 return -ENODEV; in bnxt_try_recover_fw()
11945 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_clear_reservations()
11950 hw_resc->resv_cp_rings = 0; in bnxt_clear_reservations()
11951 hw_resc->resv_stat_ctxs = 0; in bnxt_clear_reservations()
11952 hw_resc->resv_irqs = 0; in bnxt_clear_reservations()
11953 hw_resc->resv_tx_rings = 0; in bnxt_clear_reservations()
11954 hw_resc->resv_rx_rings = 0; in bnxt_clear_reservations()
11955 hw_resc->resv_hw_ring_grps = 0; in bnxt_clear_reservations()
11956 hw_resc->resv_vnics = 0; in bnxt_clear_reservations()
11957 hw_resc->resv_rsscos_ctxs = 0; in bnxt_clear_reservations()
11959 bp->tx_nr_rings = 0; in bnxt_clear_reservations()
11960 bp->rx_nr_rings = 0; in bnxt_clear_reservations()
11973 netdev_err(bp->dev, "resc_qcaps failed\n"); in bnxt_cancel_reservations()
11984 bool fw_reset = !bp->irq_tbl; in bnxt_hwrm_if_change()
11989 if (!(bp->fw_cap & BNXT_FW_CAP_IF_CHANGE)) in bnxt_hwrm_if_change()
11997 req->flags = cpu_to_le32(FUNC_DRV_IF_CHANGE_REQ_FLAGS_UP); in bnxt_hwrm_if_change()
12003 if (rc != -EAGAIN) in bnxt_hwrm_if_change()
12010 if (rc == -EAGAIN) { in bnxt_hwrm_if_change()
12014 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_if_change()
12031 test_bit(BNXT_STATE_FW_RESET_DET, &bp->state)) in bnxt_hwrm_if_change()
12036 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state) && !fw_reset) { in bnxt_hwrm_if_change()
12037 netdev_err(bp->dev, "RESET_DONE not set during FW reset.\n"); in bnxt_hwrm_if_change()
12038 set_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_hwrm_if_change()
12039 return -ENODEV; in bnxt_hwrm_if_change()
12043 set_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_hwrm_if_change()
12044 if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_hwrm_if_change()
12050 clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_hwrm_if_change()
12051 set_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_hwrm_if_change()
12057 clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_hwrm_if_change()
12058 netdev_err(bp->dev, "init int mode failed\n"); in bnxt_hwrm_if_change()
12071 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_port_led_qcaps()
12074 bp->num_leds = 0; in bnxt_hwrm_port_led_qcaps()
12075 if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10601) in bnxt_hwrm_port_led_qcaps()
12082 req->port_id = cpu_to_le16(pf->port_id); in bnxt_hwrm_port_led_qcaps()
12089 if (resp->num_leds > 0 && resp->num_leds < BNXT_MAX_LED) { in bnxt_hwrm_port_led_qcaps()
12092 bp->num_leds = resp->num_leds; in bnxt_hwrm_port_led_qcaps()
12093 memcpy(bp->leds, &resp->led0_id, sizeof(bp->leds[0]) * in bnxt_hwrm_port_led_qcaps()
12094 bp->num_leds); in bnxt_hwrm_port_led_qcaps()
12095 for (i = 0; i < bp->num_leds; i++) { in bnxt_hwrm_port_led_qcaps()
12096 struct bnxt_led_info *led = &bp->leds[i]; in bnxt_hwrm_port_led_qcaps()
12097 __le16 caps = led->led_state_caps; in bnxt_hwrm_port_led_qcaps()
12099 if (!led->led_group_id || in bnxt_hwrm_port_led_qcaps()
12101 bp->num_leds = 0; in bnxt_hwrm_port_led_qcaps()
12120 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_alloc_wol_fltr()
12121 req->wol_type = WOL_FILTER_ALLOC_REQ_WOL_TYPE_MAGICPKT; in bnxt_hwrm_alloc_wol_fltr()
12122 req->enables = cpu_to_le32(WOL_FILTER_ALLOC_REQ_ENABLES_MAC_ADDRESS); in bnxt_hwrm_alloc_wol_fltr()
12123 memcpy(req->mac_address, bp->dev->dev_addr, ETH_ALEN); in bnxt_hwrm_alloc_wol_fltr()
12128 bp->wol_filter_id = resp->wol_filter_id; in bnxt_hwrm_alloc_wol_fltr()
12142 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_free_wol_fltr()
12143 req->enables = cpu_to_le32(WOL_FILTER_FREE_REQ_ENABLES_WOL_FILTER_ID); in bnxt_hwrm_free_wol_fltr()
12144 req->wol_filter_id = bp->wol_filter_id; in bnxt_hwrm_free_wol_fltr()
12160 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_get_wol_fltrs()
12161 req->handle = cpu_to_le16(handle); in bnxt_hwrm_get_wol_fltrs()
12165 next_handle = le16_to_cpu(resp->next_handle); in bnxt_hwrm_get_wol_fltrs()
12167 if (resp->wol_type == in bnxt_hwrm_get_wol_fltrs()
12169 bp->wol = 1; in bnxt_hwrm_get_wol_fltrs()
12170 bp->wol_filter_id = resp->wol_filter_id; in bnxt_hwrm_get_wol_fltrs()
12182 bp->wol = 0; in bnxt_get_wol_settings()
12183 if (!BNXT_PF(bp) || !(bp->flags & BNXT_FLAG_WOL_CAP)) in bnxt_get_wol_settings()
12193 struct ethtool_keee *eee = &bp->eee; in bnxt_eee_config_ok()
12194 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_eee_config_ok()
12196 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) in bnxt_eee_config_ok()
12199 if (eee->eee_enabled) { in bnxt_eee_config_ok()
12203 _bnxt_fw_to_linkmode(advertising, link_info->advertising); in bnxt_eee_config_ok()
12205 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { in bnxt_eee_config_ok()
12206 eee->eee_enabled = 0; in bnxt_eee_config_ok()
12209 if (linkmode_andnot(tmp, eee->advertised, advertising)) { in bnxt_eee_config_ok()
12210 linkmode_and(eee->advertised, advertising, in bnxt_eee_config_ok()
12211 eee->supported); in bnxt_eee_config_ok()
12224 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_update_phy_setting()
12228 netdev_err(bp->dev, "failed to update link (rc: %x)\n", in bnxt_update_phy_setting()
12235 if ((link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) && in bnxt_update_phy_setting()
12236 (link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH) != in bnxt_update_phy_setting()
12237 link_info->req_flow_ctrl) in bnxt_update_phy_setting()
12239 if (!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) && in bnxt_update_phy_setting()
12240 link_info->force_pause_setting != link_info->req_flow_ctrl) in bnxt_update_phy_setting()
12242 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { in bnxt_update_phy_setting()
12243 if (BNXT_AUTO_MODE(link_info->auto_mode)) in bnxt_update_phy_setting()
12247 if (link_info->req_duplex != link_info->duplex_setting) in bnxt_update_phy_setting()
12250 if (link_info->auto_mode == BNXT_LINK_AUTO_NONE) in bnxt_update_phy_setting()
12270 netdev_err(bp->dev, "failed to update phy setting (rc: %x)\n", in bnxt_update_phy_setting()
12284 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_reinit_after_abort()
12285 return -EBUSY; in bnxt_reinit_after_abort()
12287 if (bp->dev->reg_state == NETREG_UNREGISTERED) in bnxt_reinit_after_abort()
12288 return -ENODEV; in bnxt_reinit_after_abort()
12295 clear_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_reinit_after_abort()
12296 set_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_reinit_after_abort()
12307 if (list_empty(&fltr->list)) in bnxt_cfg_one_usr_fltr()
12310 if (fltr->type == BNXT_FLTR_TYPE_NTUPLE) { in bnxt_cfg_one_usr_fltr()
12312 l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0]; in bnxt_cfg_one_usr_fltr()
12313 atomic_inc(&l2_fltr->refcnt); in bnxt_cfg_one_usr_fltr()
12314 ntp_fltr->l2_fltr = l2_fltr; in bnxt_cfg_one_usr_fltr()
12317 netdev_err(bp->dev, "restoring previously configured ntuple filter id %d failed\n", in bnxt_cfg_one_usr_fltr()
12318 fltr->sw_id); in bnxt_cfg_one_usr_fltr()
12320 } else if (fltr->type == BNXT_FLTR_TYPE_L2) { in bnxt_cfg_one_usr_fltr()
12324 netdev_err(bp->dev, "restoring previously configured l2 filter id %d failed\n", in bnxt_cfg_one_usr_fltr()
12325 fltr->sw_id); in bnxt_cfg_one_usr_fltr()
12334 list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) in bnxt_cfg_usr_fltrs()
12340 int numa_node = dev_to_node(&bp->pdev->dev); in bnxt_set_xps_mapping()
12347 q_map = kcalloc(bp->tx_nr_rings_per_tc, sizeof(*q_map), GFP_KERNEL); in bnxt_set_xps_mapping()
12349 return -ENOMEM; in bnxt_set_xps_mapping()
12356 map_idx = i % bp->tx_nr_rings_per_tc; in bnxt_set_xps_mapping()
12363 for (q_idx = 0; q_idx < bp->dev->real_num_tx_queues; q_idx++) { in bnxt_set_xps_mapping()
12364 map_idx = q_idx % bp->tx_nr_rings_per_tc; in bnxt_set_xps_mapping()
12365 rc = netif_set_xps_queue(bp->dev, &q_map[map_idx], q_idx); in bnxt_set_xps_mapping()
12367 netdev_warn(bp->dev, "Error setting XPS for q:%d\n", in bnxt_set_xps_mapping()
12382 netif_carrier_off(bp->dev); in __bnxt_open_nic()
12387 netdev_err(bp->dev, "Failed to reserve default rings at open\n"); in __bnxt_open_nic()
12397 netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc); in __bnxt_open_nic()
12405 netdev_err(bp->dev, "bnxt_request_irq err: %x\n", rc); in __bnxt_open_nic()
12412 netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc); in __bnxt_open_nic()
12420 mutex_lock(&bp->link_lock); in __bnxt_open_nic()
12422 mutex_unlock(&bp->link_lock); in __bnxt_open_nic()
12424 netdev_warn(bp->dev, "failed to update phy settings\n"); in __bnxt_open_nic()
12426 bp->link_info.phy_retry = true; in __bnxt_open_nic()
12427 bp->link_info.phy_retry_expires = in __bnxt_open_nic()
12428 jiffies + 5 * HZ; in __bnxt_open_nic()
12434 udp_tunnel_nic_reset_ntf(bp->dev); in __bnxt_open_nic()
12437 netdev_warn(bp->dev, "failed to set xps mapping\n"); in __bnxt_open_nic()
12440 if (bp->tx_nr_rings_xdp < num_possible_cpus()) { in __bnxt_open_nic()
12446 set_bit(BNXT_STATE_OPEN, &bp->state); in __bnxt_open_nic()
12450 mod_timer(&bp->timer, jiffies + bp->current_interval); in __bnxt_open_nic()
12452 mutex_lock(&bp->link_lock); in __bnxt_open_nic()
12454 mutex_unlock(&bp->link_lock); in __bnxt_open_nic()
12456 /* VF-reps may need to be re-opened after the PF is re-opened */ in __bnxt_open_nic()
12459 if (bp->ptp_cfg && !(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) in __bnxt_open_nic()
12460 WRITE_ONCE(bp->ptp_cfg->tx_avail, BNXT_MAX_TX_TS); in __bnxt_open_nic()
12483 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) in bnxt_open_nic()
12484 rc = -EIO; in bnxt_open_nic()
12488 netdev_err(bp->dev, "nic open fail (rc: %x)\n", rc); in bnxt_open_nic()
12489 dev_close(bp->dev); in bnxt_open_nic()
12502 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) { in bnxt_half_open_nic()
12503 netdev_err(bp->dev, "A previous firmware reset has not completed, aborting half open\n"); in bnxt_half_open_nic()
12504 rc = -ENODEV; in bnxt_half_open_nic()
12510 netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc); in bnxt_half_open_nic()
12514 set_bit(BNXT_STATE_HALF_OPEN, &bp->state); in bnxt_half_open_nic()
12517 clear_bit(BNXT_STATE_HALF_OPEN, &bp->state); in bnxt_half_open_nic()
12519 netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc); in bnxt_half_open_nic()
12527 dev_close(bp->dev); in bnxt_half_open_nic()
12540 clear_bit(BNXT_STATE_HALF_OPEN, &bp->state); in bnxt_half_close_nic()
12546 struct bnxt_pf_info *pf = &bp->pf; in bnxt_reenable_sriov()
12547 int n = pf->active_vfs; in bnxt_reenable_sriov()
12559 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) { in bnxt_open()
12562 if (rc == -EBUSY) in bnxt_open()
12563 netdev_err(bp->dev, "A previous firmware reset has not completed, aborting\n"); in bnxt_open()
12565 netdev_err(bp->dev, "Failed to reinitialize after aborted firmware reset\n"); in bnxt_open()
12566 return -ENODEV; in bnxt_open()
12578 if (test_and_clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state)) { in bnxt_open()
12579 if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_open()
12590 return (test_bit(BNXT_STATE_IN_SP_TASK, &bp->state) || in bnxt_drv_busy()
12591 test_bit(BNXT_STATE_READ_STATS, &bp->state)); in bnxt_drv_busy()
12600 /* Close the VF-reps before closing PF */ in __bnxt_close_nic()
12607 clear_bit(BNXT_STATE_OPEN, &bp->state); in __bnxt_close_nic()
12621 del_timer_sync(&bp->timer); in __bnxt_close_nic()
12625 if (bp->bnapi && irq_re_init) { in __bnxt_close_nic()
12626 bnxt_get_ring_stats(bp, &bp->net_stats_prev); in __bnxt_close_nic()
12627 bnxt_get_ring_err_stats(bp, &bp->ring_err_stats_prev); in __bnxt_close_nic()
12638 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_close_nic()
12646 netdev_warn(bp->dev, "FW reset in progress during close, FW reset will be aborted\n"); in bnxt_close_nic()
12647 set_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_close_nic()
12651 if (bp->sriov_cfg) { in bnxt_close_nic()
12654 rc = wait_event_interruptible_timeout(bp->sriov_cfg_wait, in bnxt_close_nic()
12655 !bp->sriov_cfg, in bnxt_close_nic()
12658 …netdev_warn(bp->dev, "timeout waiting for SRIOV config operation to complete, proceeding to close!… in bnxt_close_nic()
12660 netdev_warn(bp->dev, "SRIOV config operation interrupted, proceeding to close!\n"); in bnxt_close_nic()
12683 if (bp->hwrm_spec_code < 0x10a00) in bnxt_hwrm_port_phy_read()
12684 return -EOPNOTSUPP; in bnxt_hwrm_port_phy_read()
12690 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_port_phy_read()
12691 req->phy_addr = phy_addr; in bnxt_hwrm_port_phy_read()
12692 req->reg_addr = cpu_to_le16(reg & 0x1f); in bnxt_hwrm_port_phy_read()
12694 req->cl45_mdio = 1; in bnxt_hwrm_port_phy_read()
12695 req->phy_addr = mdio_phy_id_prtad(phy_addr); in bnxt_hwrm_port_phy_read()
12696 req->dev_addr = mdio_phy_id_devad(phy_addr); in bnxt_hwrm_port_phy_read()
12697 req->reg_addr = cpu_to_le16(reg); in bnxt_hwrm_port_phy_read()
12703 *val = le16_to_cpu(resp->reg_data); in bnxt_hwrm_port_phy_read()
12714 if (bp->hwrm_spec_code < 0x10a00) in bnxt_hwrm_port_phy_write()
12715 return -EOPNOTSUPP; in bnxt_hwrm_port_phy_write()
12721 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_port_phy_write()
12722 req->phy_addr = phy_addr; in bnxt_hwrm_port_phy_write()
12723 req->reg_addr = cpu_to_le16(reg & 0x1f); in bnxt_hwrm_port_phy_write()
12725 req->cl45_mdio = 1; in bnxt_hwrm_port_phy_write()
12726 req->phy_addr = mdio_phy_id_prtad(phy_addr); in bnxt_hwrm_port_phy_write()
12727 req->dev_addr = mdio_phy_id_devad(phy_addr); in bnxt_hwrm_port_phy_write()
12728 req->reg_addr = cpu_to_le16(reg); in bnxt_hwrm_port_phy_write()
12730 req->reg_data = cpu_to_le16(val); in bnxt_hwrm_port_phy_write()
12744 mdio->phy_id = bp->link_info.phy_addr; in bnxt_ioctl()
12751 return -EAGAIN; in bnxt_ioctl()
12753 rc = bnxt_hwrm_port_phy_read(bp, mdio->phy_id, mdio->reg_num, in bnxt_ioctl()
12755 mdio->val_out = mii_regval; in bnxt_ioctl()
12761 return -EAGAIN; in bnxt_ioctl()
12763 return bnxt_hwrm_port_phy_write(bp, mdio->phy_id, mdio->reg_num, in bnxt_ioctl()
12764 mdio->val_in); in bnxt_ioctl()
12776 return -EOPNOTSUPP; in bnxt_ioctl()
12784 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_get_ring_stats()
12785 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_get_ring_stats()
12786 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_get_ring_stats()
12787 u64 *sw = cpr->stats.sw_stats; in bnxt_get_ring_stats()
12789 stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_ucast_pkts); in bnxt_get_ring_stats()
12790 stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts); in bnxt_get_ring_stats()
12791 stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_bcast_pkts); in bnxt_get_ring_stats()
12793 stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_ucast_pkts); in bnxt_get_ring_stats()
12794 stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_mcast_pkts); in bnxt_get_ring_stats()
12795 stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_bcast_pkts); in bnxt_get_ring_stats()
12797 stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_ucast_bytes); in bnxt_get_ring_stats()
12798 stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_mcast_bytes); in bnxt_get_ring_stats()
12799 stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_bcast_bytes); in bnxt_get_ring_stats()
12801 stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_ucast_bytes); in bnxt_get_ring_stats()
12802 stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_mcast_bytes); in bnxt_get_ring_stats()
12803 stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_bcast_bytes); in bnxt_get_ring_stats()
12805 stats->rx_missed_errors += in bnxt_get_ring_stats()
12808 stats->multicast += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts); in bnxt_get_ring_stats()
12810 stats->tx_dropped += BNXT_GET_RING_STATS64(sw, tx_error_pkts); in bnxt_get_ring_stats()
12812 stats->rx_dropped += in bnxt_get_ring_stats()
12813 cpr->sw_stats->rx.rx_netpoll_discards + in bnxt_get_ring_stats()
12814 cpr->sw_stats->rx.rx_oom_discards; in bnxt_get_ring_stats()
12821 struct rtnl_link_stats64 *prev_stats = &bp->net_stats_prev; in bnxt_add_prev_stats()
12823 stats->rx_packets += prev_stats->rx_packets; in bnxt_add_prev_stats()
12824 stats->tx_packets += prev_stats->tx_packets; in bnxt_add_prev_stats()
12825 stats->rx_bytes += prev_stats->rx_bytes; in bnxt_add_prev_stats()
12826 stats->tx_bytes += prev_stats->tx_bytes; in bnxt_add_prev_stats()
12827 stats->rx_missed_errors += prev_stats->rx_missed_errors; in bnxt_add_prev_stats()
12828 stats->multicast += prev_stats->multicast; in bnxt_add_prev_stats()
12829 stats->rx_dropped += prev_stats->rx_dropped; in bnxt_add_prev_stats()
12830 stats->tx_dropped += prev_stats->tx_dropped; in bnxt_add_prev_stats()
12838 set_bit(BNXT_STATE_READ_STATS, &bp->state); in bnxt_get_stats64()
12843 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_get_stats64()
12844 clear_bit(BNXT_STATE_READ_STATS, &bp->state); in bnxt_get_stats64()
12845 *stats = bp->net_stats_prev; in bnxt_get_stats64()
12852 if (bp->flags & BNXT_FLAG_PORT_STATS) { in bnxt_get_stats64()
12853 u64 *rx = bp->port_stats.sw_stats; in bnxt_get_stats64()
12854 u64 *tx = bp->port_stats.sw_stats + in bnxt_get_stats64()
12857 stats->rx_crc_errors = in bnxt_get_stats64()
12859 stats->rx_frame_errors = in bnxt_get_stats64()
12861 stats->rx_length_errors = in bnxt_get_stats64()
12865 stats->rx_errors = in bnxt_get_stats64()
12868 stats->collisions = in bnxt_get_stats64()
12870 stats->tx_fifo_errors = in bnxt_get_stats64()
12872 stats->tx_errors = BNXT_GET_TX_PORT_STATS64(tx, tx_err); in bnxt_get_stats64()
12874 clear_bit(BNXT_STATE_READ_STATS, &bp->state); in bnxt_get_stats64()
12881 struct bnxt_sw_stats *sw_stats = cpr->sw_stats; in bnxt_get_one_ring_err_stats()
12882 u64 *hw_stats = cpr->stats.sw_stats; in bnxt_get_one_ring_err_stats()
12884 stats->rx_total_l4_csum_errors += sw_stats->rx.rx_l4_csum_errors; in bnxt_get_one_ring_err_stats()
12885 stats->rx_total_resets += sw_stats->rx.rx_resets; in bnxt_get_one_ring_err_stats()
12886 stats->rx_total_buf_errors += sw_stats->rx.rx_buf_errors; in bnxt_get_one_ring_err_stats()
12887 stats->rx_total_oom_discards += sw_stats->rx.rx_oom_discards; in bnxt_get_one_ring_err_stats()
12888 stats->rx_total_netpoll_discards += sw_stats->rx.rx_netpoll_discards; in bnxt_get_one_ring_err_stats()
12889 stats->rx_total_ring_discards += in bnxt_get_one_ring_err_stats()
12891 stats->tx_total_resets += sw_stats->tx.tx_resets; in bnxt_get_one_ring_err_stats()
12892 stats->tx_total_ring_discards += in bnxt_get_one_ring_err_stats()
12894 stats->total_missed_irqs += sw_stats->cmn.missed_irqs; in bnxt_get_one_ring_err_stats()
12902 for (i = 0; i < bp->cp_nr_rings; i++) in bnxt_get_ring_err_stats()
12903 bnxt_get_one_ring_err_stats(bp, stats, &bp->bnapi[i]->cp_ring); in bnxt_get_ring_err_stats()
12908 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_mc_list_updated()
12909 struct net_device *dev = bp->dev; in bnxt_mc_list_updated()
12919 vnic->mc_list_count = 0; in bnxt_mc_list_updated()
12922 haddr = ha->addr; in bnxt_mc_list_updated()
12923 if (!ether_addr_equal(haddr, vnic->mc_list + off)) { in bnxt_mc_list_updated()
12924 memcpy(vnic->mc_list + off, haddr, ETH_ALEN); in bnxt_mc_list_updated()
12933 if (mc_count != vnic->mc_list_count) { in bnxt_mc_list_updated()
12934 vnic->mc_list_count = mc_count; in bnxt_mc_list_updated()
12942 struct net_device *dev = bp->dev; in bnxt_uc_list_updated()
12943 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_uc_list_updated()
12947 if (netdev_uc_count(dev) != (vnic->uc_filter_count - 1)) in bnxt_uc_list_updated()
12951 if (!ether_addr_equal(ha->addr, vnic->uc_list + off)) in bnxt_uc_list_updated()
12967 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) in bnxt_set_rx_mode()
12970 vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_set_rx_mode()
12971 mask = vnic->rx_mask; in bnxt_set_rx_mode()
12977 if (dev->flags & IFF_PROMISC) in bnxt_set_rx_mode()
12982 if (dev->flags & IFF_BROADCAST) in bnxt_set_rx_mode()
12984 if (dev->flags & IFF_ALLMULTI) { in bnxt_set_rx_mode()
12986 vnic->mc_list_count = 0; in bnxt_set_rx_mode()
12987 } else if (dev->flags & IFF_MULTICAST) { in bnxt_set_rx_mode()
12991 if (mask != vnic->rx_mask || uc_update || mc_update) { in bnxt_set_rx_mode()
12992 vnic->rx_mask = mask; in bnxt_set_rx_mode()
13000 struct net_device *dev = bp->dev; in bnxt_cfg_rx_mode()
13001 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_cfg_rx_mode()
13013 for (i = 1; i < vnic->uc_filter_count; i++) { in bnxt_cfg_rx_mode()
13014 struct bnxt_l2_filter *fltr = vnic->l2_filters[i]; in bnxt_cfg_rx_mode()
13020 vnic->uc_filter_count = 1; in bnxt_cfg_rx_mode()
13023 if (netdev_uc_count(dev) > (BNXT_MAX_UC_ADDRS - 1)) { in bnxt_cfg_rx_mode()
13024 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; in bnxt_cfg_rx_mode()
13027 memcpy(vnic->uc_list + off, ha->addr, ETH_ALEN); in bnxt_cfg_rx_mode()
13029 vnic->uc_filter_count++; in bnxt_cfg_rx_mode()
13034 for (i = 1, off = 0; i < vnic->uc_filter_count; i++, off += ETH_ALEN) { in bnxt_cfg_rx_mode()
13035 rc = bnxt_hwrm_set_vnic_filter(bp, 0, i, vnic->uc_list + off); in bnxt_cfg_rx_mode()
13037 if (BNXT_VF(bp) && rc == -ENODEV) { in bnxt_cfg_rx_mode()
13038 if (!test_and_set_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state)) in bnxt_cfg_rx_mode()
13039 netdev_warn(bp->dev, "Cannot configure L2 filters while PF is unavailable, will retry\n"); in bnxt_cfg_rx_mode()
13041 netdev_dbg(bp->dev, "PF still unavailable while configuring L2 filters.\n"); in bnxt_cfg_rx_mode()
13044 netdev_err(bp->dev, "HWRM vnic filter failure rc: %x\n", rc); in bnxt_cfg_rx_mode()
13046 vnic->uc_filter_count = i; in bnxt_cfg_rx_mode()
13050 if (test_and_clear_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state)) in bnxt_cfg_rx_mode()
13051 netdev_notice(bp->dev, "Retry of L2 filter configuration successful.\n"); in bnxt_cfg_rx_mode()
13054 if ((vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS) && in bnxt_cfg_rx_mode()
13056 vnic->rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; in bnxt_cfg_rx_mode()
13058 if (rc && (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST)) { in bnxt_cfg_rx_mode()
13059 netdev_info(bp->dev, "Failed setting MC filters rc: %d, turning on ALL_MCAST mode\n", in bnxt_cfg_rx_mode()
13061 vnic->rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_MCAST; in bnxt_cfg_rx_mode()
13062 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; in bnxt_cfg_rx_mode()
13063 vnic->mc_list_count = 0; in bnxt_cfg_rx_mode()
13067 netdev_err(bp->dev, "HWRM cfa l2 rx mask failure rc: %d\n", in bnxt_cfg_rx_mode()
13077 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_can_reserve_rings()
13082 if (hw_resc->min_tx_rings || hw_resc->resv_tx_rings) in bnxt_can_reserve_rings()
13085 if (!netif_running(bp->dev)) in bnxt_can_reserve_rings()
13095 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_rfs_supported()
13096 if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2) in bnxt_rfs_supported()
13105 if (bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) in bnxt_rfs_supported()
13116 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_rfs_capable()
13120 if (!bnxt_can_reserve_rings(bp) || !bp->rx_nr_rings) in bnxt_rfs_capable()
13123 hwr.grp = bp->rx_nr_rings; in bnxt_rfs_capable()
13124 hwr.vnic = bnxt_get_total_vnics(bp, bp->rx_nr_rings); in bnxt_rfs_capable()
13132 if (bp->rx_nr_rings > 1) in bnxt_rfs_capable()
13133 netdev_warn(bp->dev, in bnxt_rfs_capable()
13135 min(max_rss_ctxs - 1, max_vnics - 1)); in bnxt_rfs_capable()
13146 if (hwr.vnic <= bp->hw_resc.resv_vnics && in bnxt_rfs_capable()
13147 hwr.rss_ctx <= bp->hw_resc.resv_rsscos_ctxs) in bnxt_rfs_capable()
13151 if (hwr.vnic <= bp->hw_resc.resv_vnics && in bnxt_rfs_capable()
13152 hwr.rss_ctx <= bp->hw_resc.resv_rsscos_ctxs) in bnxt_rfs_capable()
13155 netdev_warn(bp->dev, "Unable to reserve resources to support NTUPLE filters.\n"); in bnxt_rfs_capable()
13171 if ((bp->flags & BNXT_FLAG_NO_AGG_RINGS) || bp->xdp_prog) in bnxt_fix_features()
13185 if (dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX) in bnxt_fix_features()
13191 if (BNXT_VF(bp) && bp->vf.vlan) in bnxt_fix_features()
13201 bp->flags = flags; in bnxt_reinit_features()
13211 u32 flags = bp->flags; in bnxt_set_features()
13222 if (bp->flags & BNXT_FLAG_NO_AGG_RINGS) in bnxt_set_features()
13233 changes = flags ^ bp->flags; in bnxt_set_features()
13236 if ((bp->flags & BNXT_FLAG_TPA) == 0 || in bnxt_set_features()
13238 (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_set_features()
13248 if (flags != bp->flags) { in bnxt_set_features()
13249 u32 old_flags = bp->flags; in bnxt_set_features()
13251 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_set_features()
13252 bp->flags = flags; in bnxt_set_features()
13265 bp->flags = flags; in bnxt_set_features()
13270 bp->flags = old_flags; in bnxt_set_features()
13279 struct ipv6hdr *ip6h = (struct ipv6hdr *)(skb->data + nw_off); in bnxt_exthdr_check()
13289 nexthdr = &ip6h->nexthdr; in bnxt_exthdr_check()
13297 hp = __skb_header_pointer(NULL, start, sizeof(*hp), skb->data, in bnxt_exthdr_check()
13309 /* The ext header may be a hop-by-hop header inserted for in bnxt_exthdr_check()
13314 if (likely(skb->len <= GRO_LEGACY_MAX_SIZE)) in bnxt_exthdr_check()
13318 if (jhdr->tlv_type != IPV6_TLV_JUMBO || jhdr->hdrlen != 0 || in bnxt_exthdr_check()
13319 jhdr->nexthdr != IPPROTO_TCP) in bnxt_exthdr_check()
13327 nexthdr = &hp->nexthdr; in bnxt_exthdr_check()
13332 if (skb->encapsulation) { in bnxt_exthdr_check()
13338 /* Only support TCP/UDP for non-tunneled ipv6 and inner ipv6 */ in bnxt_exthdr_check()
13346 __be16 udp_port = uh->dest; in bnxt_udp_tunl_check()
13348 if (udp_port != bp->vxlan_port && udp_port != bp->nge_port && in bnxt_udp_tunl_check()
13349 udp_port != bp->vxlan_gpe_port) in bnxt_udp_tunl_check()
13351 if (skb->inner_protocol == htons(ETH_P_TEB)) { in bnxt_udp_tunl_check()
13354 switch (eh->h_proto) { in bnxt_udp_tunl_check()
13362 } else if (skb->inner_protocol == htons(ETH_P_IP)) { in bnxt_udp_tunl_check()
13364 } else if (skb->inner_protocol == htons(ETH_P_IPV6)) { in bnxt_udp_tunl_check()
13379 switch (skb->inner_protocol) { in bnxt_tunl_check()
13406 if (!skb->encapsulation) in bnxt_features_check()
13408 l4_proto = &ip_hdr(skb)->protocol; in bnxt_features_check()
13439 rc = -ENOMEM; in bnxt_dbg_hwrm_rd_reg()
13443 req->host_dest_addr = cpu_to_le64(mapping); in bnxt_dbg_hwrm_rd_reg()
13446 req->read_addr = cpu_to_le32(reg_off + CHIMP_REG_VIEW_ADDR); in bnxt_dbg_hwrm_rd_reg()
13447 req->read_len32 = cpu_to_le32(num_words); in bnxt_dbg_hwrm_rd_reg()
13450 if (rc || resp->error_code) { in bnxt_dbg_hwrm_rd_reg()
13451 rc = -EIO; in bnxt_dbg_hwrm_rd_reg()
13473 req->ring_type = ring_type; in bnxt_dbg_hwrm_ring_info_get()
13474 req->fw_ring_id = cpu_to_le32(ring_id); in bnxt_dbg_hwrm_ring_info_get()
13478 *prod = le32_to_cpu(resp->producer_index); in bnxt_dbg_hwrm_ring_info_get()
13479 *cons = le32_to_cpu(resp->consumer_index); in bnxt_dbg_hwrm_ring_info_get()
13488 int i = bnapi->index, j; in bnxt_dump_tx_sw_state()
13491 netdev_info(bnapi->bp->dev, "[%d.%d]: tx{fw_ring: %d prod: %x cons: %x}\n", in bnxt_dump_tx_sw_state()
13492 i, j, txr->tx_ring_struct.fw_ring_id, txr->tx_prod, in bnxt_dump_tx_sw_state()
13493 txr->tx_cons); in bnxt_dump_tx_sw_state()
13498 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_dump_rx_sw_state()
13499 int i = bnapi->index; in bnxt_dump_rx_sw_state()
13504 …netdev_info(bnapi->bp->dev, "[%d]: rx{fw_ring: %d prod: %x} rx_agg{fw_ring: %d agg_prod: %x sw_agg… in bnxt_dump_rx_sw_state()
13505 i, rxr->rx_ring_struct.fw_ring_id, rxr->rx_prod, in bnxt_dump_rx_sw_state()
13506 rxr->rx_agg_ring_struct.fw_ring_id, rxr->rx_agg_prod, in bnxt_dump_rx_sw_state()
13507 rxr->rx_sw_agg_prod); in bnxt_dump_rx_sw_state()
13512 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_dump_cp_sw_state()
13513 int i = bnapi->index; in bnxt_dump_cp_sw_state()
13515 netdev_info(bnapi->bp->dev, "[%d]: cp{fw_ring: %d raw_cons: %x}\n", in bnxt_dump_cp_sw_state()
13516 i, cpr->cp_ring_struct.fw_ring_id, cpr->cp_raw_cons); in bnxt_dump_cp_sw_state()
13524 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_dbg_dump_states()
13525 bnapi = bp->bnapi[i]; in bnxt_dbg_dump_states()
13536 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr]; in bnxt_hwrm_rx_ring_reset()
13538 struct bnxt_napi *bnapi = rxr->bnapi; in bnxt_hwrm_rx_ring_reset()
13547 cpr = &bnapi->cp_ring; in bnxt_hwrm_rx_ring_reset()
13548 cp_ring_id = cpr->cp_ring_struct.fw_ring_id; in bnxt_hwrm_rx_ring_reset()
13549 req->cmpl_ring = cpu_to_le16(cp_ring_id); in bnxt_hwrm_rx_ring_reset()
13550 req->ring_type = RING_RESET_REQ_RING_TYPE_RX_RING_GRP; in bnxt_hwrm_rx_ring_reset()
13551 req->ring_id = cpu_to_le16(bp->grp_info[bnapi->index].fw_grp_id); in bnxt_hwrm_rx_ring_reset()
13559 if (netif_running(bp->dev)) { in bnxt_reset_task()
13569 netdev_err(bp->dev, "TX timeout detected, starting reset task!\n"); in bnxt_tx_timeout()
13575 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_health_check()
13576 struct pci_dev *pdev = bp->pdev; in bnxt_fw_health_check()
13579 if (!fw_health->enabled || test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_fw_health_check()
13584 if (fw_health->tmr_counter) { in bnxt_fw_health_check()
13585 fw_health->tmr_counter--; in bnxt_fw_health_check()
13590 if (val == fw_health->last_fw_heartbeat && pci_device_is_present(pdev)) { in bnxt_fw_health_check()
13591 fw_health->arrests++; in bnxt_fw_health_check()
13595 fw_health->last_fw_heartbeat = val; in bnxt_fw_health_check()
13598 if (val != fw_health->last_fw_reset_cnt && pci_device_is_present(pdev)) { in bnxt_fw_health_check()
13599 fw_health->discoveries++; in bnxt_fw_health_check()
13603 fw_health->tmr_counter = fw_health->tmr_multiplier; in bnxt_fw_health_check()
13613 struct net_device *dev = bp->dev; in bnxt_timer()
13615 if (!netif_running(dev) || !test_bit(BNXT_STATE_OPEN, &bp->state)) in bnxt_timer()
13618 if (atomic_read(&bp->intr_sem) != 0) in bnxt_timer()
13621 if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) in bnxt_timer()
13624 if (BNXT_LINK_IS_UP(bp) && bp->stats_coal_ticks) in bnxt_timer()
13631 if ((bp->flags & BNXT_FLAG_RFS) && bp->ntp_fltr_count) in bnxt_timer()
13635 if (bp->link_info.phy_retry) { in bnxt_timer()
13636 if (time_after(jiffies, bp->link_info.phy_retry_expires)) { in bnxt_timer()
13637 bp->link_info.phy_retry = false; in bnxt_timer()
13638 netdev_warn(bp->dev, "failed to update phy settings after maximum retries.\n"); in bnxt_timer()
13644 if (test_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state)) in bnxt_timer()
13647 if ((BNXT_CHIP_P5(bp)) && !bp->chip_rev && netif_carrier_ok(dev)) in bnxt_timer()
13651 mod_timer(&bp->timer, jiffies + bp->current_interval); in bnxt_timer()
13661 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_rtnl_lock_sp()
13667 set_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_rtnl_unlock_sp()
13675 if (test_bit(BNXT_STATE_OPEN, &bp->state)) in bnxt_reset()
13686 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_rx_ring_reset()
13691 if (bp->flags & BNXT_FLAG_TPA) in bnxt_rx_ring_reset()
13693 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_rx_ring_reset()
13694 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_rx_ring_reset()
13698 if (!rxr->bnapi->in_reset) in bnxt_rx_ring_reset()
13703 if (rc == -EINVAL || rc == -EOPNOTSUPP) in bnxt_rx_ring_reset()
13704 …netdev_info_once(bp->dev, "RX ring reset not supported by firmware, falling back to global reset\n… in bnxt_rx_ring_reset()
13706 netdev_warn(bp->dev, "RX ring reset failed, rc = %d, falling back to global reset\n", in bnxt_rx_ring_reset()
13712 rxr->rx_prod = 0; in bnxt_rx_ring_reset()
13713 rxr->rx_agg_prod = 0; in bnxt_rx_ring_reset()
13714 rxr->rx_sw_agg_prod = 0; in bnxt_rx_ring_reset()
13715 rxr->rx_next_cons = 0; in bnxt_rx_ring_reset()
13716 rxr->bnapi->in_reset = false; in bnxt_rx_ring_reset()
13718 cpr = &rxr->bnapi->cp_ring; in bnxt_rx_ring_reset()
13719 cpr->sw_stats->rx.rx_resets++; in bnxt_rx_ring_reset()
13720 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_rx_ring_reset()
13721 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_rx_ring_reset()
13722 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_rx_ring_reset()
13724 if (bp->flags & BNXT_FLAG_TPA) in bnxt_rx_ring_reset()
13736 pci_disable_device(bp->pdev); in bnxt_fw_fatal_close()
13745 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) { in bnxt_fw_reset_close()
13748 pci_read_config_word(bp->pdev, PCI_SUBSYSTEM_ID, &val); in bnxt_fw_reset_close()
13750 bp->fw_reset_min_dsecs = 0; in bnxt_fw_reset_close()
13757 if (pci_is_enabled(bp->pdev)) in bnxt_fw_reset_close()
13758 pci_disable_device(bp->pdev); in bnxt_fw_reset_close()
13764 struct bnxt_fw_health *fw_health = bp->fw_health; in is_bnxt_fw_ok()
13769 if (val == fw_health->last_fw_heartbeat) in is_bnxt_fw_ok()
13773 if (val != fw_health->last_fw_reset_cnt) in is_bnxt_fw_ok()
13785 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_force_fw_reset()
13786 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_force_fw_reset()
13789 if (!test_bit(BNXT_STATE_OPEN, &bp->state) || in bnxt_force_fw_reset()
13790 test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_force_fw_reset()
13797 write_seqlock_irqsave(&ptp->ptp_lock, flags); in bnxt_force_fw_reset()
13798 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_force_fw_reset()
13799 write_sequnlock_irqrestore(&ptp->ptp_lock, flags); in bnxt_force_fw_reset()
13801 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_force_fw_reset()
13804 wait_dsecs = fw_health->master_func_wait_dsecs; in bnxt_force_fw_reset()
13805 if (fw_health->primary) { in bnxt_force_fw_reset()
13806 if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) in bnxt_force_fw_reset()
13808 bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW; in bnxt_force_fw_reset()
13810 bp->fw_reset_timestamp = jiffies + wait_dsecs * HZ / 10; in bnxt_force_fw_reset()
13811 wait_dsecs = fw_health->normal_func_wait_dsecs; in bnxt_force_fw_reset()
13812 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_force_fw_reset()
13815 bp->fw_reset_min_dsecs = fw_health->post_reset_wait_dsecs; in bnxt_force_fw_reset()
13816 bp->fw_reset_max_dsecs = fw_health->post_reset_max_wait_dsecs; in bnxt_force_fw_reset()
13822 netdev_warn(bp->dev, "Detected firmware fatal condition, initiating reset\n"); in bnxt_fw_exception()
13823 set_bit(BNXT_STATE_FW_FATAL_COND, &bp->state); in bnxt_fw_exception()
13843 netdev_err(bp->dev, "func_qcfg cmd failed, rc = %d\n", rc); in bnxt_get_registered_vfs()
13846 if (bp->pf.registered_vfs) in bnxt_get_registered_vfs()
13847 return bp->pf.registered_vfs; in bnxt_get_registered_vfs()
13848 if (bp->sriov_cfg) in bnxt_get_registered_vfs()
13858 if (test_bit(BNXT_STATE_OPEN, &bp->state) && in bnxt_fw_reset()
13859 !test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_fw_reset()
13860 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_fw_reset()
13867 write_seqlock_irqsave(&ptp->ptp_lock, flags); in bnxt_fw_reset()
13868 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset()
13869 write_sequnlock_irqrestore(&ptp->ptp_lock, flags); in bnxt_fw_reset()
13871 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset()
13873 if (bp->pf.active_vfs && in bnxt_fw_reset()
13874 !test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) in bnxt_fw_reset()
13877 netdev_err(bp->dev, "Firmware reset aborted, rc = %d\n", in bnxt_fw_reset()
13879 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset()
13880 dev_close(bp->dev); in bnxt_fw_reset()
13885 if (bp->fw_reset_max_dsecs < vf_tmo_dsecs) in bnxt_fw_reset()
13886 bp->fw_reset_max_dsecs = vf_tmo_dsecs; in bnxt_fw_reset()
13887 bp->fw_reset_state = in bnxt_fw_reset()
13893 if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) { in bnxt_fw_reset()
13894 bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN; in bnxt_fw_reset()
13897 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset()
13898 tmo = bp->fw_reset_min_dsecs * HZ / 10; in bnxt_fw_reset()
13910 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_chk_missed_irq()
13913 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_chk_missed_irq()
13914 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_chk_missed_irq()
13922 cpr = &bnapi->cp_ring; in bnxt_chk_missed_irq()
13923 for (j = 0; j < cpr->cp_ring_count; j++) { in bnxt_chk_missed_irq()
13924 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_chk_missed_irq()
13927 if (cpr2->has_more_work || !bnxt_has_work(bp, cpr2)) in bnxt_chk_missed_irq()
13930 if (cpr2->cp_raw_cons != cpr2->last_cp_raw_cons) { in bnxt_chk_missed_irq()
13931 cpr2->last_cp_raw_cons = cpr2->cp_raw_cons; in bnxt_chk_missed_irq()
13934 fw_ring_id = cpr2->cp_ring_struct.fw_ring_id; in bnxt_chk_missed_irq()
13938 cpr->sw_stats->cmn.missed_irqs++; in bnxt_chk_missed_irq()
13947 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_init_ethtool_link_settings()
13949 if (BNXT_AUTO_MODE(link_info->auto_mode)) { in bnxt_init_ethtool_link_settings()
13950 link_info->autoneg = BNXT_AUTONEG_SPEED; in bnxt_init_ethtool_link_settings()
13951 if (bp->hwrm_spec_code >= 0x10201) { in bnxt_init_ethtool_link_settings()
13952 if (link_info->auto_pause_setting & in bnxt_init_ethtool_link_settings()
13954 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; in bnxt_init_ethtool_link_settings()
13956 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; in bnxt_init_ethtool_link_settings()
13961 link_info->req_duplex = link_info->duplex_setting; in bnxt_init_ethtool_link_settings()
13963 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) in bnxt_init_ethtool_link_settings()
13964 link_info->req_flow_ctrl = in bnxt_init_ethtool_link_settings()
13965 link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH; in bnxt_init_ethtool_link_settings()
13967 link_info->req_flow_ctrl = link_info->force_pause_setting; in bnxt_init_ethtool_link_settings()
13972 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_echo_reply()
13979 req->event_data1 = cpu_to_le32(fw_health->echo_req_data1); in bnxt_fw_echo_reply()
13980 req->event_data2 = cpu_to_le32(fw_health->echo_req_data2); in bnxt_fw_echo_reply()
13994 set_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_sp_task()
13996 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_sp_task()
13997 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_sp_task()
14001 if (test_and_clear_bit(BNXT_RESTART_ULP_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14006 if (test_and_clear_bit(BNXT_RX_MASK_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14009 if (test_and_clear_bit(BNXT_RX_NTP_FLTR_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14011 if (test_and_clear_bit(BNXT_HWRM_EXEC_FWD_REQ_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14013 if (test_and_clear_bit(BNXT_HWRM_PF_UNLOAD_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14014 netdev_info(bp->dev, "Receive PF driver unload event!\n"); in bnxt_sp_task()
14015 if (test_and_clear_bit(BNXT_PERIODIC_STATS_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14021 if (test_and_clear_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14024 mutex_lock(&bp->link_lock); in bnxt_sp_task()
14026 &bp->sp_event)) in bnxt_sp_task()
14031 netdev_err(bp->dev, "SP task can't update link (rc: %x)\n", in bnxt_sp_task()
14035 &bp->sp_event)) in bnxt_sp_task()
14037 mutex_unlock(&bp->link_lock); in bnxt_sp_task()
14039 if (test_and_clear_bit(BNXT_UPDATE_PHY_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14042 mutex_lock(&bp->link_lock); in bnxt_sp_task()
14044 mutex_unlock(&bp->link_lock); in bnxt_sp_task()
14046 netdev_warn(bp->dev, "update phy settings retry failed\n"); in bnxt_sp_task()
14048 bp->link_info.phy_retry = false; in bnxt_sp_task()
14049 netdev_info(bp->dev, "update phy settings retry succeeded\n"); in bnxt_sp_task()
14052 if (test_and_clear_bit(BNXT_HWRM_PORT_MODULE_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14053 mutex_lock(&bp->link_lock); in bnxt_sp_task()
14055 mutex_unlock(&bp->link_lock); in bnxt_sp_task()
14058 if (test_and_clear_bit(BNXT_FLOW_STATS_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14061 if (test_and_clear_bit(BNXT_RING_COAL_NOW_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14064 if (test_and_clear_bit(BNXT_FW_ECHO_REQUEST_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14067 if (test_and_clear_bit(BNXT_THERMAL_THRESHOLD_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14073 if (test_and_clear_bit(BNXT_RESET_TASK_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14076 if (test_and_clear_bit(BNXT_RESET_TASK_SILENT_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14079 if (test_and_clear_bit(BNXT_RST_RING_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14082 if (test_and_clear_bit(BNXT_FW_RESET_NOTIFY_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14083 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state) || in bnxt_sp_task()
14084 test_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state)) in bnxt_sp_task()
14090 if (test_and_clear_bit(BNXT_FW_EXCEPTION_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14096 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_sp_task()
14117 return -ENOMEM; in bnxt_check_rings()
14119 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_check_rings()
14125 return -ENOMEM; in bnxt_check_rings()
14132 return -ENOMEM; in bnxt_check_rings()
14140 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_check_rings()
14143 if (!rc && pci_msix_can_alloc_dyn(bp->pdev)) { in bnxt_check_rings()
14144 if (!bnxt_ulp_registered(bp->edev)) { in bnxt_check_rings()
14148 if (hwr.cp > bp->total_irqs) { in bnxt_check_rings()
14152 netdev_warn(bp->dev, "Unable to allocate %d MSIX vectors, maximum available %d\n", in bnxt_check_rings()
14154 rc = -ENOSPC; in bnxt_check_rings()
14163 if (bp->bar2) { in bnxt_unmap_bars()
14164 pci_iounmap(pdev, bp->bar2); in bnxt_unmap_bars()
14165 bp->bar2 = NULL; in bnxt_unmap_bars()
14168 if (bp->bar1) { in bnxt_unmap_bars()
14169 pci_iounmap(pdev, bp->bar1); in bnxt_unmap_bars()
14170 bp->bar1 = NULL; in bnxt_unmap_bars()
14173 if (bp->bar0) { in bnxt_unmap_bars()
14174 pci_iounmap(pdev, bp->bar0); in bnxt_unmap_bars()
14175 bp->bar0 = NULL; in bnxt_unmap_bars()
14181 bnxt_unmap_bars(bp, bp->pdev); in bnxt_cleanup_pci()
14182 pci_release_regions(bp->pdev); in bnxt_cleanup_pci()
14183 if (pci_is_enabled(bp->pdev)) in bnxt_cleanup_pci()
14184 pci_disable_device(bp->pdev); in bnxt_cleanup_pci()
14189 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_init_dflt_coal()
14193 if (coal_cap->cmpl_params & in bnxt_init_dflt_coal()
14198 * 1 coal_buf x bufs_per_record = 1 completion record. in bnxt_init_dflt_coal()
14200 coal = &bp->rx_coal; in bnxt_init_dflt_coal()
14201 coal->coal_ticks = 10; in bnxt_init_dflt_coal()
14202 coal->coal_bufs = 30; in bnxt_init_dflt_coal()
14203 coal->coal_ticks_irq = 1; in bnxt_init_dflt_coal()
14204 coal->coal_bufs_irq = 2; in bnxt_init_dflt_coal()
14205 coal->idle_thresh = 50; in bnxt_init_dflt_coal()
14206 coal->bufs_per_record = 2; in bnxt_init_dflt_coal()
14207 coal->budget = 64; /* NAPI budget */ in bnxt_init_dflt_coal()
14208 coal->flags = flags; in bnxt_init_dflt_coal()
14210 coal = &bp->tx_coal; in bnxt_init_dflt_coal()
14211 coal->coal_ticks = 28; in bnxt_init_dflt_coal()
14212 coal->coal_bufs = 30; in bnxt_init_dflt_coal()
14213 coal->coal_ticks_irq = 2; in bnxt_init_dflt_coal()
14214 coal->coal_bufs_irq = 2; in bnxt_init_dflt_coal()
14215 coal->bufs_per_record = 1; in bnxt_init_dflt_coal()
14216 coal->flags = flags; in bnxt_init_dflt_coal()
14218 bp->stats_coal_ticks = BNXT_DEF_STATS_COAL_TICKS; in bnxt_init_dflt_coal()
14221 /* FW that pre-reserves 1 VNIC per function */
14226 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_fw_pre_resv_vnics()
14229 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_fw_pre_resv_vnics()
14239 bp->fw_cap = 0; in bnxt_fw_init_one_p1()
14260 return -ENODEV; in bnxt_fw_init_one_p1()
14273 netdev_err(bp->dev, "hwrm query capability failure rc: %x\n", in bnxt_fw_init_one_p2()
14275 return -ENODEV; in bnxt_fw_init_one_p2()
14280 netdev_warn(bp->dev, "hwrm query adv flow mgnt failure rc: %d\n", in bnxt_fw_init_one_p2()
14284 netdev_warn(bp->dev, "no memory for firmware error recovery\n"); in bnxt_fw_init_one_p2()
14288 netdev_warn(bp->dev, "hwrm query error recovery failure rc: %d\n", in bnxt_fw_init_one_p2()
14294 return -ENODEV; in bnxt_fw_init_one_p2()
14298 netdev_warn(bp->dev, "crash dump mem alloc failure rc: %d\n", in bnxt_fw_init_one_p2()
14304 netdev_warn(bp->dev, in bnxt_fw_init_one_p2()
14310 bp->fw_cap |= BNXT_FW_CAP_PRE_RESV_VNICS; in bnxt_fw_init_one_p2()
14316 if (bp->fw_cap & BNXT_FW_CAP_PTP) in bnxt_fw_init_one_p2()
14325 bp->rss_cap &= ~BNXT_RSS_CAP_UDP_RSS_CAP; in bnxt_set_dflt_rss_hash_type()
14326 bp->rss_hash_cfg = VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4 | in bnxt_set_dflt_rss_hash_type()
14330 if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA) in bnxt_set_dflt_rss_hash_type()
14331 bp->rss_hash_delta = bp->rss_hash_cfg; in bnxt_set_dflt_rss_hash_type()
14332 if (BNXT_CHIP_P4_PLUS(bp) && bp->hwrm_spec_code >= 0x10501) { in bnxt_set_dflt_rss_hash_type()
14333 bp->rss_cap |= BNXT_RSS_CAP_UDP_RSS_CAP; in bnxt_set_dflt_rss_hash_type()
14334 bp->rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 | in bnxt_set_dflt_rss_hash_type()
14341 struct net_device *dev = bp->dev; in bnxt_set_dflt_rfs()
14343 dev->hw_features &= ~NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14344 dev->features &= ~NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14345 bp->flags &= ~BNXT_FLAG_RFS; in bnxt_set_dflt_rfs()
14347 dev->hw_features |= NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14349 bp->flags |= BNXT_FLAG_RFS; in bnxt_set_dflt_rfs()
14350 dev->features |= NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14357 struct pci_dev *pdev = bp->pdev; in bnxt_fw_init_one_p3()
14363 if (bp->flags & BNXT_FLAG_WOL_CAP) in bnxt_fw_init_one_p3()
14364 device_set_wakeup_enable(&pdev->dev, bp->wol); in bnxt_fw_init_one_p3()
14366 device_set_wakeup_capable(&pdev->dev, false); in bnxt_fw_init_one_p3()
14380 netdev_err(bp->dev, "Firmware init phase 1 failed\n"); in bnxt_fw_init_one()
14385 netdev_err(bp->dev, "Firmware init phase 2 failed\n"); in bnxt_fw_init_one()
14391 rc = bnxt_approve_mac(bp, bp->dev->dev_addr, false); in bnxt_fw_init_one()
14401 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_reset_writel()
14402 u32 reg = fw_health->fw_reset_seq_regs[reg_idx]; in bnxt_fw_reset_writel()
14403 u32 val = fw_health->fw_reset_seq_vals[reg_idx]; in bnxt_fw_reset_writel()
14406 delay_msecs = fw_health->fw_reset_seq_delay_msec[reg_idx]; in bnxt_fw_reset_writel()
14411 pci_write_config_dword(bp->pdev, reg_off, val); in bnxt_fw_reset_writel()
14415 bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4); in bnxt_fw_reset_writel()
14419 writel(val, bp->bar0 + reg_off); in bnxt_fw_reset_writel()
14422 writel(val, bp->bar1 + reg_off); in bnxt_fw_reset_writel()
14426 pci_read_config_dword(bp->pdev, 0, &val); in bnxt_fw_reset_writel()
14437 if (~bp->fw_cap & BNXT_FW_CAP_HOT_RESET_IF) in bnxt_hwrm_reset_permitted()
14443 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_reset_permitted()
14446 result = !!(le16_to_cpu(resp->flags) & in bnxt_hwrm_reset_permitted()
14454 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_reset_all()
14457 if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) { in bnxt_reset_all()
14459 bp->fw_reset_timestamp = jiffies; in bnxt_reset_all()
14463 if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_HOST) { in bnxt_reset_all()
14464 for (i = 0; i < fw_health->fw_reset_seq_cnt; i++) in bnxt_reset_all()
14466 } else if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) { in bnxt_reset_all()
14471 req->target_id = cpu_to_le16(HWRM_TARGET_ID_KONG); in bnxt_reset_all()
14472 req->embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP; in bnxt_reset_all()
14473 req->selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP; in bnxt_reset_all()
14474 req->flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; in bnxt_reset_all()
14477 if (rc != -ENODEV) in bnxt_reset_all()
14478 netdev_warn(bp->dev, "Unable to reset FW rc=%d\n", rc); in bnxt_reset_all()
14480 bp->fw_reset_timestamp = jiffies; in bnxt_reset_all()
14485 return time_after(jiffies, bp->fw_reset_timestamp + in bnxt_fw_reset_timeout()
14486 (bp->fw_reset_max_dsecs * HZ / 10)); in bnxt_fw_reset_timeout()
14491 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset_abort()
14492 if (bp->fw_reset_state != BNXT_FW_RESET_STATE_POLL_VF) in bnxt_fw_reset_abort()
14494 bp->fw_reset_state = 0; in bnxt_fw_reset_abort()
14495 dev_close(bp->dev); in bnxt_fw_reset_abort()
14503 if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_fw_reset_task()
14504 netdev_err(bp->dev, "bnxt_fw_reset_task() called when not in fw reset mode!\n"); in bnxt_fw_reset_task()
14508 switch (bp->fw_reset_state) { in bnxt_fw_reset_task()
14514 …netdev_err(bp->dev, "Firmware reset aborted, subsequent func_qcfg cmd failed, rc = %d, %d msecs si… in bnxt_fw_reset_task()
14515 n, jiffies_to_msecs(jiffies - in bnxt_fw_reset_task()
14516 bp->fw_reset_timestamp)); in bnxt_fw_reset_task()
14520 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset_task()
14521 bp->fw_reset_state = 0; in bnxt_fw_reset_task()
14522 netdev_err(bp->dev, "Firmware reset aborted, bnxt_get_registered_vfs() returns %d\n", in bnxt_fw_reset_task()
14529 bp->fw_reset_timestamp = jiffies; in bnxt_fw_reset_task()
14531 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) { in bnxt_fw_reset_task()
14537 if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) { in bnxt_fw_reset_task()
14538 bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN; in bnxt_fw_reset_task()
14541 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset_task()
14542 tmo = bp->fw_reset_min_dsecs * HZ / 10; in bnxt_fw_reset_task()
14554 bnxt_queue_fw_reset_work(bp, HZ / 5); in bnxt_fw_reset_task()
14558 if (!bp->fw_health->primary) { in bnxt_fw_reset_task()
14559 u32 wait_dsecs = bp->fw_health->normal_func_wait_dsecs; in bnxt_fw_reset_task()
14561 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset_task()
14565 bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW; in bnxt_fw_reset_task()
14570 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset_task()
14571 bnxt_queue_fw_reset_work(bp, bp->fw_reset_min_dsecs * HZ / 10); in bnxt_fw_reset_task()
14575 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state) && in bnxt_fw_reset_task()
14576 !bp->fw_reset_min_dsecs) { in bnxt_fw_reset_task()
14579 pci_read_config_word(bp->pdev, PCI_SUBSYSTEM_ID, &val); in bnxt_fw_reset_task()
14582 netdev_err(bp->dev, "Firmware reset aborted, PCI config space invalid\n"); in bnxt_fw_reset_task()
14583 rc = -ETIMEDOUT; in bnxt_fw_reset_task()
14590 clear_bit(BNXT_STATE_FW_FATAL_COND, &bp->state); in bnxt_fw_reset_task()
14591 clear_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state); in bnxt_fw_reset_task()
14592 if (test_and_clear_bit(BNXT_STATE_FW_ACTIVATE_RESET, &bp->state) && in bnxt_fw_reset_task()
14593 !test_bit(BNXT_STATE_FW_ACTIVATE, &bp->state)) in bnxt_fw_reset_task()
14595 if (pci_enable_device(bp->pdev)) { in bnxt_fw_reset_task()
14596 netdev_err(bp->dev, "Cannot re-enable PCI device\n"); in bnxt_fw_reset_task()
14597 rc = -ENODEV; in bnxt_fw_reset_task()
14600 pci_set_master(bp->pdev); in bnxt_fw_reset_task()
14601 bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW; in bnxt_fw_reset_task()
14604 bp->hwrm_cmd_timeout = SHORT_HWRM_CMD_TIMEOUT; in bnxt_fw_reset_task()
14608 netdev_err(bp->dev, "Firmware reset aborted\n"); in bnxt_fw_reset_task()
14611 bnxt_queue_fw_reset_work(bp, HZ / 5); in bnxt_fw_reset_task()
14614 bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT; in bnxt_fw_reset_task()
14615 bp->fw_reset_state = BNXT_FW_RESET_STATE_OPENING; in bnxt_fw_reset_task()
14622 rc = bnxt_open(bp->dev); in bnxt_fw_reset_task()
14624 netdev_err(bp->dev, "bnxt_open() failed during FW reset\n"); in bnxt_fw_reset_task()
14630 if ((bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) && in bnxt_fw_reset_task()
14631 bp->fw_health->enabled) { in bnxt_fw_reset_task()
14632 bp->fw_health->last_fw_reset_cnt = in bnxt_fw_reset_task()
14635 bp->fw_reset_state = 0; in bnxt_fw_reset_task()
14638 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset_task()
14640 clear_bit(BNXT_STATE_FW_ACTIVATE, &bp->state); in bnxt_fw_reset_task()
14641 if (test_and_clear_bit(BNXT_STATE_RECOVER, &bp->state)) { in bnxt_fw_reset_task()
14657 if (bp->fw_health->status_reliable || in bnxt_fw_reset_task()
14658 (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) { in bnxt_fw_reset_task()
14661 netdev_err(bp->dev, "fw_health_status 0x%x\n", sts); in bnxt_fw_reset_task()
14676 SET_NETDEV_DEV(dev, &pdev->dev); in bnxt_init_board()
14678 /* enable device (incl. PCI PM wakeup), and bus-mastering */ in bnxt_init_board()
14681 dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); in bnxt_init_board()
14686 dev_err(&pdev->dev, in bnxt_init_board()
14688 rc = -ENODEV; in bnxt_init_board()
14694 dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n"); in bnxt_init_board()
14698 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) != 0 && in bnxt_init_board()
14699 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) { in bnxt_init_board()
14700 dev_err(&pdev->dev, "System does not support DMA, aborting\n"); in bnxt_init_board()
14701 rc = -EIO; in bnxt_init_board()
14707 bp->dev = dev; in bnxt_init_board()
14708 bp->pdev = pdev; in bnxt_init_board()
14710 /* Doorbell BAR bp->bar1 is mapped after bnxt_fw_init_one_p2() in bnxt_init_board()
14713 bp->bar0 = pci_ioremap_bar(pdev, 0); in bnxt_init_board()
14714 if (!bp->bar0) { in bnxt_init_board()
14715 dev_err(&pdev->dev, "Cannot map device registers, aborting\n"); in bnxt_init_board()
14716 rc = -ENOMEM; in bnxt_init_board()
14720 bp->bar2 = pci_ioremap_bar(pdev, 4); in bnxt_init_board()
14721 if (!bp->bar2) { in bnxt_init_board()
14722 dev_err(&pdev->dev, "Cannot map bar4 registers, aborting\n"); in bnxt_init_board()
14723 rc = -ENOMEM; in bnxt_init_board()
14727 INIT_WORK(&bp->sp_task, bnxt_sp_task); in bnxt_init_board()
14728 INIT_DELAYED_WORK(&bp->fw_reset_task, bnxt_fw_reset_task); in bnxt_init_board()
14730 spin_lock_init(&bp->ntp_fltr_lock); in bnxt_init_board()
14732 spin_lock_init(&bp->db_lock); in bnxt_init_board()
14735 bp->rx_ring_size = BNXT_DEFAULT_RX_RING_SIZE; in bnxt_init_board()
14736 bp->tx_ring_size = BNXT_DEFAULT_TX_RING_SIZE; in bnxt_init_board()
14738 timer_setup(&bp->timer, bnxt_timer, 0); in bnxt_init_board()
14739 bp->current_interval = BNXT_TIMER_INTERVAL; in bnxt_init_board()
14741 bp->vxlan_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_init_board()
14742 bp->nge_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_init_board()
14744 clear_bit(BNXT_STATE_OPEN, &bp->state); in bnxt_init_board()
14765 if (!is_valid_ether_addr(addr->sa_data)) in bnxt_change_mac_addr()
14766 return -EADDRNOTAVAIL; in bnxt_change_mac_addr()
14768 if (ether_addr_equal(addr->sa_data, dev->dev_addr)) in bnxt_change_mac_addr()
14771 rc = bnxt_approve_mac(bp, addr->sa_data, true); in bnxt_change_mac_addr()
14775 eth_hw_addr_set(dev, addr->sa_data); in bnxt_change_mac_addr()
14793 WRITE_ONCE(dev->mtu, new_mtu); in bnxt_change_mtu()
14795 /* MTU change may change the AGG ring settings if an XDP multi-buffer in bnxt_change_mtu()
14799 if (READ_ONCE(bp->xdp_prog)) in bnxt_change_mtu()
14816 if (tc > bp->max_tc) { in bnxt_setup_mq_tc()
14818 tc, bp->max_tc); in bnxt_setup_mq_tc()
14819 return -EINVAL; in bnxt_setup_mq_tc()
14822 if (bp->num_tc == tc) in bnxt_setup_mq_tc()
14825 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_setup_mq_tc()
14828 rc = bnxt_check_rings(bp, bp->tx_nr_rings_per_tc, bp->rx_nr_rings, in bnxt_setup_mq_tc()
14829 sh, tc, bp->tx_nr_rings_xdp); in bnxt_setup_mq_tc()
14833 /* Needs to close the device and do hw resource re-allocations */ in bnxt_setup_mq_tc()
14834 if (netif_running(bp->dev)) in bnxt_setup_mq_tc()
14838 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tc; in bnxt_setup_mq_tc()
14840 bp->num_tc = tc; in bnxt_setup_mq_tc()
14842 bp->tx_nr_rings = bp->tx_nr_rings_per_tc; in bnxt_setup_mq_tc()
14844 bp->num_tc = 0; in bnxt_setup_mq_tc()
14846 bp->tx_nr_rings += bp->tx_nr_rings_xdp; in bnxt_setup_mq_tc()
14847 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings); in bnxt_setup_mq_tc()
14848 bp->cp_nr_rings = sh ? max_t(int, tx_cp, bp->rx_nr_rings) : in bnxt_setup_mq_tc()
14849 tx_cp + bp->rx_nr_rings; in bnxt_setup_mq_tc()
14851 if (netif_running(bp->dev)) in bnxt_setup_mq_tc()
14863 !tc_cls_can_offload_and_chain0(bp->dev, type_data)) in bnxt_setup_tc_block_cb()
14864 return -EOPNOTSUPP; in bnxt_setup_tc_block_cb()
14868 return bnxt_tc_setup_flower(bp, bp->pf.fw_fid, type_data); in bnxt_setup_tc_block_cb()
14870 return -EOPNOTSUPP; in bnxt_setup_tc_block_cb()
14890 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; in bnxt_setup_tc()
14892 return bnxt_setup_mq_tc(dev, mqprio->num_tc); in bnxt_setup_tc()
14895 return -EOPNOTSUPP; in bnxt_setup_tc()
14907 vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_get_ntp_filter_idx()
14908 return bnxt_toeplitz(bp, fkeys, (void *)vnic->rss_hash_key); in bnxt_get_ntp_filter_idx()
14917 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_insert_ntp_filter()
14918 bit_id = bitmap_find_free_region(bp->ntp_fltr_bmap, bp->max_fltr, 0); in bnxt_insert_ntp_filter()
14920 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_insert_ntp_filter()
14921 return -ENOMEM; in bnxt_insert_ntp_filter()
14924 fltr->base.sw_id = (u16)bit_id; in bnxt_insert_ntp_filter()
14925 fltr->base.type = BNXT_FLTR_TYPE_NTUPLE; in bnxt_insert_ntp_filter()
14926 fltr->base.flags |= BNXT_ACT_RING_DST; in bnxt_insert_ntp_filter()
14927 head = &bp->ntp_fltr_hash_tbl[idx]; in bnxt_insert_ntp_filter()
14928 hlist_add_head_rcu(&fltr->base.hash, head); in bnxt_insert_ntp_filter()
14929 set_bit(BNXT_FLTR_INSERTED, &fltr->base.state); in bnxt_insert_ntp_filter()
14930 bnxt_insert_usr_fltr(bp, &fltr->base); in bnxt_insert_ntp_filter()
14931 bp->ntp_fltr_count++; in bnxt_insert_ntp_filter()
14932 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_insert_ntp_filter()
14939 struct bnxt_flow_masks *masks1 = &f1->fmasks; in bnxt_fltr_match()
14940 struct bnxt_flow_masks *masks2 = &f2->fmasks; in bnxt_fltr_match()
14941 struct flow_keys *keys1 = &f1->fkeys; in bnxt_fltr_match()
14942 struct flow_keys *keys2 = &f2->fkeys; in bnxt_fltr_match()
14944 if (keys1->basic.n_proto != keys2->basic.n_proto || in bnxt_fltr_match()
14945 keys1->basic.ip_proto != keys2->basic.ip_proto) in bnxt_fltr_match()
14948 if (keys1->basic.n_proto == htons(ETH_P_IP)) { in bnxt_fltr_match()
14949 if (keys1->addrs.v4addrs.src != keys2->addrs.v4addrs.src || in bnxt_fltr_match()
14950 masks1->addrs.v4addrs.src != masks2->addrs.v4addrs.src || in bnxt_fltr_match()
14951 keys1->addrs.v4addrs.dst != keys2->addrs.v4addrs.dst || in bnxt_fltr_match()
14952 masks1->addrs.v4addrs.dst != masks2->addrs.v4addrs.dst) in bnxt_fltr_match()
14955 if (!ipv6_addr_equal(&keys1->addrs.v6addrs.src, in bnxt_fltr_match()
14956 &keys2->addrs.v6addrs.src) || in bnxt_fltr_match()
14957 !ipv6_addr_equal(&masks1->addrs.v6addrs.src, in bnxt_fltr_match()
14958 &masks2->addrs.v6addrs.src) || in bnxt_fltr_match()
14959 !ipv6_addr_equal(&keys1->addrs.v6addrs.dst, in bnxt_fltr_match()
14960 &keys2->addrs.v6addrs.dst) || in bnxt_fltr_match()
14961 !ipv6_addr_equal(&masks1->addrs.v6addrs.dst, in bnxt_fltr_match()
14962 &masks2->addrs.v6addrs.dst)) in bnxt_fltr_match()
14966 return keys1->ports.src == keys2->ports.src && in bnxt_fltr_match()
14967 masks1->ports.src == masks2->ports.src && in bnxt_fltr_match()
14968 keys1->ports.dst == keys2->ports.dst && in bnxt_fltr_match()
14969 masks1->ports.dst == masks2->ports.dst && in bnxt_fltr_match()
14970 keys1->control.flags == keys2->control.flags && in bnxt_fltr_match()
14971 f1->l2_fltr == f2->l2_fltr; in bnxt_fltr_match()
14981 head = &bp->ntp_fltr_hash_tbl[idx]; in bnxt_lookup_ntp_filter_from_idx()
15001 if (ether_addr_equal(dev->dev_addr, eth->h_dest)) { in bnxt_rx_flow_steer()
15002 l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0]; in bnxt_rx_flow_steer()
15003 atomic_inc(&l2_fltr->refcnt); in bnxt_rx_flow_steer()
15007 ether_addr_copy(key.dst_mac_addr, eth->h_dest); in bnxt_rx_flow_steer()
15011 return -EINVAL; in bnxt_rx_flow_steer()
15012 if (l2_fltr->base.flags & BNXT_ACT_FUNC_DST) { in bnxt_rx_flow_steer()
15014 return -EINVAL; in bnxt_rx_flow_steer()
15020 return -ENOMEM; in bnxt_rx_flow_steer()
15023 fkeys = &new_fltr->fkeys; in bnxt_rx_flow_steer()
15025 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15029 if ((fkeys->basic.n_proto != htons(ETH_P_IP) && in bnxt_rx_flow_steer()
15030 fkeys->basic.n_proto != htons(ETH_P_IPV6)) || in bnxt_rx_flow_steer()
15031 ((fkeys->basic.ip_proto != IPPROTO_TCP) && in bnxt_rx_flow_steer()
15032 (fkeys->basic.ip_proto != IPPROTO_UDP))) { in bnxt_rx_flow_steer()
15033 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15036 new_fltr->fmasks = BNXT_FLOW_IPV4_MASK_ALL; in bnxt_rx_flow_steer()
15037 if (fkeys->basic.n_proto == htons(ETH_P_IPV6)) { in bnxt_rx_flow_steer()
15038 if (bp->hwrm_spec_code < 0x10601) { in bnxt_rx_flow_steer()
15039 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15042 new_fltr->fmasks = BNXT_FLOW_IPV6_MASK_ALL; in bnxt_rx_flow_steer()
15044 flags = fkeys->control.flags; in bnxt_rx_flow_steer()
15046 bp->hwrm_spec_code < 0x10601) || (flags & FLOW_DIS_IS_FRAGMENT)) { in bnxt_rx_flow_steer()
15047 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15050 new_fltr->l2_fltr = l2_fltr; in bnxt_rx_flow_steer()
15056 rc = fltr->base.sw_id; in bnxt_rx_flow_steer()
15062 new_fltr->flow_id = flow_id; in bnxt_rx_flow_steer()
15063 new_fltr->base.rxq = rxq_index; in bnxt_rx_flow_steer()
15067 return new_fltr->base.sw_id; in bnxt_rx_flow_steer()
15079 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_del_ntp_filter()
15080 if (!test_and_clear_bit(BNXT_FLTR_INSERTED, &fltr->base.state)) { in bnxt_del_ntp_filter()
15081 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_ntp_filter()
15084 hlist_del_rcu(&fltr->base.hash); in bnxt_del_ntp_filter()
15085 bnxt_del_one_usr_fltr(bp, &fltr->base); in bnxt_del_ntp_filter()
15086 bp->ntp_fltr_count--; in bnxt_del_ntp_filter()
15087 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_ntp_filter()
15088 bnxt_del_l2_filter(bp, fltr->l2_fltr); in bnxt_del_ntp_filter()
15089 clear_bit(fltr->base.sw_id, bp->ntp_fltr_bmap); in bnxt_del_ntp_filter()
15104 head = &bp->ntp_fltr_hash_tbl[i]; in bnxt_cfg_ntp_filters()
15108 if (test_bit(BNXT_FLTR_VALID, &fltr->base.state)) { in bnxt_cfg_ntp_filters()
15109 if (fltr->base.flags & BNXT_ACT_NO_AGING) in bnxt_cfg_ntp_filters()
15111 if (rps_may_expire_flow(bp->dev, fltr->base.rxq, in bnxt_cfg_ntp_filters()
15112 fltr->flow_id, in bnxt_cfg_ntp_filters()
15113 fltr->base.sw_id)) { in bnxt_cfg_ntp_filters()
15124 set_bit(BNXT_FLTR_VALID, &fltr->base.state); in bnxt_cfg_ntp_filters()
15140 if (ti->type == UDP_TUNNEL_TYPE_VXLAN) in bnxt_udp_tunnel_set_port()
15142 else if (ti->type == UDP_TUNNEL_TYPE_GENEVE) in bnxt_udp_tunnel_set_port()
15147 return bnxt_hwrm_tunnel_dst_port_alloc(bp, ti->port, cmd); in bnxt_udp_tunnel_set_port()
15156 if (ti->type == UDP_TUNNEL_TYPE_VXLAN) in bnxt_udp_tunnel_unset_port()
15158 else if (ti->type == UDP_TUNNEL_TYPE_GENEVE) in bnxt_udp_tunnel_unset_port()
15193 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, bp->br_mode, 0, 0, in bnxt_bridge_getlink()
15204 if (bp->hwrm_spec_code < 0x10708 || !BNXT_SINGLE_PF(bp)) in bnxt_bridge_setlink()
15205 return -EOPNOTSUPP; in bnxt_bridge_setlink()
15209 return -EINVAL; in bnxt_bridge_setlink()
15215 if (mode == bp->br_mode) in bnxt_bridge_setlink()
15220 bp->br_mode = mode; in bnxt_bridge_setlink()
15231 if (bp->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) in bnxt_get_port_parent_id()
15232 return -EOPNOTSUPP; in bnxt_get_port_parent_id()
15234 /* The PF and it's VF-reps only support the switchdev framework */ in bnxt_get_port_parent_id()
15235 if (!BNXT_PF(bp) || !(bp->flags & BNXT_FLAG_DSN_VALID)) in bnxt_get_port_parent_id()
15236 return -EOPNOTSUPP; in bnxt_get_port_parent_id()
15238 ppid->id_len = sizeof(bp->dsn); in bnxt_get_port_parent_id()
15239 memcpy(ppid->id, bp->dsn, ppid->id_len); in bnxt_get_port_parent_id()
15284 cpr = &bp->bnapi[i]->cp_ring; in bnxt_get_queue_stats_rx()
15285 sw = cpr->stats.sw_stats; in bnxt_get_queue_stats_rx()
15287 stats->packets = 0; in bnxt_get_queue_stats_rx()
15288 stats->packets += BNXT_GET_RING_STATS64(sw, rx_ucast_pkts); in bnxt_get_queue_stats_rx()
15289 stats->packets += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts); in bnxt_get_queue_stats_rx()
15290 stats->packets += BNXT_GET_RING_STATS64(sw, rx_bcast_pkts); in bnxt_get_queue_stats_rx()
15292 stats->bytes = 0; in bnxt_get_queue_stats_rx()
15293 stats->bytes += BNXT_GET_RING_STATS64(sw, rx_ucast_bytes); in bnxt_get_queue_stats_rx()
15294 stats->bytes += BNXT_GET_RING_STATS64(sw, rx_mcast_bytes); in bnxt_get_queue_stats_rx()
15295 stats->bytes += BNXT_GET_RING_STATS64(sw, rx_bcast_bytes); in bnxt_get_queue_stats_rx()
15297 stats->alloc_fail = cpr->sw_stats->rx.rx_oom_discards; in bnxt_get_queue_stats_rx()
15307 bnapi = bp->tx_ring[bp->tx_ring_map[i]].bnapi; in bnxt_get_queue_stats_tx()
15308 sw = bnapi->cp_ring.stats.sw_stats; in bnxt_get_queue_stats_tx()
15310 stats->packets = 0; in bnxt_get_queue_stats_tx()
15311 stats->packets += BNXT_GET_RING_STATS64(sw, tx_ucast_pkts); in bnxt_get_queue_stats_tx()
15312 stats->packets += BNXT_GET_RING_STATS64(sw, tx_mcast_pkts); in bnxt_get_queue_stats_tx()
15313 stats->packets += BNXT_GET_RING_STATS64(sw, tx_bcast_pkts); in bnxt_get_queue_stats_tx()
15315 stats->bytes = 0; in bnxt_get_queue_stats_tx()
15316 stats->bytes += BNXT_GET_RING_STATS64(sw, tx_ucast_bytes); in bnxt_get_queue_stats_tx()
15317 stats->bytes += BNXT_GET_RING_STATS64(sw, tx_mcast_bytes); in bnxt_get_queue_stats_tx()
15318 stats->bytes += BNXT_GET_RING_STATS64(sw, tx_bcast_bytes); in bnxt_get_queue_stats_tx()
15327 rx->packets = bp->net_stats_prev.rx_packets; in bnxt_get_base_stats()
15328 rx->bytes = bp->net_stats_prev.rx_bytes; in bnxt_get_base_stats()
15329 rx->alloc_fail = bp->ring_err_stats_prev.rx_total_oom_discards; in bnxt_get_base_stats()
15331 tx->packets = bp->net_stats_prev.tx_packets; in bnxt_get_base_stats()
15332 tx->bytes = bp->net_stats_prev.tx_bytes; in bnxt_get_base_stats()
15348 rxr = &bp->rx_ring[idx]; in bnxt_queue_mem_alloc()
15354 clone->rx_prod = 0; in bnxt_queue_mem_alloc()
15355 clone->rx_agg_prod = 0; in bnxt_queue_mem_alloc()
15356 clone->rx_sw_agg_prod = 0; in bnxt_queue_mem_alloc()
15357 clone->rx_next_cons = 0; in bnxt_queue_mem_alloc()
15359 rc = bnxt_alloc_rx_page_pool(bp, clone, rxr->page_pool->p.nid); in bnxt_queue_mem_alloc()
15363 rc = xdp_rxq_info_reg(&clone->xdp_rxq, bp->dev, idx, 0); in bnxt_queue_mem_alloc()
15367 rc = xdp_rxq_info_reg_mem_model(&clone->xdp_rxq, in bnxt_queue_mem_alloc()
15369 clone->page_pool); in bnxt_queue_mem_alloc()
15373 ring = &clone->rx_ring_struct; in bnxt_queue_mem_alloc()
15374 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_queue_mem_alloc()
15378 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in bnxt_queue_mem_alloc()
15379 ring = &clone->rx_agg_ring_struct; in bnxt_queue_mem_alloc()
15380 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_queue_mem_alloc()
15389 if (bp->flags & BNXT_FLAG_TPA) { in bnxt_queue_mem_alloc()
15399 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_queue_mem_alloc()
15401 if (bp->flags & BNXT_FLAG_TPA) in bnxt_queue_mem_alloc()
15409 bnxt_free_ring(bp, &clone->rx_agg_ring_struct.ring_mem); in bnxt_queue_mem_alloc()
15411 bnxt_free_ring(bp, &clone->rx_ring_struct.ring_mem); in bnxt_queue_mem_alloc()
15413 xdp_rxq_info_unreg(&clone->xdp_rxq); in bnxt_queue_mem_alloc()
15415 page_pool_destroy(clone->page_pool); in bnxt_queue_mem_alloc()
15417 page_pool_destroy(clone->head_pool); in bnxt_queue_mem_alloc()
15418 clone->page_pool = NULL; in bnxt_queue_mem_alloc()
15419 clone->head_pool = NULL; in bnxt_queue_mem_alloc()
15431 xdp_rxq_info_unreg(&rxr->xdp_rxq); in bnxt_queue_mem_free()
15433 page_pool_destroy(rxr->page_pool); in bnxt_queue_mem_free()
15435 page_pool_destroy(rxr->head_pool); in bnxt_queue_mem_free()
15436 rxr->page_pool = NULL; in bnxt_queue_mem_free()
15437 rxr->head_pool = NULL; in bnxt_queue_mem_free()
15439 ring = &rxr->rx_ring_struct; in bnxt_queue_mem_free()
15440 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_queue_mem_free()
15442 ring = &rxr->rx_agg_ring_struct; in bnxt_queue_mem_free()
15443 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_queue_mem_free()
15445 kfree(rxr->rx_agg_bmap); in bnxt_queue_mem_free()
15446 rxr->rx_agg_bmap = NULL; in bnxt_queue_mem_free()
15457 dst_ring = &dst->rx_ring_struct; in bnxt_copy_rx_ring()
15458 dst_rmem = &dst_ring->ring_mem; in bnxt_copy_rx_ring()
15459 src_ring = &src->rx_ring_struct; in bnxt_copy_rx_ring()
15460 src_rmem = &src_ring->ring_mem; in bnxt_copy_rx_ring()
15462 WARN_ON(dst_rmem->nr_pages != src_rmem->nr_pages); in bnxt_copy_rx_ring()
15463 WARN_ON(dst_rmem->page_size != src_rmem->page_size); in bnxt_copy_rx_ring()
15464 WARN_ON(dst_rmem->flags != src_rmem->flags); in bnxt_copy_rx_ring()
15465 WARN_ON(dst_rmem->depth != src_rmem->depth); in bnxt_copy_rx_ring()
15466 WARN_ON(dst_rmem->vmem_size != src_rmem->vmem_size); in bnxt_copy_rx_ring()
15467 WARN_ON(dst_rmem->ctx_mem != src_rmem->ctx_mem); in bnxt_copy_rx_ring()
15469 dst_rmem->pg_tbl = src_rmem->pg_tbl; in bnxt_copy_rx_ring()
15470 dst_rmem->pg_tbl_map = src_rmem->pg_tbl_map; in bnxt_copy_rx_ring()
15471 *dst_rmem->vmem = *src_rmem->vmem; in bnxt_copy_rx_ring()
15472 for (i = 0; i < dst_rmem->nr_pages; i++) { in bnxt_copy_rx_ring()
15473 dst_rmem->pg_arr[i] = src_rmem->pg_arr[i]; in bnxt_copy_rx_ring()
15474 dst_rmem->dma_arr[i] = src_rmem->dma_arr[i]; in bnxt_copy_rx_ring()
15477 if (!(bp->flags & BNXT_FLAG_AGG_RINGS)) in bnxt_copy_rx_ring()
15480 dst_ring = &dst->rx_agg_ring_struct; in bnxt_copy_rx_ring()
15481 dst_rmem = &dst_ring->ring_mem; in bnxt_copy_rx_ring()
15482 src_ring = &src->rx_agg_ring_struct; in bnxt_copy_rx_ring()
15483 src_rmem = &src_ring->ring_mem; in bnxt_copy_rx_ring()
15485 WARN_ON(dst_rmem->nr_pages != src_rmem->nr_pages); in bnxt_copy_rx_ring()
15486 WARN_ON(dst_rmem->page_size != src_rmem->page_size); in bnxt_copy_rx_ring()
15487 WARN_ON(dst_rmem->flags != src_rmem->flags); in bnxt_copy_rx_ring()
15488 WARN_ON(dst_rmem->depth != src_rmem->depth); in bnxt_copy_rx_ring()
15489 WARN_ON(dst_rmem->vmem_size != src_rmem->vmem_size); in bnxt_copy_rx_ring()
15490 WARN_ON(dst_rmem->ctx_mem != src_rmem->ctx_mem); in bnxt_copy_rx_ring()
15491 WARN_ON(dst->rx_agg_bmap_size != src->rx_agg_bmap_size); in bnxt_copy_rx_ring()
15493 dst_rmem->pg_tbl = src_rmem->pg_tbl; in bnxt_copy_rx_ring()
15494 dst_rmem->pg_tbl_map = src_rmem->pg_tbl_map; in bnxt_copy_rx_ring()
15495 *dst_rmem->vmem = *src_rmem->vmem; in bnxt_copy_rx_ring()
15496 for (i = 0; i < dst_rmem->nr_pages; i++) { in bnxt_copy_rx_ring()
15497 dst_rmem->pg_arr[i] = src_rmem->pg_arr[i]; in bnxt_copy_rx_ring()
15498 dst_rmem->dma_arr[i] = src_rmem->dma_arr[i]; in bnxt_copy_rx_ring()
15501 dst->rx_agg_bmap = src->rx_agg_bmap; in bnxt_copy_rx_ring()
15512 rxr = &bp->rx_ring[idx]; in bnxt_queue_start()
15515 rxr->rx_prod = clone->rx_prod; in bnxt_queue_start()
15516 rxr->rx_agg_prod = clone->rx_agg_prod; in bnxt_queue_start()
15517 rxr->rx_sw_agg_prod = clone->rx_sw_agg_prod; in bnxt_queue_start()
15518 rxr->rx_next_cons = clone->rx_next_cons; in bnxt_queue_start()
15519 rxr->rx_tpa = clone->rx_tpa; in bnxt_queue_start()
15520 rxr->rx_tpa_idx_map = clone->rx_tpa_idx_map; in bnxt_queue_start()
15521 rxr->page_pool = clone->page_pool; in bnxt_queue_start()
15522 rxr->head_pool = clone->head_pool; in bnxt_queue_start()
15523 rxr->xdp_rxq = clone->xdp_rxq; in bnxt_queue_start()
15534 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_queue_start()
15535 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_queue_start()
15536 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_queue_start()
15538 cpr = &rxr->bnapi->cp_ring; in bnxt_queue_start()
15539 cpr->sw_stats->rx.rx_resets++; in bnxt_queue_start()
15542 vnic = &bp->vnic_info[i]; in bnxt_queue_start()
15546 netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %d\n", in bnxt_queue_start()
15547 vnic->vnic_id, rc); in bnxt_queue_start()
15550 vnic->mru = bp->dev->mtu + ETH_HLEN + VLAN_HLEN; in bnxt_queue_start()
15570 vnic = &bp->vnic_info[i]; in bnxt_queue_stop()
15571 vnic->mru = 0; in bnxt_queue_stop()
15576 rxr = &bp->rx_ring[idx]; in bnxt_queue_stop()
15579 rxr->rx_next_cons = 0; in bnxt_queue_stop()
15580 page_pool_disable_direct_recycling(rxr->page_pool); in bnxt_queue_stop()
15582 page_pool_disable_direct_recycling(rxr->head_pool); in bnxt_queue_stop()
15615 WARN_ON(bp->num_rss_ctx); in bnxt_remove_one()
15616 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_remove_one()
15618 cancel_work_sync(&bp->sp_task); in bnxt_remove_one()
15619 cancel_delayed_work_sync(&bp->fw_reset_task); in bnxt_remove_one()
15620 bp->sp_event = 0; in bnxt_remove_one()
15632 kfree(bp->ptp_cfg); in bnxt_remove_one()
15633 bp->ptp_cfg = NULL; in bnxt_remove_one()
15634 kfree(bp->fw_health); in bnxt_remove_one()
15635 bp->fw_health = NULL; in bnxt_remove_one()
15639 kfree(bp->rss_indir_tbl); in bnxt_remove_one()
15640 bp->rss_indir_tbl = NULL; in bnxt_remove_one()
15648 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_probe_phy()
15650 bp->phy_flags = 0; in bnxt_probe_phy()
15653 netdev_err(bp->dev, "Probe phy can't get phy capabilities (rc: %x)\n", in bnxt_probe_phy()
15657 if (bp->phy_flags & BNXT_PHY_FL_NO_FCS) in bnxt_probe_phy()
15658 bp->dev->priv_flags |= IFF_SUPP_NOFCS; in bnxt_probe_phy()
15660 bp->dev->priv_flags &= ~IFF_SUPP_NOFCS; in bnxt_probe_phy()
15664 mutex_lock(&bp->link_lock); in bnxt_probe_phy()
15667 mutex_unlock(&bp->link_lock); in bnxt_probe_phy()
15668 netdev_err(bp->dev, "Probe phy can't update link (rc: %x)\n", in bnxt_probe_phy()
15676 if (link_info->auto_link_speeds && !link_info->support_auto_speeds) in bnxt_probe_phy()
15677 link_info->support_auto_speeds = link_info->support_speeds; in bnxt_probe_phy()
15680 mutex_unlock(&bp->link_lock); in bnxt_probe_phy()
15688 if (!pdev->msix_cap) in bnxt_get_max_irq()
15691 pci_read_config_word(pdev, pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl); in bnxt_get_max_irq()
15698 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in _bnxt_get_max_rings()
15701 *max_tx = hw_resc->max_tx_rings; in _bnxt_get_max_rings()
15702 *max_rx = hw_resc->max_rx_rings; in _bnxt_get_max_rings()
15704 max_irq = min_t(int, bnxt_get_max_func_irqs(bp) - in _bnxt_get_max_rings()
15706 hw_resc->max_stat_ctxs - in _bnxt_get_max_rings()
15708 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in _bnxt_get_max_rings()
15710 max_ring_grps = hw_resc->max_hw_ring_grps; in _bnxt_get_max_rings()
15712 *max_cp -= 1; in _bnxt_get_max_rings()
15713 *max_rx -= 2; in _bnxt_get_max_rings()
15715 if (bp->flags & BNXT_FLAG_AGG_RINGS) in _bnxt_get_max_rings()
15717 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in _bnxt_get_max_rings()
15739 return -ENOMEM; in bnxt_get_max_rings()
15750 if (rc && (bp->flags & BNXT_FLAG_AGG_RINGS)) { in bnxt_get_dflt_rings()
15752 bp->flags &= ~BNXT_FLAG_AGG_RINGS; in bnxt_get_dflt_rings()
15756 bp->flags |= BNXT_FLAG_AGG_RINGS; in bnxt_get_dflt_rings()
15759 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; in bnxt_get_dflt_rings()
15760 bp->dev->hw_features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW); in bnxt_get_dflt_rings()
15761 bp->dev->features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW); in bnxt_get_dflt_rings()
15765 if (bp->flags & BNXT_FLAG_ROCE_CAP) { in bnxt_get_dflt_rings()
15777 max_cp -= BNXT_MIN_ROCE_CP_RINGS; in bnxt_get_dflt_rings()
15778 max_irq -= BNXT_MIN_ROCE_CP_RINGS; in bnxt_get_dflt_rings()
15779 max_stat -= BNXT_MIN_ROCE_STAT_CTXS; in bnxt_get_dflt_rings()
15794 bp->cp_nr_rings = min_t(int, bp->tx_nr_rings_per_tc, bp->rx_nr_rings); in bnxt_trim_dflt_sh_rings()
15795 bp->rx_nr_rings = bp->cp_nr_rings; in bnxt_trim_dflt_sh_rings()
15796 bp->tx_nr_rings_per_tc = bp->cp_nr_rings; in bnxt_trim_dflt_sh_rings()
15797 bp->tx_nr_rings = bp->tx_nr_rings_per_tc; in bnxt_trim_dflt_sh_rings()
15809 bp->flags |= BNXT_FLAG_SHARED_RINGS; in bnxt_set_dflt_rings()
15811 /* Reduce default rings on multi-port cards so that total default in bnxt_set_dflt_rings()
15814 if (bp->port_count > 1) { in bnxt_set_dflt_rings()
15816 max_t(int, num_online_cpus() / bp->port_count, 1); in bnxt_set_dflt_rings()
15823 bp->rx_nr_rings = min_t(int, dflt_rings, max_rx_rings); in bnxt_set_dflt_rings()
15824 bp->tx_nr_rings_per_tc = min_t(int, dflt_rings, max_tx_rings); in bnxt_set_dflt_rings()
15828 bp->cp_nr_rings = bp->tx_nr_rings_per_tc + bp->rx_nr_rings; in bnxt_set_dflt_rings()
15829 bp->tx_nr_rings = bp->tx_nr_rings_per_tc; in bnxt_set_dflt_rings()
15831 avail_msix = bnxt_get_max_func_irqs(bp) - bp->cp_nr_rings; in bnxt_set_dflt_rings()
15833 int ulp_num_msix = min(avail_msix, bp->ulp_num_msix_want); in bnxt_set_dflt_rings()
15840 if (rc && rc != -ENODEV) in bnxt_set_dflt_rings()
15841 netdev_warn(bp->dev, "Unable to reserve tx rings\n"); in bnxt_set_dflt_rings()
15842 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_set_dflt_rings()
15846 /* Rings may have been trimmed, re-reserve the trimmed rings. */ in bnxt_set_dflt_rings()
15849 if (rc && rc != -ENODEV) in bnxt_set_dflt_rings()
15850 netdev_warn(bp->dev, "2nd rings reservation failed.\n"); in bnxt_set_dflt_rings()
15851 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_set_dflt_rings()
15854 bp->rx_nr_rings++; in bnxt_set_dflt_rings()
15855 bp->cp_nr_rings++; in bnxt_set_dflt_rings()
15858 bp->tx_nr_rings = 0; in bnxt_set_dflt_rings()
15859 bp->rx_nr_rings = 0; in bnxt_set_dflt_rings()
15868 if (bp->tx_nr_rings) in bnxt_init_dflt_ring_mode()
15875 if (BNXT_VF(bp) && rc == -ENODEV) in bnxt_init_dflt_ring_mode()
15876 netdev_err(bp->dev, "Cannot configure VF rings while PF is unavailable.\n"); in bnxt_init_dflt_ring_mode()
15878 netdev_err(bp->dev, "Not enough rings available.\n"); in bnxt_init_dflt_ring_mode()
15885 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_init_dflt_ring_mode()
15901 if (netif_running(bp->dev)) in bnxt_restore_pf_fw_resources()
15909 if (netif_running(bp->dev)) { in bnxt_restore_pf_fw_resources()
15911 dev_close(bp->dev); in bnxt_restore_pf_fw_resources()
15924 eth_hw_addr_set(bp->dev, bp->pf.mac_addr); in bnxt_init_mac_addr()
15927 struct bnxt_vf_info *vf = &bp->vf; in bnxt_init_mac_addr()
15930 if (is_valid_ether_addr(vf->mac_addr)) { in bnxt_init_mac_addr()
15932 eth_hw_addr_set(bp->dev, vf->mac_addr); in bnxt_init_mac_addr()
15938 eth_hw_addr_random(bp->dev); in bnxt_init_mac_addr()
15940 rc = bnxt_approve_mac(bp, bp->dev->dev_addr, strict_approval); in bnxt_init_mac_addr()
15948 struct pci_dev *pdev = bp->pdev; in bnxt_vpd_read_info()
15964 size = min_t(int, kw_len, BNXT_VPD_FLD_LEN - 1); in bnxt_vpd_read_info()
15965 memcpy(bp->board_partno, &vpd_data[pos], size); in bnxt_vpd_read_info()
15974 size = min_t(int, kw_len, BNXT_VPD_FLD_LEN - 1); in bnxt_vpd_read_info()
15975 memcpy(bp->board_serialno, &vpd_data[pos], size); in bnxt_vpd_read_info()
15982 struct pci_dev *pdev = bp->pdev; in bnxt_pcie_dsn_get()
15987 netdev_info(bp->dev, "Unable to read adapter's DSN\n"); in bnxt_pcie_dsn_get()
15988 return -EOPNOTSUPP; in bnxt_pcie_dsn_get()
15993 bp->flags |= BNXT_FLAG_DSN_VALID; in bnxt_pcie_dsn_get()
15999 if (!bp->db_size) in bnxt_map_db_bar()
16000 return -ENODEV; in bnxt_map_db_bar()
16001 bp->bar1 = pci_iomap(bp->pdev, 2, bp->db_size); in bnxt_map_db_bar()
16002 if (!bp->bar1) in bnxt_map_db_bar()
16003 return -ENOMEM; in bnxt_map_db_bar()
16009 netdev_info(bp->dev, "%s found at mem %lx, node addr %pM\n", in bnxt_print_device_info()
16010 board_info[bp->board_idx].name, in bnxt_print_device_info()
16011 (long)pci_resource_start(bp->pdev, 0), bp->dev->dev_addr); in bnxt_print_device_info()
16013 pcie_print_link_status(bp->pdev); in bnxt_print_device_info()
16024 return -ENODEV; in bnxt_init_one()
16026 if (!pdev->msix_cap) { in bnxt_init_one()
16027 dev_err(&pdev->dev, "MSIX capability not found, aborting\n"); in bnxt_init_one()
16028 return -ENODEV; in bnxt_init_one()
16043 return -ENOMEM; in bnxt_init_one()
16046 bp->board_idx = ent->driver_data; in bnxt_init_one()
16047 bp->msg_enable = BNXT_DEF_MSG_ENABLE; in bnxt_init_one()
16050 if (bnxt_vf_pciid(bp->board_idx)) in bnxt_init_one()
16051 bp->flags |= BNXT_FLAG_VF; in bnxt_init_one()
16055 SET_NETDEV_DEVLINK_PORT(dev, &bp->dl_port); in bnxt_init_one()
16061 dev->netdev_ops = &bnxt_netdev_ops; in bnxt_init_one()
16062 dev->stat_ops = &bnxt_stat_ops; in bnxt_init_one()
16063 dev->watchdog_timeo = BNXT_TX_TIMEOUT; in bnxt_init_one()
16064 dev->ethtool_ops = &bnxt_ethtool_ops; in bnxt_init_one()
16071 mutex_init(&bp->hwrm_cmd_lock); in bnxt_init_one()
16072 mutex_init(&bp->link_lock); in bnxt_init_one()
16082 bp->flags |= BNXT_FLAG_CHIP_P5_PLUS; in bnxt_init_one()
16084 bp->flags |= BNXT_FLAG_CHIP_P7; in bnxt_init_one()
16097 dev_err(&pdev->dev, "Cannot map doorbell BAR rc = %d, aborting\n", in bnxt_init_one()
16102 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_SG | in bnxt_init_one()
16109 if (bp->flags & BNXT_FLAG_UDP_GSO_CAP) in bnxt_init_one()
16110 dev->hw_features |= NETIF_F_GSO_UDP_L4; in bnxt_init_one()
16113 dev->hw_features |= NETIF_F_LRO; in bnxt_init_one()
16115 dev->hw_enc_features = in bnxt_init_one()
16121 if (bp->flags & BNXT_FLAG_UDP_GSO_CAP) in bnxt_init_one()
16122 dev->hw_enc_features |= NETIF_F_GSO_UDP_L4; in bnxt_init_one()
16123 if (bp->flags & BNXT_FLAG_CHIP_P7) in bnxt_init_one()
16124 dev->udp_tunnel_nic_info = &bnxt_udp_tunnels_p7; in bnxt_init_one()
16126 dev->udp_tunnel_nic_info = &bnxt_udp_tunnels; in bnxt_init_one()
16128 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM | in bnxt_init_one()
16130 dev->vlan_features = dev->hw_features | NETIF_F_HIGHDMA; in bnxt_init_one()
16131 if (bp->fw_cap & BNXT_FW_CAP_VLAN_RX_STRIP) in bnxt_init_one()
16132 dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX; in bnxt_init_one()
16133 if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT) in bnxt_init_one()
16134 dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_TX; in bnxt_init_one()
16136 dev->hw_features |= NETIF_F_GRO_HW; in bnxt_init_one()
16137 dev->features |= dev->hw_features | NETIF_F_HIGHDMA; in bnxt_init_one()
16138 if (dev->features & NETIF_F_GRO_HW) in bnxt_init_one()
16139 dev->features &= ~NETIF_F_LRO; in bnxt_init_one()
16140 dev->priv_flags |= IFF_UNICAST_FLT; in bnxt_init_one()
16143 if (bp->tso_max_segs) in bnxt_init_one()
16144 netif_set_tso_max_segs(dev, bp->tso_max_segs); in bnxt_init_one()
16146 dev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT | in bnxt_init_one()
16150 init_waitqueue_head(&bp->sriov_cfg_wait); in bnxt_init_one()
16153 bp->gro_func = bnxt_gro_func_5730x; in bnxt_init_one()
16155 bp->gro_func = bnxt_gro_func_5731x; in bnxt_init_one()
16157 bp->gro_func = bnxt_gro_func_5750x; in bnxt_init_one()
16160 bp->flags |= BNXT_FLAG_DOUBLE_DB; in bnxt_init_one()
16164 dev_err(&pdev->dev, "Unable to initialize mac address.\n"); in bnxt_init_one()
16165 rc = -EADDRNOTAVAIL; in bnxt_init_one()
16171 rc = bnxt_pcie_dsn_get(bp, bp->dsn); in bnxt_init_one()
16174 /* MTU range: 60 - FW defined max */ in bnxt_init_one()
16175 dev->min_mtu = ETH_ZLEN; in bnxt_init_one()
16176 dev->max_mtu = bp->max_mtu; in bnxt_init_one()
16182 hw_resc = &bp->hw_resc; in bnxt_init_one()
16183 bp->max_fltr = hw_resc->max_rx_em_flows + hw_resc->max_rx_wm_flows + in bnxt_init_one()
16186 if (bp->max_fltr < BNXT_MAX_FLTR) in bnxt_init_one()
16187 bp->max_fltr = BNXT_MAX_FLTR; in bnxt_init_one()
16195 if (BNXT_VF(bp) && rc == -ENODEV) { in bnxt_init_one()
16196 netdev_err(bp->dev, "Cannot configure VF rings while PF is unavailable.\n"); in bnxt_init_one()
16198 netdev_err(bp->dev, "Not enough rings available.\n"); in bnxt_init_one()
16199 rc = -ENOMEM; in bnxt_init_one()
16208 if (dev->hw_features & BNXT_HW_FEATURE_VLAN_ALL_RX) in bnxt_init_one()
16209 bp->flags |= BNXT_FLAG_STRIP_VLAN; in bnxt_init_one()
16216 * limited MSIX, so we re-initialize the TX rings per TC. in bnxt_init_one()
16218 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_init_one()
16225 dev_err(&pdev->dev, "Unable to create workqueue.\n"); in bnxt_init_one()
16226 rc = -ENOMEM; in bnxt_init_one()
16241 INIT_LIST_HEAD(&bp->usr_fltr_list); in bnxt_init_one()
16244 bp->rss_cap |= BNXT_RSS_CAP_MULTI_RSS_CTX; in bnxt_init_one()
16246 dev->queue_mgmt_ops = &bnxt_queue_mgmt_ops; in bnxt_init_one()
16274 kfree(bp->ptp_cfg); in bnxt_init_one()
16275 bp->ptp_cfg = NULL; in bnxt_init_one()
16276 kfree(bp->fw_health); in bnxt_init_one()
16277 bp->fw_health = NULL; in bnxt_init_one()
16281 kfree(bp->rss_indir_tbl); in bnxt_init_one()
16282 bp->rss_indir_tbl = NULL; in bnxt_init_one()
16310 pci_wake_from_d3(pdev, bp->wol); in bnxt_shutdown()
16334 pci_disable_device(bp->pdev); in bnxt_suspend()
16347 rc = pci_enable_device(bp->pdev); in bnxt_resume()
16349 netdev_err(dev, "Cannot re-enable PCI device during resume, err = %d\n", in bnxt_resume()
16353 pci_set_master(bp->pdev); in bnxt_resume()
16355 rc = -ENODEV; in bnxt_resume()
16360 rc = -EBUSY; in bnxt_resume()
16371 rc = -ENODEV; in bnxt_resume()
16374 if (bp->fw_crash_mem) in bnxt_resume()
16378 kfree(bp->ptp_cfg); in bnxt_resume()
16379 bp->ptp_cfg = NULL; in bnxt_resume()
16406 * bnxt_io_error_detected - called when PCI error is detected
16427 if (test_and_set_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_io_error_detected()
16428 netdev_err(bp->dev, "Firmware reset already in progress\n"); in bnxt_io_error_detected()
16442 set_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state); in bnxt_io_error_detected()
16459 * bnxt_io_slot_reset - called after the pci bus has been reset.
16462 * Restart the card from scratch, as if from a cold-boot.
16476 netdev_info(bp->dev, "PCI Slot Reset\n"); in bnxt_io_slot_reset()
16478 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_io_slot_reset()
16479 test_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state)) in bnxt_io_slot_reset()
16485 dev_err(&pdev->dev, in bnxt_io_slot_reset()
16486 "Cannot re-enable PCI device after reset.\n"); in bnxt_io_slot_reset()
16493 * As pci_restore_state() does not re-write the BARs if the in bnxt_io_slot_reset()
16498 &bp->state)) { in bnxt_io_slot_reset()
16501 pci_write_config_dword(bp->pdev, off, 0); in bnxt_io_slot_reset()
16520 dev_err(&pdev->dev, "Firmware not ready\n"); in bnxt_io_slot_reset()
16535 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_io_slot_reset()
16543 * bnxt_io_resume - called when traffic can start flowing again.
16555 netdev_info(bp->dev, "PCI Slot Resume\n"); in bnxt_io_resume()