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/linux/arch/arm/boot/dts/ti/omap/
H A Dam57-pruss.dtsi11 reg = <0x4b226000 0x4>,
12 <0x4b226004 0x4>;
23 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>;
27 ranges = <0x00000000 0x4b200000 0x80000>;
29 pruss1: pruss@0 {
31 reg = <0x0 0x80000>;
36 pruss1_mem: memories@0 {
37 reg = <0x0 0x2000>,
38 <0x2000 0x2000>,
39 <0x10000 0x8000>;
[all …]
H A Domap5-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x49000000 0x49000000 0x100000>;
12 segment@0 { /* 0x40100000 */
18 <0x00000000 0x00000000 0x000400>, /* ap 0 */
19 <0x00000400 0x00000400 0x000400>, /* ap 1 */
20 <0x00022000 0x00022000 0x001000>, /* ap 2 */
21 <0x00023000 0x00023000 0x001000>, /* ap 3 */
[all …]
H A Domap4-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x49000000 0x49000000 0x100000>;
12 segment@0 { /* 0x40100000 */
18 <0x00000000 0x00000000 0x000400>, /* ap 0 */
19 <0x00000400 0x00000400 0x000400>, /* ap 1 */
20 <0x00022000 0x00022000 0x001000>, /* ap 2 */
21 <0x00023000 0x00023000 0x001000>, /* ap 3 */
[all …]
H A Dam4372.dtsi20 memory@0 {
22 reg = <0 0>;
42 #size-cells = <0>;
43 cpu: cpu@0 {
47 reg = <0>;
77 opp-supported-hw = <0xFF 0x01>;
85 opp-supported-hw = <0xFF 0x04>;
92 opp-supported-hw = <0xFF 0x08>;
99 opp-supported-hw = <0xFF 0x10>;
106 opp-supported-hw = <0xFF 0x20>;
[all …]
H A Ddm814x.dtsi31 #size-cells = <0>;
32 cpu@0 {
35 reg = <0>;
65 reg = <0x47400000 0x1000>;
73 reg = <0x47401300 0x100>;
76 #phy-cells = <0>;
81 reg = <0x47401400 0x400
82 0x47401000 0x200>;
94 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
95 &cppi41dma 2 0 &cppi41dma 3 0
[all …]
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_regs.h12 #define GEN12_KCR_BASE 0x32000
13 #define MTL_KCR_BASE 0x386000
16 #define KCR_INIT(base) _MMIO((base) + 0xf0)
21 /* KCR hwdrm session in play status 0-31 */
22 #define KCR_SIP(base) _MMIO((base) + 0x260)
25 #define KCR_GLOBAL_TERMINATE(base) _MMIO((base) + 0xf8)
/linux/Documentation/devicetree/bindings/sound/
H A Damlogic,t9015.yaml20 const: 0
64 reg = <0x32000 0x14>;
65 #sound-dai-cells = <0>;
/linux/arch/arm/boot/dts/unisoc/
H A Drda8810pl.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0x0>;
30 reg = <0x100000 0x10000>;
40 ranges = <0x0 0x10000000 0xfffffff>;
44 reg = <0x1a08000 0x1000>;
55 ranges = <0x0 0x20800000 0x100000>;
57 intc: interrupt-controller@0 {
59 reg = <0x0 0x1000>;
69 ranges = <0x0 0x20900000 0x100000>;
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dti,pruss.yaml36 0x0, but also has access to a secondary Data RAM (primary to the other PRU
37 core) at its address 0x2000. A shared Data RAM, if present, can be accessed
60 pattern: "^(pruss|icssg)@[0-9a-f]+$"
65 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
161 const: 0
175 const: 0
209 const: 0
317 "^(pru|rtu|txpru)@[0-9a-f]+$":
370 pruss: pruss@0 {
372 reg = <0x0 0x80000>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-nsp.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
60 reg = <0x0>;
68 secondary-boot-reg = <0xffff0fec>;
69 reg = <0x1>;
82 ranges = <0x00000000 0x19000000 0x00023000>;
86 a9pll: arm_clk@0 {
87 #clock-cells = <0>;
90 reg = <0x00000 0x1000>;
95 reg = <0x20200 0x100>;
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dhal_bt_coexist.c86 u8 bt_rssi_state = 0; in rtl8723e_dm_bt_check_coex_rssi_state1()
213 long undecoratedsmoothed_pwdb = 0; in rtl8723e_dm_bt_check_coex_rssi_state()
214 u8 bt_rssi_state = 0; in rtl8723e_dm_bt_check_coex_rssi_state()
336 long undecoratedsmoothed_pwdb = 0; in rtl8723e_dm_bt_get_rx_ss()
356 u8 h2c_parameter[3] = {0}; in rtl8723e_dm_bt_balance()
361 h2c_parameter[0] = ms0; in rtl8723e_dm_bt_balance()
364 h2c_parameter[2] = 0; in rtl8723e_dm_bt_balance()
365 h2c_parameter[1] = 0; in rtl8723e_dm_bt_balance()
366 h2c_parameter[0] = 0; in rtl8723e_dm_bt_balance()
371 "[DM][BT], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", in rtl8723e_dm_bt_balance()
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
H A Dk3-am64-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x00 0x70000000 0x00 0x200000>;
25 ranges = <0x0 0x00 0x70000000 0x200000>;
28 reg = <0x1c0000 0x20000>;
32 reg = <0x1e0000 0x1c000>;
36 reg = <0x1fc000 0x4000>;
43 reg = <0x0 0x43000000 0x0 0x20000>;
46 ranges = <0x0 0x0 0x43000000 0x20000>;
51 reg = <0x00000014 0x4>;
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
[all …]
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/linux/drivers/clk/qcom/
H A Dgcc-ipq5424.c53 .offset = 0x20000,
56 .enable_reg = 0xb000,
57 .enable_mask = BIT(0),
81 .offset = 0x21000,
84 .enable_reg = 0xb000,
96 { 0x1, 2 },
101 .offset = 0x21000,
116 .offset = 0x22000,
119 .enable_reg = 0xb000,
142 { P_XO, 0 },
[all …]
H A Dgcc-ipq5332.c53 .offset = 0x20000,
56 .enable_reg = 0xb000,
57 .enable_mask = BIT(0),
80 .offset = 0x20000,
93 .offset = 0x21000,
96 .enable_reg = 0xb000,
108 .offset = 0x21000,
121 .offset = 0x22000,
124 .enable_reg = 0xb000,
136 .offset = 0x22000,
[all …]
H A Dgcc-sm8550.c56 .offset = 0x0,
59 .enable_reg = 0x52018,
60 .enable_mask = BIT(0),
73 { 0x1, 2 },
78 .offset = 0x0,
95 .offset = 0x4000,
98 .enable_reg = 0x52018,
112 .offset = 0x7000,
115 .enable_reg = 0x52018,
129 .offset = 0x9000,
[all …]
H A Dgcc-sm8650.c64 .offset = 0x0,
67 .enable_reg = 0x52020,
68 .enable_mask = BIT(0),
81 .offset = 0x0,
84 .enable_reg = 0x57020,
85 .enable_mask = BIT(0),
98 { 0x1, 2 },
103 .offset = 0x0,
120 .offset = 0x0,
137 .offset = 0x4000,
[all …]
H A Dgcc-ipq9574.c58 { P_XO, 0 },
70 .offset = 0x20000,
73 .enable_reg = 0x0b000,
74 .enable_mask = BIT(0),
98 .offset = 0x20000,
112 .offset = 0x22000,
115 .enable_reg = 0x0b000,
127 .offset = 0x22000,
141 .offset = 0x21000,
144 .enable_reg = 0x0b000,
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
53 clocks = <&kryocc 0>;
68 reg = <0x0 0x1>;
72 clocks = <&kryocc 0>;
82 reg = <0x0 0x100>;
101 reg = <0x0 0x101>;
[all …]

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