Lines Matching +full:0 +full:x32000
34 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
72 #define HDSP_resetPointer 0
73 #define HDSP_freqReg 0
88 #define HDSP_statusRegister 0
129 #define HDSP_TMS 0x01
130 #define HDSP_TCK 0x02
131 #define HDSP_TDI 0x04
132 #define HDSP_JTAG 0x08
133 #define HDSP_PWDN 0x10
134 #define HDSP_PROGRAM 0x020
135 #define HDSP_CONFIG_MODE_0 0x040
136 #define HDSP_CONFIG_MODE_1 0x080
137 #define HDSP_VERSION_BIT (0x100 | HDSP_S_LOAD)
138 #define HDSP_BIGENDIAN_MODE 0x200
139 #define HDSP_RD_MULTIPLE 0x400
140 #define HDSP_9652_ENABLE_MIXER 0x800
141 #define HDSP_S200 0x800
142 #define HDSP_S300 (0x100 | HDSP_S200) /* dummy, purpose of 0x100 unknown */
143 #define HDSP_CYCLIC_MODE 0x1000
144 #define HDSP_TDO 0x10000000
151 #define HDSP_Start (1<<0) /* start engine */
152 #define HDSP_Latency0 (1<<1) /* buffer size = 2^n where n is defined by Latency{2,1,0} */
155 #define HDSP_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
157 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
158 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
159 #define HDSP_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
160 #define HDSP_SPDIFProfessional (1<<9) /* 0=consumer, 1=professional */
161 #define HDSP_SPDIFEmphasis (1<<10) /* 0=none, 1=on */
162 #define HDSP_SPDIFNonAudio (1<<11) /* 0=off, 1=on */
163 #define HDSP_SPDIFOpticalOut (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
183 #define HDSP_RPM_Inp12 0x04A00
184 #define HDSP_RPM_Inp12_Phon_6dB 0x00800 /* Dolby */
185 #define HDSP_RPM_Inp12_Phon_0dB 0x00000 /* .. */
186 #define HDSP_RPM_Inp12_Phon_n6dB 0x04000 /* inp_0 */
187 #define HDSP_RPM_Inp12_Line_0dB 0x04200 /* Dolby+PRO */
188 #define HDSP_RPM_Inp12_Line_n6dB 0x00200 /* PRO */
190 #define HDSP_RPM_Inp34 0x32000
191 #define HDSP_RPM_Inp34_Phon_6dB 0x20000 /* SyncRef1 */
192 #define HDSP_RPM_Inp34_Phon_0dB 0x00000 /* .. */
193 #define HDSP_RPM_Inp34_Phon_n6dB 0x02000 /* SyncRef2 */
194 #define HDSP_RPM_Inp34_Line_0dB 0x30000 /* SyncRef1+SyncRef0 */
195 #define HDSP_RPM_Inp34_Line_n6dB 0x10000 /* SyncRef0 */
197 #define HDSP_RPM_Bypass 0x01000
199 #define HDSP_RPM_Disconnect 0x00001
204 #define HDSP_ADGainLowGain 0
209 #define HDSP_DAGainMinus10dBV 0
214 #define HDSP_PhoneGainMinus12dB 0
220 #define HDSP_SPDIFInputADAT1 0
226 #define HDSP_SyncRef_ADAT1 0
235 #define HDSP_CLOCK_SOURCE_AUTOSYNC 0
248 #define HDSP_SYNC_FROM_WORD 0
257 #define HDSP_SYNC_CHECK_NO_LOCK 0
263 #define HDSP_AUTOSYNC_FROM_WORD 0
273 #define HDSP_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
297 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
298 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
302 #define HDSP_audioIRQPending (1<<0)
309 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
323 #define HDSP_AEBI (1<<29) /* 0 = present, 1 = absent */
350 #define HDSP_version0 (1<<0)
374 #define HDSP_SelSyncRef_ADAT1 0
383 #define HDSP_InitializationComplete (1<<0)
393 #define MINUS_INFINITY_GAIN 0
506 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
512 0, 1, 2, 3, 4, 5, 6, 7,
531 0, 1, 2, 3, 4, 5, 6, 7,
584 { 0, },
607 if (hdsp->firmware_rev == 0xa)
625 if (hdsp->firmware_rev == 0xa)
650 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
651 for (i = 0; i < 500; i++) {
652 if (0 == (hdsp_read(hdsp, HDSP_statusRegister) &
659 return 0;
674 return 0;
676 for (i = 0; i != loops; ++i) {
682 return 0;
707 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
712 hdsp_write (hdsp, HDSP_fifoData, 0);
714 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
723 for (i = 0; i < HDSP_FIRMWARE_SIZE / 4; ++i) {
740 hdsp->control2_register = 0;
756 return 0;
761 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
764 hdsp_write(hdsp, HDSP_fifoData, 0);
766 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) < 0) {
772 hdsp_write (hdsp, HDSP_fifoData, 0);
773 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) < 0)
777 hdsp_write(hdsp, HDSP_fifoData, 0);
778 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) == 0) {
781 return 0;
786 hdsp_write(hdsp, HDSP_fifoData, 0);
787 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) == 0)
792 hdsp_write(hdsp, HDSP_fifoData, 0);
793 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) < 0)
798 return 0;
808 return 0;
813 return 0;
822 return 0;
823 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
831 return 0;
836 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
842 return 0;
854 for (i = 0; i < timeout; i++) {
856 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
857 return 0;
875 return 0;
895 value 0 you have to read value 1
902 return 0;
905 return 0;
913 varies from 0 to 1351, but to access the
915 to access 0 to 2703 ...
920 (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
921 hdsp->mixer_matrix[addr&0x7fe]);
923 return 0;
937 return 0;
947 (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
948 ret = 0;
963 return 0;
985 "unknown spdif frequency status; bits = 0x%x, status = 0x%x\n",
987 return 0;
1011 return 0;
1027 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
1037 hdsp_write (hdsp, HDSP_resetPointer, 0);
1059 memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1069 n = 0;
1084 return 0;
1108 int reject_if_open = 0;
1207 if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1251 return 0;
1260 /* the hardware already does the relevant bit-mask with 0xff */
1269 /* the hardware already does the relevant bit-mask with 0xff */
1279 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1281 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1289 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1291 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1296 return 0;
1321 if (n_pending > 0) {
1326 if (to_write > 0) {
1327 for (i = 0; i < to_write; ++i)
1334 return 0;
1346 if (n_pending > 0) {
1350 for (i = 0; i < n_pending; ++i)
1360 hmidi->pending = 0;
1424 0);
1429 if (hmidi->istimer && --hmidi->istimer <= 0)
1447 return 0;
1459 return 0;
1466 snd_hdsp_midi_input_trigger (substream, 0);
1473 return 0;
1480 snd_hdsp_midi_output_trigger (substream, 0);
1487 return 0;
1513 hdsp->midi[id].istimer = 0;
1514 hdsp->midi[id].pending = 0;
1518 if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1531 return 0;
1540 u32 val = 0;
1541 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1542 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1544 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1546 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1552 aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1553 ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1555 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1557 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1564 return 0;
1572 return 0;
1593 return 0;
1601 return 0;
1624 return 0;
1629 ucontrol->value.iec958.status[0] = kcontrol->private_value;
1630 return 0;
1651 return 0;
1669 ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1670 return 0;
1681 val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1701 return (hdsp->control_register & regmask) ? 1 : 0;
1712 return 0;
1724 ucontrol->value.integer.value[0] = hdsp_toggle_setting(hdsp, regmask);
1726 return 0;
1739 val = ucontrol->value.integer.value[0] & 1;
1775 ucontrol->value.enumerated.item[0] = 0;
1778 ucontrol->value.enumerated.item[0] = 1;
1781 ucontrol->value.enumerated.item[0] = 2;
1784 ucontrol->value.enumerated.item[0] = 3;
1787 ucontrol->value.enumerated.item[0] = 4;
1790 ucontrol->value.enumerated.item[0] = 5;
1793 ucontrol->value.enumerated.item[0] = 7;
1796 ucontrol->value.enumerated.item[0] = 8;
1799 ucontrol->value.enumerated.item[0] = 9;
1802 ucontrol->value.enumerated.item[0] = 6;
1804 return 0;
1820 return 0;
1827 ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1828 return 0;
1858 ucontrol->value.enumerated.item[0] = 0;
1861 ucontrol->value.enumerated.item[0] = 1;
1864 ucontrol->value.enumerated.item[0] = 2;
1867 ucontrol->value.enumerated.item[0] = 3;
1870 ucontrol->value.enumerated.item[0] = 4;
1873 ucontrol->value.enumerated.item[0] = 5;
1876 ucontrol->value.enumerated.item[0] = 7;
1879 ucontrol->value.enumerated.item[0] = 8;
1882 ucontrol->value.enumerated.item[0] = 9;
1885 ucontrol->value.enumerated.item[0] = 6;
1887 return 0;
1902 return 0;
1904 return 0;
1919 ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
1920 return 0;
1958 return 0;
1967 if (hdsp_external_sample_rate(hdsp) != 0) {
1971 return 0;
2008 return 0;
2029 ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2030 return 0;
2041 val = ucontrol->value.enumerated.item[0];
2042 if (val < 0) val = 0;
2052 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2054 change = 0;
2065 ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2066 return 0;
2074 change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2076 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2093 return 0;
2107 case 0:
2121 return 0;
2135 ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2136 return 0;
2147 val = ucontrol->value.enumerated.item[0];
2148 if (val < 0) val = 0;
2152 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2154 change = 0;
2172 return 0;
2186 case 0:
2200 return 0;
2214 ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2215 return 0;
2226 val = ucontrol->value.enumerated.item[0];
2227 if (val < 0) val = 0;
2231 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2233 change = 0;
2251 return 0;
2257 return 0;
2265 case 0:
2279 return 0;
2284 static const char * const texts[] = {"0 dB", "-6 dB", "-12 dB"};
2293 ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2294 return 0;
2305 val = ucontrol->value.enumerated.item[0];
2306 if (val < 0) val = 0;
2310 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2312 change = 0;
2348 return 0;
2377 return 0;
2410 ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2411 return 0;
2438 val = ucontrol->value.enumerated.item[0] % max;
2478 return 0;
2494 ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2495 return 0;
2512 hdsp->precise_ptr = 0;
2513 return 0;
2523 ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2525 return 0;
2536 val = ucontrol->value.integer.value[0] & 1;
2558 hdsp->use_midi_work = 0;
2559 return 0;
2569 ucontrol->value.integer.value[0] = hdsp->use_midi_work;
2571 return 0;
2582 val = ucontrol->value.integer.value[0] & 1;
2594 .device = 0, \
2606 uinfo->value.integer.min = 0;
2609 return 0;
2619 source = ucontrol->value.integer.value[0];
2630 return 0;
2645 source = ucontrol->value.integer.value[0];
2688 return 0;
2689 return 0;
2696 ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2697 return 0;
2713 return 0;
2720 return 0;
2727 ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
2728 return 0;
2749 return 0;
2756 ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
2757 return 0;
2777 return 0;
2786 if (snd_BUG_ON(offset < 0))
2804 ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
2805 return 0;
2824 return 0;
2843 return 0;
2852 return 0;
2859 ucontrol->value.integer.value[0] = hdsp_dds_offset(hdsp);
2860 return 0;
2871 val = ucontrol->value.integer.value[0];
2874 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
2876 change = 0;
2882 HDSP_DA_GAIN("DA Gain", 0),
2883 HDSP_AD_GAIN("AD Gain", 0),
2884 HDSP_PHONE_GAIN("Phones Gain", 0),
2886 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
2925 HDSP_MIXER("Mixer", 0),
2926 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
2932 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
2940 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
2941 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
2942 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
2943 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
2944 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
2946 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
2947 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
2948 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
2949 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
2951 HDSP_PRECISE_POINTER("Precise Pointer", 0),
2952 HDSP_USE_MIDI_WORK("Use Midi Tasklet", 0),
2960 return 0;
2976 ucontrol->value.enumerated.item[0] = hdsp_rpm_input12(hdsp);
2977 return 0;
2985 case 0:
3004 return 0;
3016 val = ucontrol->value.enumerated.item[0];
3017 if (val < 0)
3018 val = 0;
3023 change = (hdsp_set_rpm_input12(hdsp, val) == 0) ? 1 : 0;
3025 change = 0;
3034 "Phono +6dB", "Phono 0dB", "Phono -6dB", "Line 0dB", "Line -6dB"
3045 return 0;
3061 ucontrol->value.enumerated.item[0] = hdsp_rpm_input34(hdsp);
3062 return 0;
3070 case 0:
3089 return 0;
3101 val = ucontrol->value.enumerated.item[0];
3102 if (val < 0)
3103 val = 0;
3108 change = (hdsp_set_rpm_input34(hdsp, val) == 0) ? 1 : 0;
3110 change = 0;
3119 return (hdsp->control_register & HDSP_RPM_Bypass) ? 1 : 0;
3127 ucontrol->value.integer.value[0] = hdsp_rpm_bypass(hdsp);
3128 return 0;
3139 return 0;
3151 val = ucontrol->value.integer.value[0] & 1;
3171 return (hdsp->control_register & HDSP_RPM_Disconnect) ? 1 : 0;
3179 ucontrol->value.integer.value[0] = hdsp_rpm_disconnect(hdsp);
3180 return 0;
3191 return 0;
3203 val = ucontrol->value.integer.value[0] & 1;
3247 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3248 HDSP_MIXER("Mixer", 0)
3265 return 0;
3283 ucontrol->value.integer.value[0] = hdsp_loopback_get(hdsp, channel);
3285 return 0;
3293 const bool enable = ucontrol->value.integer.value[0] & 1;
3318 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_rpm_controls); idx++) {
3320 if (err < 0)
3323 return 0;
3326 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3329 if (err < 0)
3340 if (err < 0)
3347 if (err < 0)
3354 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3357 if (err < 0)
3369 if (err < 0)
3377 if (err < 0)
3381 return 0;
3407 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3409 snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3410 snd_iprintf(buffer, "Control2 register: 0x%x\n",
3412 snd_iprintf(buffer, "Status register: 0x%x\n", status);
3413 snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3421 if (hdsp_check_for_firmware(hdsp, 0)) {
3423 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3433 if (err < 0) {
3442 snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3443 snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3444 snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3445 snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3446 snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3600 snd_iprintf(buffer, "Input 1/2: Phono, 0dB\n");
3606 snd_iprintf(buffer, "Input 1/2: Line, 0dB\n");
3620 snd_iprintf(buffer, "Input 3/4: Phono, 0dB\n");
3626 snd_iprintf(buffer, "Input 3/4: Line, 0dB\n");
3656 if (x != 0)
3714 case 0:
3727 case 0:
3740 case 0:
3741 tmp = "0 dB";
3787 hdsp->capture_dma_buf.addr = ALIGN(capture_dma->addr, 0x10000ul);
3788 hdsp->playback_dma_buf.addr = ALIGN(playback_dma->addr, 0x10000ul);
3799 return 0;
3831 hdsp->control2_register = 0;
3843 for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3846 for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3862 return 0;
3869 if (hdsp->midi[0].pending)
3870 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3884 int schedule = 0;
3895 hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3897 midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3898 midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3916 hdsp->midi[0].pending = 1;
3919 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3951 if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
3955 if (mapped_channel < 0)
3979 return 0;
3997 return 0;
4010 memset(channel_buf + pos, 0, count);
4011 return 0;
4026 runtime->status->hw_ptr = 0;
4037 return 0;
4066 if ((other_pid > 0) && (this_pid != other_pid)) {
4088 return 0;
4099 err = hdsp_set_rate(hdsp, params_rate(params), 0);
4100 if (err < 0) {
4109 if (err < 0) {
4114 return 0;
4127 if (hdsp->channel_map[channel] < 0)
4131 info->first = 0;
4133 return 0;
4160 if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
4216 return 0;
4222 int result = 0;
4264 .fifo_size = 0
4293 .fifo_size = 0
4301 .mask = 0
4311 list[0] = hdsp->qs_in_channels;
4314 return snd_interval_list(c, 3, list, 0);
4317 list[0] = hdsp->ds_in_channels;
4319 return snd_interval_list(c, 2, list, 0);
4330 list[0] = hdsp->qs_out_channels;
4333 return snd_interval_list(c, 3, list, 0);
4335 list[0] = hdsp->ds_out_channels;
4338 return snd_interval_list(c, 2, list, 0);
4369 return 0;
4400 return 0;
4431 return 0;
4462 return 0;
4488 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4489 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4503 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4506 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4509 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4515 hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4519 return 0;
4534 hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4538 return 0;
4565 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4566 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4575 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4578 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4581 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4584 return 0;
4597 return 0;
4621 rms_low = readl(src_low) & 0xffffff00;
4622 rms_high = readl(src_high) & 0xffffff00;
4629 int doublespeed = 0;
4635 for (i = 0, j = 0; i < 26; ++i) {
4661 return 0;
4668 int doublespeed = 0;
4673 for (i = 0, j = 0; i < 16; ++i, ++j) {
4691 return 0;
4698 for (i = 0; i < 26; i++) {
4706 for (i = 0; i < 28; i++) {
4711 for (i = 0; i < 26; ++i) {
4721 return 0;
4735 if (err < 0)
4739 if (err < 0)
4763 if (err < 0)
4767 if (err < 0)
4770 memset(&info, 0, sizeof(info));
4777 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632) ? 3 : 1); ++i)
4834 if (err < 0)
4837 memset(&hdsp_version, 0, sizeof(hdsp_version));
4881 if (err < 0)
4886 if (err < 0)
4893 if (err < 0) {
4910 return 0;
4941 err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw);
4942 if (err < 0)
4952 return 0;
4960 err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm);
4961 if (err < 0)
4973 return 0;
4986 if (hdsp_fifo_wait (hdsp, 0, 100)) {
4992 for (i = 0; i < hdsp->max_channels; ++i) {
4997 return 0;
5020 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
5021 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
5032 hdsp->io_loopback = 0xffffffff;
5033 for (i = 0; i < hdsp->max_channels; ++i)
5059 snd_hdsp_flush_midi_input (hdsp, 0);
5068 if (err < 0) {
5075 err = snd_hdsp_create_midi(card, hdsp, 0);
5076 if (err < 0) {
5084 if (err < 0) {
5092 if (err < 0) {
5107 if (err < 0) {
5115 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5119 if (err < 0) {
5127 return 0;
5138 return 0;
5141 if (err < 0)
5144 return 0;
5153 if (hdsp->firmware_rev == 0xa)
5159 if (hdsp->firmware_rev == 0xa)
5188 if (err < 0)
5193 if (err < 0)
5197 if (err < 0) {
5205 if (err < 0) {
5211 return 0;
5219 int is_9652 = 0;
5220 int is_9632 = 0;
5223 hdsp->state = 0;
5224 hdsp->midi[0].rmidi = NULL;
5226 hdsp->midi[0].input = NULL;
5228 hdsp->midi[0].output = NULL;
5230 hdsp->midi[0].pending = 0;
5231 hdsp->midi[1].pending = 0;
5232 spin_lock_init(&hdsp->midi[0].lock);
5235 hdsp->control_register = 0;
5236 hdsp->control2_register = 0;
5247 hdsp->firmware_rev &= 0xff;
5252 than 0 by the computer's BIOS or the driver.
5256 pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5261 if (hdsp->firmware_rev < 0xa)
5263 else if (hdsp->firmware_rev < 0x64)
5265 else if (hdsp->firmware_rev < 0x96) {
5275 if (err < 0)
5281 if (err < 0)
5283 hdsp->port = pci_resource_start(pci, 0);
5286 dev_err(hdsp->card->dev, "unable to remap region 0x%lx-0x%lx\n",
5299 hdsp->precise_ptr = 0;
5301 hdsp->dds_value = 0;
5304 if (err < 0)
5312 if (err < 0)
5315 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5317 if (err < 0)
5326 return 0;
5331 if (err < 0)
5333 return 0;
5357 if (err < 0)
5366 if (err < 0)
5369 return 0;
5404 if (err < 0)
5416 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5423 return 0;