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/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2-xmc.dts47 bootargs = "earlycon=uart8250,mmio32,0x66130000";
52 reg = <0x00000000 0x80000000 0x00000001 0x00000000>;
71 reg = <0x10>;
77 nandcs@0 {
79 reg = <0>;
88 partition@0 {
90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,qdu1000-ecpricc.yaml14 Qualcomm ECPRI Specification V2.0 Common Public Radio Interface clock control
58 reg = <0x00280000 0x31c00>;
/linux/arch/arm/boot/dts/ti/omap/
H A Domap2420-n8x0-common.dtsi7 reg = <0x80000000 0x8000000>; /* 128 MB */
19 &gpio3 0 GPIO_ACTIVE_HIGH /* gpio64 sel */
22 #size-cells = <0>;
27 reg = <0x1>;
38 reg = <0x72>;
48 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
52 onenand@0,0 {
56 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
64 gpmc,cs-on-ns = <0>;
67 gpmc,adv-on-ns = <0>;
[all …]
H A Dam335x-igep0033.dtsi15 cpu@0 {
22 reg = <0x80000000 0x10000000>; /* 256 MB */
27 pinctrl-0 = <&leds_pins>;
102 ethphy0: ethernet-phy@0 {
103 reg = <0>;
130 pinctrl-0 = <&nandflash_pins>;
132 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
134 nand@0,0 {
136 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
138 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
[all …]
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
H A Dam437x-gp-evm.dts57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_init_ops.c26 0,
27 0,
28 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
29 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
30 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
31 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
32 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
33 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
34 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
35 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
[all …]
/linux/drivers/video/fbdev/mb862xx/
H A Dmb862xx_reg.h9 #define MB862XX_MMIO_BASE 0x01fc0000
10 #define MB862XX_MMIO_HIGH_BASE 0x03fc0000
11 #define MB862XX_I2C_BASE 0x0000c000
12 #define MB862XX_DISP_BASE 0x00010000
13 #define MB862XX_CAP_BASE 0x00018000
14 #define MB862XX_DRAW_BASE 0x00030000
15 #define MB862XX_GEO_BASE 0x00038000
16 #define MB862XX_PIO_BASE 0x00038000
17 #define MB862XX_MMIO_SIZE 0x40000
20 #define GC_IST 0x00000020
[all …]
/linux/arch/powerpc/boot/dts/
H A Dmpc5121ads.dts21 nand@0 {
23 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
28 ranges = <0x0 0x0 0xfc000000 0x04000000
29 0x2 0x0 0x82000000 0x00008000>;
31 flash@0,0 {
33 reg = <0 0x0 0x4000000>;
39 protected@0 {
41 reg = <0x00000000 0x00040000>; // first sector is protected
46 reg = <0x00040000 0x03c00000>; // 60M for filesystem
50 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
[all …]
/linux/drivers/net/ethernet/ibm/emac/
H A Demac.h103 #define EMAC_MR0_RXI 0x80000000
104 #define EMAC_MR0_TXI 0x40000000
105 #define EMAC_MR0_SRST 0x20000000
106 #define EMAC_MR0_TXE 0x10000000
107 #define EMAC_MR0_RXE 0x08000000
108 #define EMAC_MR0_WKE 0x04000000
111 #define EMAC_MR1_FDE 0x80000000
112 #define EMAC_MR1_ILE 0x40000000
113 #define EMAC_MR1_VLE 0x20000000
114 #define EMAC_MR1_EIFC 0x10000000
[all …]
/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-evm.dts29 pinctrl-0 = <&ecap2_pins>;
37 pwms = <&ecap2 0 50000 0>;
38 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
45 pinctrl-0 = <&lcd_pins>;
56 ac-bias-intrpt = <0>;
59 fdd = <0x80>;
60 sync-edge = <0>;
62 raster-order = <0>;
63 fifo-th = <0>;
78 hsync-active = <0>;
[all …]
/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h19 #define AR71XX_APB_BASE 0x18000000
20 #define AR71XX_GE0_BASE 0x19000000
21 #define AR71XX_GE0_SIZE 0x10000
22 #define AR71XX_GE1_BASE 0x1a000000
23 #define AR71XX_GE1_SIZE 0x10000
24 #define AR71XX_EHCI_BASE 0x1b000000
25 #define AR71XX_EHCI_SIZE 0x1000
26 #define AR71XX_OHCI_BASE 0x1c000000
27 #define AR71XX_OHCI_SIZE 0x1000
28 #define AR71XX_SPI_BASE 0x1f000000
[all …]
/linux/include/video/
H A Dnewport.h34 #define DM1_PLANES 0x00000007
35 #define DM1_NOPLANES 0x00000000
36 #define DM1_RGBPLANES 0x00000001
37 #define DM1_RGBAPLANES 0x00000002
38 #define DM1_OLAYPLANES 0x00000004
39 #define DM1_PUPPLANES 0x00000005
40 #define DM1_CIDPLANES 0x00000006
42 #define NPORT_DMODE1_DDMASK 0x00000018
43 #define NPORT_DMODE1_DD4 0x00000000
44 #define NPORT_DMODE1_DD8 0x00000008
[all …]
/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_misc.c12 HNS_OP_RESET_FUNC = 0x1,
13 HNS_OP_SERDES_LP_FUNC = 0x2,
14 HNS_OP_LED_SET_FUNC = 0x3,
15 HNS_OP_GET_PORT_TYPE_FUNC = 0x4,
16 HNS_OP_GET_SFP_STAT_FUNC = 0x5,
17 HNS_OP_LOCATE_LED_SET_FUNC = 0x6,
21 HNS_DSAF_RESET_FUNC = 0x1,
22 HNS_PPE_RESET_FUNC = 0x2,
23 HNS_XGE_RESET_FUNC = 0x4,
24 HNS_GE_RESET_FUNC = 0x5,
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-synology.dtsi201 flash@0 {
205 reg = <0>;
207 mode = <0>;
209 partition@0 {
210 reg = <0x00000000 0x00080000>;
215 reg = <0x00080000 0x00200000>;
220 reg = <0x00280000 0x00140000>;
225 reg = <0x003c0000 0x00010000>;
230 reg = <0x003d0000 0x00020000>;
235 reg = <0x003f0000 0x00010000>;
[all …]
/linux/arch/powerpc/include/asm/
H A Dcpm2.h20 #define CPM_CR_RST ((uint)0x80000000)
21 #define CPM_CR_PAGE ((uint)0x7c000000)
22 #define CPM_CR_SBLOCK ((uint)0x03e00000)
23 #define CPM_CR_FLG ((uint)0x00010000)
24 #define CPM_CR_MCN ((uint)0x00003fc0)
25 #define CPM_CR_OPCODE ((uint)0x0000000f)
29 #define CPM_CR_SCC1_SBLOCK (0x04)
30 #define CPM_CR_SCC2_SBLOCK (0x05)
31 #define CPM_CR_SCC3_SBLOCK (0x06)
32 #define CPM_CR_SCC4_SBLOCK (0x07)
[all …]
H A Dreg.h49 #define MSR_FE0_LG 11 /* Floating Exception mode 0 */
54 #define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */
61 #define MSR_LE_LG 0 /* Little Endian */
75 #define MSR_SF 0
76 #define MSR_HV 0
77 #define MSR_S 0
85 #define MSR_SPE 0
99 #define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */
104 #define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */
116 #define MSR_TS_N 0 /* Non-transactional */
[all …]
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_rc6.c24 * low-voltage mode when idle, using down to 0V while at this stage. This
78 intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA); in gen11_rc6_enable()
80 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen11_rc6_enable()
137 for (i = 0; i < I915_MAX_VCS; i++) in gen11_rc6_enable()
171 intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA); in gen9_rc6_enable()
173 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen9_rc6_enable()
228 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen8_rc6_enable()
256 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0); in gen6_rc6_enable()
273 rc6vids = 0; in gen6_rc6_enable()
278 (GEN6_DECODE_RC6_VID(rc6vids & 0xff) < 450)) { in gen6_rc6_enable()
[all …]
/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux/drivers/net/wireless/ath/ath5k/
H A Drfbuffer.h108 AR5K_RF_TURBO = 0,
165 #define AR5K_RF5111_RF_TURBO { 1, 3, 0 }
168 #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
169 #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
171 #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
172 #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
174 #define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
175 #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
181 #define AR5K_RF5111_GAIN_I { 6, 29, 0 }
182 #define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
[all …]
/linux/drivers/crypto/
H A Dhifn_795x.c34 #define ACRYPTO_OP_DECRYPT 0
39 #define ACRYPTO_MODE_ECB 0
44 #define ACRYPTO_TYPE_AES_128 0
50 #define PCI_VENDOR_ID_HIFN 0x13A3
51 #define PCI_DEVICE_ID_HIFN_7955 0x0020
52 #define PCI_DEVICE_ID_HIFN_7956 0x001d
56 #define HIFN_BAR0_SIZE 0x1000
57 #define HIFN_BAR1_SIZE 0x2000
58 #define HIFN_BAR2_SIZE 0x8000
62 #define HIFN_DMA_CRA 0x0C /* DMA Command Ring Address */
[all …]
/linux/drivers/video/fbdev/savage/
H A Dsavagefb_driver.c15 * 0.4.0 (neo)
27 * 0.3.0 (dok)
32 * 0.2.0 (dok)
63 #define SAVAGEFB_VERSION "0.4.0_2.6"
84 VGAwSEQ(0x00, 0x01, par); /* Synchronous Reset */ in vgaHWSeqReset()
86 VGAwSEQ(0x00, 0x03, par); /* End Reset */ in vgaHWSeqReset()
97 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
100 VGAwSEQ(0x01, tmp | 0x20, par);/* disable the display */ in vgaHWProtect()
108 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
110 VGAwSEQ(0x01, tmp & ~0x20, par);/* reenable display */ in vgaHWProtect()
[all …]

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