| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_udma_regs_gen.h | 9 found at http://www.gnu.org/licenses/gpl-2.0.html 100 /* [0x0] Target-ID control */ 102 /* [0x4] TX queue 0/1 Target-ID */ 104 /* [0x8] TX queue 2/3 Target-ID */ 106 /* [0xc] RX queue 0/1 Target-ID */ 108 /* [0x10] RX queue 2/3 Target-ID */ 112 /* [0x0] TX queue 0/1 Target-Address */ 114 /* [0x4] TX queue 2/3 Target-Address */ 116 /* [0x8] RX queue 0/1 Target-Address */ 118 /* [0xc] RX queue 2/3 Target-Address */ [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | renesas,rzv2h-gbeth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/renesas,rzv2h-gbeth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 17 - renesas,r9a09g047-gbeth 18 - renesas,r9a09g056-gbeth 19 - renesas,r9a09g057-gbeth 20 - renesas,rzv2h-gbeth 22 - compatible [all …]
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| H A D | renesas,r9a09g057-gbeth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/renesas,r9a09g057-gbeth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 17 - renesas,r9a09g056-gbeth 18 - renesas,r9a09g057-gbeth 19 - renesas,rzv2h-gbeth 21 - compatible 26 - enum: [all …]
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| H A D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet 13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates 16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP 17 sub-modules exist as a loadable kernel module which plug in to the netcp core. 18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is 19 mandatory to have the ethernet switch sub-module for the ethernet interface to 20 be operational. Any other sub-module like the PA is optional. 24 ----------------------------- 26 ----------------------------- 28 |-> NetCP Devices -> | [all …]
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| H A D | intel,ixp4xx-ethernet.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-controller.yaml# 14 - Linus Walleij <linus.walleij@linaro.org> 18 Processing Engine) and the IXP4xx Queue Manager to process 24 const: intel,ixp4xx-ethernet 30 queue-rx: 31 $ref: /schemas/types.yaml#/definitions/phandle-array [all …]
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| H A D | intel,ixp4xx-hss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Linus Walleij <linus.walleij@linaro.org> 15 Processing Engine) and the IXP4xx Queue Manager to process 20 const: intel,ixp4xx-hss 26 intel,npe-handle: 27 $ref: /schemas/types.yaml#/definitions/phandle-array 30 - description: phandle to the NPE this HSS instance is using [all …]
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| H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a 26 - snps,dwmac-3.610 [all …]
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| /freebsd/share/man/man4/ |
| H A D | ena.4 | 1 .\" SPDX-License-Identifier: BSD-2-Clause 3 .\" Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates. 13 .\" 2. Redistributions in binary form must reproduce the above copyright 40 .Bd -ragged -offset indent 47 .Bd -literal -offset indent 56 through an Admin Queue. 58 The driver supports a range of ENA devices, is link-speed independent 62 Some ENA devices support SR-IOV. 63 This driver is used for both the SR-IOV Physical Function (PF) and Virtual 67 processing by providing multiple Tx/Rx queue pairs (the maximum number [all …]
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| H A D | gve.4 | 1 .\" SPDX-License-Identifier: BSD-3-Clause 3 .\" Copyright (c) 2023-2024 Google LLC 11 .\" 2. Redistributions in binary form must reproduce the above copyright notice, 39 .Bd -ragged -offset indent 46 .Bd -literal -offset indent 51 It is required to support per-VM Tier-1 networking performance, and for using certain VM shapes on … 57 .Bl -bullet -compact 78 .Bl -bullet -compact 84 Change the TX queue count to 4 for the gve0 interface: 87 Change the RX queue count to 4 for the gve0 interface: [all …]
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| /freebsd/sys/dev/bxe/ |
| H A D | ecore_mfw_req.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved. 12 * 2. Redistributions in binary form must reproduce the above copyright 37 #define PORT_MAX 2 38 #define NVM_PATH_MAX 2 80 #define DRV_INFO_CUR_VER 2 97 uint8_t mac_add2[8]; /* Additional Programmed MAC Addr 2. */ 103 #define FEATURE_ETH_BOOTMODE_SHIFT 2 104 #define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2) [all …]
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| /freebsd/sys/dev/vge/ |
| H A D | if_vgereg.h | 1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 12 * 2. Redistributions in binary form must reproduce the above copyright 18 * 4. Neither the name of the author nor the names of any co-contributors 37 * Definitions for the built-in copper PHY can be found in vgphy.h. 41 * using 32-bit I/O cycles, but some of them are less than 32 bits 54 #define VGE_RXCTL 0x06 /* RX control register */ 58 #define VGE_CRS2 0x0A /* Global cmd register 2 (w to set) */ 62 #define VGE_CRC2 0x0E /* Global cmd register 2 (w to clr) */ 82 #define VGE_RXHOSTERR 0x23 /* RX host error status */ [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
| H A D | keystone-k2e-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for Keystone 2 Edison Netcp driver 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 qmss: qmss@2a40000 { 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x2000>; 20 #address-cells = <1>; [all …]
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| H A D | keystone-k2l-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for Keystone 2 Lamarr Netcp driver 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 qmss: qmss@2a40000 { 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x2000>; 20 #address-cells = <1>; [all …]
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| H A D | keystone-k2hk-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for Keystone 2 Hawking Netcp driver 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 qmss: qmss@2a40000 { 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x4000>; 20 #address-cells = <1>; [all …]
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| /freebsd/sys/contrib/alpine-hal/eth/ |
| H A D | al_hal_eth.h | 1 /*- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 61 /* *INDENT-OFF* */ 65 /* *INDENT-ON* */ 83 #define AL_ETH_REV_ID_2 2 /* Alpine V2 basic */ 89 #define AL_ETH_MAC_BAR 2 97 #define AL_ETH_TSO_MSS_MAX_VAL (AL_ETH_MAX_FRAME_LEN - 200) 174 /** Tx to Rx switching decision type */ 178 AL_ETH_TX_SWITCH_TYPE_VLAN_TABLE_AND_MAC = 2, 182 /** Tx to Rx VLAN ID selection type */ [all …]
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| /freebsd/sys/dev/e1000/ |
| H A D | e1000_defines.h | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 13 2. Redistributions in binary form must reproduce the above copyright 94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */ 122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */ 132 #define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */ 172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */ 173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */ 198 #define E1000_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min thresh size */ 205 #define E1000_RCTL_SZ_2048 0x00000000 /* Rx buffer size 2048 */ [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/crypto/ |
| H A D | intel,ixp4xx-crypto.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Linus Walleij <linus.walleij@linaro.org> 21 const: intel,ixp4xx-crypto 23 intel,npe-handle: 24 $ref: /schemas/types.yaml#/definitions/phandle-array 26 - items: 27 - description: phandle to the NPE this crypto engine [all …]
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| /freebsd/sys/arm/ti/cpsw/ |
| H A D | if_cpsw.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 13 * 2. Redistributions in binary form must reproduce the above copyright 39 * a 3-port store-and-forward switch connected to two independent 40 * "sliver" controllers (port 1 and port 2). You can operate the 250 { SYS_RES_IRQ, 2, RF_ACTIVE | RF_SHAREABLE }, 252 { -1, 0 } 331 if ((_sc)->debug) { \ 341 mtx_assert(&(sc)->rx.lock, MA_NOTOWNED); \ 342 mtx_lock(&(sc)->tx.lock); \ [all …]
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| /freebsd/sys/dev/neta/ |
| H A D | if_mvnetareg.h | 12 * 2. Redistributions in binary form must reproduce the above copyright 46 /* XXX: Currently multi-queue can be used on the Tx side only */ 48 #define MVNETA_TX_QNUM_MAX 2 53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0 54 #error "MVNETA_TX_QNUM_MAX Should be a power of 2" 56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0 57 #error "MVNETA_RX_QNUM_MAX Should be a power of 2" 62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1) 63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1) 75 #define MVNETA_HA(n) (0x2280 + ((n) << 2)) /* High Address Remap */ [all …]
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| /freebsd/sys/contrib/dev/mediatek/mt76/mt7996/ |
| H A D | dma.c | 1 // SPDX-License-Identifier: ISC 16 struct mt7996_dev *dev = phy->dev; in mt7996_init_tx_queues() 21 idx -= MT_TXQ_ID(0); in mt7996_init_tx_queues() 23 if (phy->mt76->band_idx == MT_BAND2) in mt7996_init_tx_queues() 29 return mt76_connac_init_tx_queues(phy->mt76, idx, n_desc, in mt7996_init_tx_queues() 39 mt76_connac_tx_cleanup(&dev->mt76); in mt7996_poll_tx() 50 dev->q_wfdma_mask |= (1 << (q)); \ in mt7996_dma_config() 51 dev->q_int_mask[(q)] = int; \ in mt7996_dma_config() 52 dev->q_id[(q)] = id; \ in mt7996_dma_config() 59 /* rx queue */ in mt7996_dma_config() [all …]
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| /freebsd/sys/dev/qcom_ess_edma/ |
| H A D | qcom_ess_edma_hw.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 12 * 2. Redistributions in binary form must reproduce the above copyright 66 * for the ESS core - and that includes both the EDMA (ethernet) 69 * AND, it's a placeholder for what the linux ess-edma driver 72 * ess-switch won't be initialised. In that case it defaults 77 * So, for now this is a big no-op, at least until everything 79 * this EDMA driver code to co-exist. 87 device_printf(sc->sc_dev, "%s: called, TODO!\n", __func__); in qcom_ess_edma_hw_reset() 90 * This is where the linux ess-edma driver would reset the in qcom_ess_edma_hw_reset() [all …]
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| /freebsd/sys/contrib/ncsw/inc/flib/ |
| H A D | fsl_fman_port.h | 2 * Copyright 2008-2013 Freescale Semiconductor Inc. 18 * Foundation, either version 2 of that License or (at your option) any 141 #define FMAN_PORT_OBS_EXT_POOLS_NUM 2 150 /** @Description BMI Rx port register map */ 152 uint32_t fmbm_rcfg; /**< Rx Configuration */ 153 uint32_t fmbm_rst; /**< Rx Status */ 154 uint32_t fmbm_rda; /**< Rx DMA attributes*/ 155 uint32_t fmbm_rfp; /**< Rx FIFO Parameters*/ 156 uint32_t fmbm_rfed; /**< Rx Frame End Data*/ 157 uint32_t fmbm_ricp; /**< Rx Internal Context Parameters*/ [all …]
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| /freebsd/sys/dev/igc/ |
| H A D | igc_defines.h | 1 /*- 4 * SPDX-License-Identifier: BSD-3-Clause 72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */ 89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */ 98 #define IGC_RXD_ERR_RXE 0x80 /* Rx Data Error */ 127 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */ 128 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */ 153 #define IGC_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min thresh size */ 160 #define IGC_RCTL_SZ_2048 0x00000000 /* Rx buffer size 2048 */ 161 #define IGC_RCTL_SZ_1024 0x00010000 /* Rx buffer size 1024 */ [all …]
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| /freebsd/sys/dev/ice/ |
| H A D | ice_iflib.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 11 * 2. Redistributions in binary form must reproduce the above copyright 37 * implementation, including the Tx and Rx queue structures and the ice_softc 65 * ASSERT_CTX_LOCKED - Assert that the iflib context lock is held 71 #define ASSERT_CTX_LOCKED(sc) sx_assert((sc)->iflib_ctx_lock, SA_XLOCKED) 74 * IFLIB_CTX_LOCK - lock the iflib context lock 79 #define IFLIB_CTX_LOCK(sc) sx_xlock((sc)->iflib_ctx_lock) 82 * IFLIB_CTX_UNLOCK - unlock the iflib context lock 87 #define IFLIB_CTX_UNLOCK(sc) sx_xunlock((sc)->iflib_ctx_lock) 90 * ASSERT_CFG_LOCKED - Assert that a configuration lock is held [all …]
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| /freebsd/sys/dev/iavf/ |
| H A D | iavf_txrx_iflib.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 11 * 2. Redistributions in binary form must reproduce the above copyright 34 * @brief Tx/Rx hotpath implementation for the iflib driver 36 * Contains functions used to implement the Tx and Rx hotpaths of the iflib 63 * @brief iflib Tx/Rx operations for head write back 80 * @brief iflib Tx/Rx operations for descriptor write back 97 * iavf_is_tx_desc_done - Check if a Tx descriptor is ready 107 return (((txr->tx_base[idx].cmd_type_offset_bsz >> IAVF_TXD_QW1_DTYPE_SHIFT) in iavf_is_tx_desc_done() 113 * iavf_tso_detect_sparse - detect TSO packets with too many segments 134 if (nsegs <= IAVF_MAX_TX_SEGS-2) in iavf_tso_detect_sparse() [all …]
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