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Searched +full:imx7ulp +full:- +full:lpi2c (Results 1 – 16 of 16) sorted by relevance

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-adma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
8 compatible = "fsl,imx8qxp-lpuart";
12 compatible = "fsl,imx8qxp-lpuart";
16 compatible = "fsl,imx8qxp-lpuart";
20 compatible = "fsl,imx8qxp-lpuart";
24 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
28 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
32 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
36 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
H A Dimx8dxl-ss-adma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &asrc1;
7 /delete-node/ &asrc1_lpcg;
8 /delete-node/ &adc1;
9 /delete-node/ &adc1_lpcg;
10 /delete-node/ &amix;
11 /delete-node/ &amix_lpcg;
12 /delete-node/ &edma1;
13 /delete-node/ &esai0;
14 /delete-node/ &esai0_lpcg;
[all …]
H A Dimx94.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2024-2025 NXP
6 #include <dt-bindings/dma/fsl-edma.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx94-clock.h"
12 #include "imx94-pinfunc.h"
13 #include "imx94-power.h"
16 #address-cells = <2>;
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H A Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
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H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
H A Dimx8-ss-lvds1.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_lvds1>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_lvds1: interrupt-controller@57240000 {
15 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
H A Dimx95.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/clock/nxp,imx95-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx95-clock.h"
14 #include "imx95-pinfunc.h"
15 #include "imx95-power.h"
[all …]
H A Dimx8-ss-img.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019-2021 NXP
6 img_ipg_clk: clock-img-ipg {
7 compatible = "fixed-clock";
8 #clock-cells = <0>;
9 clock-frequency = <200000000>;
10 clock-output-names = "img_ipg_clk";
13 img_pxl_clk: clock-img-pxl {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
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H A Dimx8-ss-lvds0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 #address-cells = <1>;
10 #size-cells = <1>;
13 qm_lvds0_lis_lpcg: qxp_mipi1_lis_lpcg: clock-controller@56243000 {
14 compatible = "fsl,imx8qxp-lpcg";
16 #clock-cells = <1>;
17 clock-output-names = "lvds0_lis_lpcg_ipg_clk";
18 power-domains = <&pd IMX_SC_R_MIPI_1>;
21 qm_lvds0_pwm_lpcg: qxp_mipi1_pwm_lpcg: clock-controller@5624300c {
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H A Dimx8qm-ss-lvds.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 clock-indices = <IMX_LPCG_CLK_4>;
15 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
21 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
35 interrupt-parent = <&irqsteer_lvds0>;
37 irqsteer_lvds0: interrupt-controller@56240000 {
38 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
41 interrupt-controller;
42 interrupt-parent = <&gic>;
43 #interrupt-cells = <1>;
[all …]
H A Dimx8-ss-cm41.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <dt-bindings/clock/imx8-lpcg.h>
10 cm41_ipg_clk: clock-cm41-ipg {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <132000000>;
14 clock-output-names = "cm41_ipg_clk";
18 compatible = "simple-bus";
19 #address-cells = <1>;
[all …]
H A Dimx8-ss-cm40.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/firmware/imx/rsrc.h>
9 cm40_ipg_clk: clock-cm40-ipg {
10 compatible = "fixed-clock";
11 #clock-cells = <0>;
12 clock-frequency = <132000000>;
13 clock-output-names = "cm40_ipg_clk";
17 compatible = "simple-bus";
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
H A Dimx8-ss-mipi0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_mipi0>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_mipi0: interrupt-controller@56220000 {
15 compatible = "fsl,imx8qxp-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
H A Dimx8-ss-mipi1.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_mipi1>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_mipi1: interrupt-controller@57220000 {
15 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
/linux/drivers/i2c/busses/
H A Di2c-imx-lpi2c.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/dma-mapping.h>
29 #define DRIVER_NAME "imx-lpi2c"
192 (atomic ? readl_poll_timeout_atomic(lpi2c_imx->base + LPI2C_MSR, val, \
194 readl_poll_timeout(lpi2c_imx->base + LPI2C_MSR, val, cond, \
200 writel(enable, lpi2c_imx->base + LPI2C_MIER); in lpi2c_imx_intctrl()
213 writel(temp, lpi2c_imx->base + LPI2C_MSR); in lpi2c_imx_bus_busy()
214 return -EAGAIN; in lpi2c_imx_bus_busy()
219 dev_dbg(&lpi2c_imx->adapter.dev, "bus not work\n"); in lpi2c_imx_bus_busy()
220 if (lpi2c_imx->adapter.bus_recovery_info) in lpi2c_imx_bus_busy()
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