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Searched refs:vgpu (Results 1 – 25 of 26) sorted by relevance

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/linux/drivers/gpu/drm/i915/gvt/
H A Dvgpu.c43 void populate_pvinfo_page(struct intel_vgpu *vgpu) in populate_pvinfo_page() argument
45 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in populate_pvinfo_page()
47 vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC; in populate_pvinfo_page()
48 vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1; in populate_pvinfo_page()
49 vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0; in populate_pvinfo_page()
50 vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0; in populate_pvinfo_page()
51 vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; in populate_pvinfo_page()
53 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT; in populate_pvinfo_page()
54 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION; in populate_pvinfo_page()
55 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT; in populate_pvinfo_page()
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H A Ddisplay.c53 static int get_edp_pipe(struct intel_vgpu *vgpu) in get_edp_pipe() argument
55 u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP); in get_edp_pipe()
73 static int edp_pipe_is_enabled(struct intel_vgpu *vgpu) in edp_pipe_is_enabled() argument
75 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in edp_pipe_is_enabled()
78 if (!(vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_EDP)) & TRANSCONF_ENABLE)) in edp_pipe_is_enabled()
81 if (!(vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP) & TRANS_DDI_FUNC_ENABLE)) in edp_pipe_is_enabled()
86 int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe) in pipe_is_enabled() argument
88 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in pipe_is_enabled()
95 if (vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) & TRANSCONF_ENABLE) in pipe_is_enabled()
98 if (edp_pipe_is_enabled(vgpu) && in pipe_is_enabled()
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H A Dkvmgt.c72 size_t (*rw)(struct intel_vgpu *vgpu, char *buf,
74 void (*release)(struct intel_vgpu *vgpu,
98 struct intel_vgpu *vgpu; member
129 static void gvt_unpin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_unpin_guest_page() argument
132 vfio_unpin_pages(&vgpu->vfio_device, gfn << PAGE_SHIFT, in gvt_unpin_guest_page()
137 static int gvt_pin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_pin_guest_page() argument
153 ret = vfio_pin_pages(&vgpu->vfio_device, cur_iova, 1, in gvt_pin_guest_page()
174 gvt_unpin_guest_page(vgpu, gfn, npage * PAGE_SIZE); in gvt_pin_guest_page()
178 static int gvt_dma_map_page(struct intel_vgpu *vgpu, unsigned long gfn, in gvt_dma_map_page() argument
181 struct device *dev = vgpu->gvt->gt->i915->drm.dev; in gvt_dma_map_page()
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H A Dsched_policy.c38 static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu) in vgpu_has_pending_workload() argument
43 for_each_engine(engine, vgpu->gvt->gt, i) { in vgpu_has_pending_workload()
44 if (!list_empty(workload_q_head(vgpu, engine))) in vgpu_has_pending_workload()
56 struct intel_vgpu *vgpu; member
76 static void vgpu_update_timeslice(struct intel_vgpu *vgpu, ktime_t cur_time) in vgpu_update_timeslice() argument
81 if (!vgpu || vgpu == vgpu->gvt->idle_vgpu) in vgpu_update_timeslice()
84 vgpu_data = vgpu->sched_data; in vgpu_update_timeslice()
180 struct intel_vgpu *vgpu = NULL; in find_busy_vgpu() local
188 if (!vgpu_has_pending_workload(vgpu_data->vgpu)) in find_busy_vgpu()
193 vgpu = vgpu_data->vgpu; in find_busy_vgpu()
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H A Dhandlers.c106 static void read_vreg(struct intel_vgpu *vgpu, unsigned int offset, in read_vreg() argument
109 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in read_vreg()
112 static void write_vreg(struct intel_vgpu *vgpu, unsigned int offset, in write_vreg() argument
115 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in write_vreg()
192 void enter_failsafe_mode(struct intel_vgpu *vgpu, int reason) in enter_failsafe_mode() argument
207 pr_err("Now vgpu %d will enter failsafe mode.\n", vgpu->id); in enter_failsafe_mode()
208 vgpu->failsafe = true; in enter_failsafe_mode()
211 static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu, in sanitize_fence_mmio_access() argument
214 unsigned int max_fence = vgpu_fence_sz(vgpu); in sanitize_fence_mmio_access()
224 if (!vgpu->pv_notified) in sanitize_fence_mmio_access()
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H A Dgtt.c60 bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size) in intel_gvt_ggtt_validate_range() argument
63 return vgpu_gmadr_is_valid(vgpu, addr); in intel_gvt_ggtt_validate_range()
65 if (vgpu_gmadr_is_aperture(vgpu, addr) && in intel_gvt_ggtt_validate_range()
66 vgpu_gmadr_is_aperture(vgpu, addr + size - 1)) in intel_gvt_ggtt_validate_range()
68 else if (vgpu_gmadr_is_hidden(vgpu, addr) && in intel_gvt_ggtt_validate_range()
69 vgpu_gmadr_is_hidden(vgpu, addr + size - 1)) in intel_gvt_ggtt_validate_range()
243 struct intel_vgpu *vgpu) in gtt_get_entry64() argument
245 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in gtt_get_entry64()
252 ret = intel_gvt_read_gpa(vgpu, gpa + in gtt_get_entry64()
258 e->val64 = read_pte64(vgpu->gvt->gt->ggtt, index); in gtt_get_entry64()
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H A Ddebugfs.c31 struct intel_vgpu *vgpu; member
68 vreg = vgpu_vreg(param->vgpu, offset); in mmio_diff_handler()
88 struct intel_vgpu *vgpu = s->private; in vgpu_mmio_diff_show() local
89 struct intel_gvt *gvt = vgpu->gvt; in vgpu_mmio_diff_show()
91 .vgpu = vgpu, in vgpu_mmio_diff_show()
132 struct intel_vgpu *vgpu = (struct intel_vgpu *)data; in vgpu_scan_nonprivbb_get() local
134 *val = vgpu->scan_nonprivbb; in vgpu_scan_nonprivbb_get()
147 struct intel_vgpu *vgpu = (struct intel_vgpu *)data; in vgpu_scan_nonprivbb_set() local
149 vgpu->scan_nonprivbb = val; in vgpu_scan_nonprivbb_set()
159 struct intel_vgpu *vgpu = (struct intel_vgpu *)data; in vgpu_status_get() local
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H A Ddmabuf.c50 struct intel_vgpu *vgpu; in vgpu_gem_get_pages() local
66 vgpu = fb_info->obj->vgpu; in vgpu_gem_get_pages()
67 if (drm_WARN_ON(&dev_priv->drm, !vgpu)) in vgpu_gem_get_pages()
84 if (intel_gvt_dma_pin_guest_page(vgpu, dma_addr)) { in vgpu_gem_get_pages()
103 intel_gvt_dma_unmap_guest_page(vgpu, dma_addr); in vgpu_gem_get_pages()
121 struct intel_vgpu *vgpu = obj->vgpu; in vgpu_gem_put_pages() local
125 intel_gvt_dma_unmap_guest_page(vgpu, in vgpu_gem_put_pages()
137 struct intel_vgpu *vgpu = obj->vgpu; in dmabuf_gem_object_free() local
141 if (vgpu && test_bit(INTEL_VGPU_STATUS_ACTIVE, vgpu->status) && in dmabuf_gem_object_free()
142 !list_empty(&vgpu->dmabuf_obj_list_head)) { in dmabuf_gem_object_free()
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H A Dpage_track.c36 struct intel_vgpu *vgpu, unsigned long gfn) in intel_vgpu_find_page_track() argument
38 return radix_tree_lookup(&vgpu->page_track_tree, gfn); in intel_vgpu_find_page_track()
51 int intel_vgpu_register_page_track(struct intel_vgpu *vgpu, unsigned long gfn, in intel_vgpu_register_page_track() argument
57 track = intel_vgpu_find_page_track(vgpu, gfn); in intel_vgpu_register_page_track()
68 ret = radix_tree_insert(&vgpu->page_track_tree, gfn, track); in intel_vgpu_register_page_track()
83 void intel_vgpu_unregister_page_track(struct intel_vgpu *vgpu, in intel_vgpu_unregister_page_track() argument
88 track = radix_tree_delete(&vgpu->page_track_tree, gfn); in intel_vgpu_unregister_page_track()
91 intel_gvt_page_track_remove(vgpu, gfn); in intel_vgpu_unregister_page_track()
104 int intel_vgpu_enable_page_track(struct intel_vgpu *vgpu, unsigned long gfn) in intel_vgpu_enable_page_track() argument
109 track = intel_vgpu_find_page_track(vgpu, gfn); in intel_vgpu_enable_page_track()
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H A Dgtt.h63 struct intel_vgpu *vgpu);
69 struct intel_vgpu *vgpu);
151 struct intel_vgpu *vgpu; member
182 struct intel_vgpu_mm *intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu,
218 int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
219 void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);
220 void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old);
221 void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu);
226 struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
243 struct intel_vgpu *vgpu; member
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H A Dsched_policy.h43 int (*init_vgpu)(struct intel_vgpu *vgpu);
44 void (*clean_vgpu)(struct intel_vgpu *vgpu);
45 void (*start_schedule)(struct intel_vgpu *vgpu);
46 void (*stop_schedule)(struct intel_vgpu *vgpu);
55 int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu);
57 void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu);
59 void intel_vgpu_start_schedule(struct intel_vgpu *vgpu);
61 void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu);
H A Dscheduler.h86 struct intel_vgpu *vgpu; member
134 #define workload_q_head(vgpu, e) \ argument
135 (&(vgpu)->submission.workload_q_head[(e)->id])
143 void intel_gvt_wait_vgpu_idle(struct intel_vgpu *vgpu);
145 int intel_vgpu_setup_submission(struct intel_vgpu *vgpu);
147 void intel_vgpu_reset_submission(struct intel_vgpu *vgpu,
150 void intel_vgpu_clean_submission(struct intel_vgpu *vgpu);
152 int intel_vgpu_select_submission_ops(struct intel_vgpu *vgpu,
160 intel_vgpu_create_workload(struct intel_vgpu *vgpu,
166 void intel_vgpu_clean_workloads(struct intel_vgpu *vgpu,
H A Dcmd_parser.c485 struct intel_vgpu *vgpu; member
526 (s->vgpu->gvt->device_info.gmadr_bytes_in_cmd >> 2)
744 s->vgpu->id, s->engine->name, in parser_exec_state_dump()
867 struct intel_vgpu *vgpu = s->vgpu; in cmd_pdp_mmio_update_handler() local
877 mm = intel_vgpu_find_ppgtt_mm(vgpu, pdps); in cmd_pdp_mmio_update_handler()
901 struct intel_vgpu *vgpu = s->vgpu; in cmd_reg_handler() local
902 struct intel_gvt *gvt = vgpu->gvt; in cmd_reg_handler()
961 vreg = &vgpu_vreg(s->vgpu, offset); in cmd_reg_handler()
992 ret = mmio_info->write(s->vgpu, offset, in cmd_reg_handler()
1023 intel_gvt_read_gpa(s->vgpu, in cmd_reg_handler()
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H A Dpage_track.h45 struct intel_vgpu *vgpu, unsigned long gfn);
47 int intel_vgpu_register_page_track(struct intel_vgpu *vgpu,
50 void intel_vgpu_unregister_page_track(struct intel_vgpu *vgpu,
53 int intel_vgpu_enable_page_track(struct intel_vgpu *vgpu, unsigned long gfn);
54 int intel_vgpu_disable_page_track(struct intel_vgpu *vgpu, unsigned long gfn);
56 int intel_vgpu_page_track_handler(struct intel_vgpu *vgpu, u64 gpa,
H A Dinterrupt.h145 enum intel_gvt_event_type event, struct intel_vgpu *vgpu);
149 void (*check_pending_irq)(struct intel_vgpu *vgpu);
195 void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
198 int intel_vgpu_reg_iir_handler(struct intel_vgpu *vgpu, unsigned int reg,
200 int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
202 int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
204 int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
H A Dedid.h133 void intel_vgpu_init_i2c_edid(struct intel_vgpu *vgpu);
135 int intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu,
138 int intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu,
141 void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,
H A Dexeclist.h173 struct intel_vgpu *vgpu; member
178 void intel_vgpu_clean_execlist(struct intel_vgpu *vgpu);
180 int intel_vgpu_init_execlist(struct intel_vgpu *vgpu);
182 int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu,
H A Ddebug.h32 if (IS_ERR_OR_NULL(vgpu)) \
35 pr_err("gvt: vgpu %d: "fmt, vgpu->id, ##args);\
H A Dcmd_parser.h54 void intel_gvt_update_reg_whitelist(struct intel_vgpu *vgpu);
H A DMakefile25 gvt/vgpu.o
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8390-grinn-genio-som.dtsi82 /* The name "vgpu" is required by mtk-regulator-coupler */
83 regulator-name = "vgpu";
H A Dmt6358.dtsi76 regulator-name = "vgpu";
H A Dmt8186-corsola.dtsi1297 vsys-vgpu-supply = <&pp4200_z2>;
1331 mt6366_vgpu_reg: vgpu {
/linux/arch/arm/boot/dts/mediatek/
H A Dmt8135-evbp1.dts69 regulator-name = "vgpu";
/linux/drivers/gpu/drm/i915/gt/
H A Dgen8_ppgtt.c100 mutex_lock(&i915->vgpu.lock); in gen8_ppgtt_notify_vgt()
133 mutex_unlock(&i915->vgpu.lock); in gen8_ppgtt_notify_vgt()

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