Lines Matching refs:vgpu

155 static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe,
158 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
161 	u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(display, pipe)) & stride_mask;
192 static int get_active_pipe(struct intel_vgpu *vgpu)
197 		if (pipe_is_enabled(vgpu, i))
205  * @vgpu: input vgpu
212 int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
215 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
220 	pipe = get_active_pipe(vgpu);
224 	val = vgpu_vreg_t(vgpu, DSPCNTR(display, pipe));
258 	plane->base = vgpu_vreg_t(vgpu, DSPSURF(display, pipe)) & I915_GTT_PAGE_MASK;
259 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))
262 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
269 	plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled,
274 	plane->width = (vgpu_vreg_t(vgpu, PIPESRC(display, pipe)) & _PIPE_H_SRCSZ_MASK) >>
277 	plane->height = (vgpu_vreg_t(vgpu, PIPESRC(display, pipe)) &
281 	val = vgpu_vreg_t(vgpu, DSPTILEOFF(display, pipe));
336  * @vgpu: input vgpu
343 int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
346 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
352 	pipe = get_active_pipe(vgpu);
356 	val = vgpu_vreg_t(vgpu, CURCNTR(display, pipe));
382 	plane->base = vgpu_vreg_t(vgpu, CURBASE(display, pipe)) & I915_GTT_PAGE_MASK;
383 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))
386 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
393 	val = vgpu_vreg_t(vgpu, CURPOS(display, pipe));
399 	plane->x_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot));
400 	plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot));