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/linux/Documentation/devicetree/bindings/ipmi/
H A Dipmi-smic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/ipmi-smic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Corey Minyard <cminyard@mvista.com>
17 - ipmi-kcs
18 - ipmi-smic
19 - ipmi-bt
23 - const: ipmi
25 reg:
[all …]
/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
18 reg:
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
[all …]
/linux/drivers/char/ipmi/
H A Dipmi_si_platform.c1 // SPDX-License-Identifier: GPL-2.0+
57 /* For GPE-type interrupts. */
63 ipmi_si_irq_handler(io->irq, io->irq_handler_data); in ipmi_acpi_gpe()
69 if (!io->irq) in acpi_gpe_irq_cleanup()
73 acpi_remove_gpe_handler(NULL, io->irq, &ipmi_acpi_gpe); in acpi_gpe_irq_cleanup()
80 if (!io->irq) in acpi_gpe_irq_setup()
84 io->irq, in acpi_gpe_irq_setup()
89 dev_warn(io->dev, in acpi_gpe_irq_setup()
91 io->irq); in acpi_gpe_irq_setup()
92 io->irq = 0; in acpi_gpe_irq_setup()
[all …]
H A Dipmi_plat_data.c1 // SPDX-License-Identifier: GPL-2.0+
24 if (p->iftype == IPMI_PLAT_IF_SI) { in ipmi_platform_add()
25 if (p->type == SI_BT) in ipmi_platform_add()
27 else if (p->type != SI_TYPE_INVALID) in ipmi_platform_add()
30 if (p->regsize == 0) in ipmi_platform_add()
31 p->regsize = DEFAULT_REGSIZE; in ipmi_platform_add()
32 if (p->regspacing == 0) in ipmi_platform_add()
33 p->regspacing = p->regsize; in ipmi_platform_add()
35 pr[pidx++] = PROPERTY_ENTRY_U8("ipmi-type", p->type); in ipmi_platform_add()
36 } else if (p->iftype == IPMI_PLAT_IF_SSIF) { in ipmi_platform_add()
[all …]
/linux/drivers/media/radio/
H A Dradio-tea5777.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <media/v4l2-device.h>
18 #include <media/v4l2-dev.h>
19 #include <media/v4l2-fh.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-event.h>
22 #include "radio-tea5777.h"
34 /* Write reg, common bits */
76 /* Write reg, FM specific bits */
93 /* Write reg, AM specific bits */
[all …]
/linux/arch/mips/alchemy/devboards/
H A Dbcsr.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
8 * All registers are 16bits wide with 32bit spacing.
19 #include <asm/mach-db1x00/bcsr.h>
27 static int bcsr_csc_base; /* linux-irq of first cascaded irq */
41 (0x04 * (i - BCSR_HEXLEDS)); in bcsr_init()
50 unsigned short bcsr_read(enum bcsr_id reg) in bcsr_read() argument
55 spin_lock_irqsave(&bcsr_regs[reg].lock, flags); in bcsr_read()
56 r = __raw_readw(bcsr_regs[reg].raddr); in bcsr_read()
57 spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags); in bcsr_read()
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/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_txrx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
88 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
92 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
100 if (unlikely(++(idx) == (q)->desc_count)) \
122 ((((txq)->next_to_clean > (txq)->next_to_use) ? 0 : (txq)->desc_count) + \
123 (txq)->next_to_clean - (txq)->next_to_use - 1)
125 #define IDPF_TX_COMPLQ_OVERFLOW_THRESH(txcq) ((txcq)->desc_count >> 1)
130 (((txq)->num_completions_pending >= (txq)->complq->num_completions ? \
132 (txq)->num_completions_pending - (txq)->complq->num_completions)
154 * struct idpf_tx_offload_params - Offload parameters for a given packet
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/linux/arch/arm/boot/dts/calxeda/
H A Decx-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
20 #address-cells = <1>;
21 #size-cells = <1>;
22 compatible = "simple-bus";
23 interrupt-parent = <&intc>;
26 compatible = "calxeda,hb-ahci";
27 reg = <0xffe08000 0x10000>;
29 dma-coherent;
30 calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-soc.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 /include/ "amd-seattle-clks.dtsi"
16 gic0: interrupt-controller@e1101000 {
17 compatible = "arm,gic-400", "arm,cortex-a15-gic";
18 interrupt-controller;
19 #interrupt-cells = <3>;
20 #address-cells = <2>;
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9002_phy.h2 * Copyright (c) 2008-2011 Atheros Communications Inc.
29 /* For 25 MHz channel spacing -- not used but supported by hw */
170 #define AR_PHY_SPECTRAL_SCAN_ENA 0x00000001 /* Enable spectral scan, reg 68, bit 0 */
171 #define AR_PHY_SPECTRAL_SCAN_ENA_S 0 /* Enable spectral scan, reg 68, bit 0 */
172 #define AR_PHY_SPECTRAL_SCAN_ACTIVE 0x00000002 /* Activate spectral scan reg 68, bit 1*/
173 #define AR_PHY_SPECTRAL_SCAN_ACTIVE_S 1 /* Activate spectral scan reg 68, bit 1*/
174 #define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD 0x000000F0 /* Interval for FFT reports, reg 68, bits 4-7*/
176 #define AR_PHY_SPECTRAL_SCAN_PERIOD 0x0000FF00 /* Interval for FFT reports, reg 68, bits 8-15*/
178 #define AR_PHY_SPECTRAL_SCAN_COUNT 0x00FF0000 /* Number of reports, reg 68, bits 16-23*/
180 #define AR_PHY_SPECTRAL_SCAN_COUNT_KIWI 0x0FFF0000 /* Number of reports, reg 68, bits 16-27*/
[all …]
H A Dhw.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
28 #include "hw-ops.h"
43 struct ath9k_channel *chan = ah->curchan; in ath9k_hw_set_clockrate()
53 else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK) in ath9k_hw_set_clockrate()
67 common->clockrate = clockrate; in ath9k_hw_set_clockrate()
74 return usecs * common->clockrate; in ath9k_hw_mac_to_clks()
77 bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) in ath9k_hw_wait() argument
84 if ((REG_READ(ah, reg) & mask) == val) in ath9k_hw_wait()
91 "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n", in ath9k_hw_wait()
92 timeout, reg, REG_READ(ah, reg), mask, val); in ath9k_hw_wait()
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddib3000mb_priv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #define rd(reg) dib3000_read_reg(state,reg) argument
16 #define wr(reg,val) if (dib3000_write_reg(state,reg,val)) \ argument
17 { pr_err("while sending 0x%04x to 0x%04x.", val, reg); return -EREMOTEIO; }
26 #define set_or(reg,val) wr(reg,rd(reg) | val) argument
28 #define set_and(reg,val) wr(reg,rd(reg) & val) argument
131 /* timing frequency (carrier spacing) */
159 * Dual Automatic-Gain-Control
160 * - gains RF in tuner (AGC1)
161 * - gains IF after filtering (AGC2)
[all …]
/linux/drivers/net/ethernet/intel/e1000e/
H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * e1000e_get_bus_info_pcie - Get PCIe bus information
18 struct pci_dev *pdev = hw->adapter->pdev; in e1000e_get_bus_info_pcie()
19 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
20 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
24 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
27 bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, in e1000e_get_bus_info_pcie()
31 mac->ops.set_lan_id(hw); in e1000e_get_bus_info_pcie()
37 * e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
[all …]
/linux/tools/testing/selftests/user_events/
H A Dftrace_test.c1 // SPDX-License-Identifier: GPL-2.0
33 if (fd == -1) in trace_bytes()
34 return -1; in trace_bytes()
39 if (got == -1) in trace_bytes()
40 return -1; in trace_bytes()
69 return -1; in skip_until_empty_line()
78 return -1; in get_print_fmt()
103 return -1; in get_print_fmt()
113 if (fd == -1) in wait_for_delete()
134 if (fd == -1) in clear()
[all …]
/linux/drivers/net/dsa/
H A Dbcm_sf2_regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 /* Register set relative to 'REG' */
176 #define P_IRQ_OFF(x) ((6 - (x)) * P_NUM_IRQ)
484 /* Number of slices for IPv4, IPv6 and non-IP */
488 /* Spacing between different slices */
/linux/drivers/atm/
H A Diphase.c29 Complete the ABR logic of the driver, and added the ABR work-
32 Add the flow control logic to the driver to allow rate-limit VC.
72 #define PRIV(dev) ((struct suni_priv *) dev->phy_data)
100 que->next = NULL; in ia_init_rtn_q()
101 que->tail = NULL; in ia_init_rtn_q()
106 data->next = NULL; in ia_enque_head_rtn_q()
107 if (que->next == NULL) in ia_enque_head_rtn_q()
108 que->next = que->tail = data; in ia_enque_head_rtn_q()
110 data->next = que->next; in ia_enque_head_rtn_q()
111 que->next = data; in ia_enque_head_rtn_q()
[all …]
/linux/drivers/net/ethernet/intel/igb/
H A De1000_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
[all …]
/linux/drivers/gpio/
H A Dgpio-pca953x.c1 // SPDX-License-Identifier: GPL-2.0-only
32 #include <linux/pinctrl/pinconf-generic.h>
141 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
167 * relative. Since first controller (gpio-sch.c) and
168 * second (gpio-dwapb.c) are at the fixed bases, we may
190 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
243 u8 (*recalc_addr)(struct pca953x_chip *chip, int reg, int off);
244 bool (*check_reg)(struct pca953x_chip *chip, unsigned int reg,
250 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); in pca953x_bank_shift()
261 int msb = BANK_SZ - 1; in pca953x_get_bit_mask()
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/linux/drivers/net/wireless/ath/ath5k/
H A Dphy.c2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
33 #include "reg.h"
42 * Here we handle the low-level functions related to baseband
48 * - Channel setting/switching
50 * - Automatic Gain Control (AGC) calibration
52 * - Noise Floor calibration
54 * - I/Q imbalance calibration (QAM correction)
[all …]
H A Dreg.h2 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
3 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
4 * Copyright (c) 2007-2008 Michael Taylor <mike.taylor@apprion.com>
28 * 5210 - http://nova.stanford.edu/~bbaas/ps/isscc2002_slides.pdf
30 * 5211 - http://www.hotchips.org/archives/hc14/3_Tue/16_mcfarland.pdf
33 * Atheros's ART program (Atheros Radio Test), on ath9k, on legacy-hal
37 #include "../reg.h"
42 * AR5210-Specific TXDP registers
46 #define AR5K_NOQCU_TXDP0 0x0000 /* Queue 0 - data */
47 #define AR5K_NOQCU_TXDP1 0x0004 /* Queue 1 - beacons */
[all …]
/linux/drivers/net/ethernet/intel/
H A De100.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
26 * LAN-On-Motherboard (LOM), CardBus, MiniPCI, and ICHx
27 * configurations. 8255x supports a 32-bit linear addressing
32 * Memory-mapped mode is used exclusively to access the device's
33 * shared-memory structure, the Control/Status Registers (CSR). All
39 * 8255x is highly MII-compliant and all access to the PHY go
41 * driver leverages the mii.c library shared with other MII-compliant
44 * Big- and Little-Endian byte order as well as 32- and 64-bit
45 * archs are supported. Weak-ordered memory and non-cache-coherent
[all …]
/linux/arch/mips/kernel/
H A Dtraps.c6 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
49 #include <asm/cpu-type.h>
54 #include <asm/isa-rev.h>
55 #include <asm/mips-cps.h>
56 #include <asm/mips-r2-to-r6-emul.h>
75 #include <asm/mach-loongson64/cpucfg-emul.h>
77 #include "access-helper.h"
155 unsigned long sp = regs->regs[29]; in show_backtrace()
156 unsigned long ra = regs->regs[31]; in show_backtrace()
157 unsigned long pc = regs->cp0_epc; in show_backtrace()
[all …]
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da4xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
70 <!-- hmm, shifted one compared to a3xx?!? -->
88 <!-- beyond here it does not appear to be shifted -->
145 <!-- 0x00 .. 0x02 -->
147 <!-- 8-bit formats -->
154 <!-- 16-bit formats -->
157 <!-- 0x0a -->
160 <!-- 0x0c -->
[all …]
/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
346 s32 e1000_read_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 * data);
349 s32 e1000_write_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 * data);
376 #define E1000_READ_REG_IO(a, reg) \ argument
377 e1000_read_reg_io((a), E1000_##reg)
378 #define E1000_WRITE_REG_IO(a, reg, val) \ argument
379 e1000_write_reg_io((a), E1000_##reg, val)
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/
H A Dbase.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
156 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl_init_hw_ht_capab()
158 ht_cap->ht_supported = true; in _rtl_init_hw_ht_capab()
159 ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | in _rtl_init_hw_ht_capab()
164 if (rtlpriv->rtlhal.disable_amsdu_8k) in _rtl_init_hw_ht_capab()
165 ht_cap->cap &= ~IEEE80211_HT_CAP_MAX_AMSDU; in _rtl_init_hw_ht_capab()
169 *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) in _rtl_init_hw_ht_capab()
171 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; in _rtl_init_hw_ht_capab()
173 /*Minimum MPDU start spacing , */ in _rtl_init_hw_ht_capab()
[all …]

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