1 // SPDX-License-Identifier: GPL-2.0-only
3  * bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
8  * All registers are 16bits wide with 32bit spacing.
19 #include <asm/mach-db1x00/bcsr.h>
27 static int bcsr_csc_base;	/* linux-irq of first cascaded irq */
41 					(0x04 * (i - BCSR_HEXLEDS));  in bcsr_init()
50 unsigned short bcsr_read(enum bcsr_id reg)  in bcsr_read()  argument
55 	spin_lock_irqsave(&bcsr_regs[reg].lock, flags);  in bcsr_read()
56 	r = __raw_readw(bcsr_regs[reg].raddr);  in bcsr_read()
57 	spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);  in bcsr_read()
62 void bcsr_write(enum bcsr_id reg, unsigned short val)  in bcsr_write()  argument
66 	spin_lock_irqsave(&bcsr_regs[reg].lock, flags);  in bcsr_write()
67 	__raw_writew(val, bcsr_regs[reg].raddr);  in bcsr_write()
69 	spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);  in bcsr_write()
73 void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set)  in bcsr_mod()  argument
78 	spin_lock_irqsave(&bcsr_regs[reg].lock, flags);  in bcsr_mod()
79 	r = __raw_readw(bcsr_regs[reg].raddr);  in bcsr_mod()
82 	__raw_writew(r, bcsr_regs[reg].raddr);  in bcsr_mod()
84 	spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);  in bcsr_mod()
103 	unsigned short v = 1 << (d->irq - bcsr_csc_base);  in bcsr_irq_mask()
110 	unsigned short v = 1 << (d->irq - bcsr_csc_base);  in bcsr_irq_maskack()
118 	unsigned short v = 1 << (d->irq - bcsr_csc_base);  in bcsr_irq_unmask()