Home
last modified time | relevance | path

Searched +full:pll +full:- +full:master (Results 1 – 25 of 68) sorted by relevance

123

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsilabs,si5351.txt5 https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
8 clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
15 - compatible: shall be one of the following:
16 "silabs,si5351a" - Si5351a, QFN20 package
17 "silabs,si5351a-msop" - Si5351a, MSOP10 package
18 "silabs,si5351b" - Si5351b, QFN20 package
19 "silabs,si5351c" - Si5351c, QFN20 package
20 - reg: i2c device address, shall be 0x60 or 0x61.
21 - #clock-cells: from common clock binding; shall be set to 1.
22 - clocks: from common clock binding; list of parent clock
[all …]
H A Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
13 clocks. The chip contains a PLL that sources 5 (or 4) multisynth clocks, which
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
37 "silabs,si5344" - Si5344 A/B/C/D
[all …]
H A Dti,cdce706.txt1 Bindings for Texas Instruments CDCE706 programmable 3-PLL clock
7 - compatible: shall be "ti,cdce706".
8 - reg: i2c device address, shall be in range [0x68...0x6b].
9 - #clock-cells: from common clock binding; shall be set to 1.
10 - clocks: from common clock binding; list of parent clock
13 - clock-names: shall be clk_in0 and/or clk_in1. Use clk_in0
16 single-ended LVCMOS inputs configuration.
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <54000000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dbrcm,bcm63xx-hsspi.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - William Zhang <william.zhang@broadcom.com>
11 - Kursad Oney <kursad.oney@broadcom.com>
12 - Jonas Gorski <jonas.gorski@gmail.com>
15 Broadcom Broadband SoC supports High Speed SPI master controller since the
19 brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to
20 use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Ddove-cubox.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
20 compatible = "gpio-leds";
21 pinctrl-0 = <&pmx_gpio_18>;
22 pinctrl-names = "default";
24 led-power {
27 default-state = "keep";
31 usb_power: regulator-1 {
32 compatible = "regulator-fixed";
33 regulator-name = "USB Power";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
[all …]
H A Dst,sta350.txt7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
H A Damlogic,gx-sound-card.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: sound-card-common.yaml#
18 - const: amlogic,gx-sound-card
20 audio-aux-devs:
21 $ref: /schemas/types.yaml#/definitions/phandle-array
24 audio-widgets:
[all …]
H A Damlogic,axg-sound-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: sound-card-common.yaml#
17 const: amlogic,axg-sound-card
19 audio-aux-devs:
20 $ref: /schemas/types.yaml#/definitions/phandle-array
23 audio-widgets:
[all …]
/freebsd/sys/dev/bhnd/cores/pci/
H A Dbhnd_pcireg.h1 /*-
2 * SPDX-License-Identifier: ISC
29 * PCI/PCIe-Gen1 DMA Constants
35 #define BHND_PCIE_DMA32_TRANSLATION 0x80000000 /**< PCIe-Gen1 DMA32 address translation (sb2pcitr…
36 #define BHND_PCIE_DMA32_MASK BHND_PCIE_SBTOPCI2_MASK /**< PCIe-Gen1 DMA32 translation mask */
38 #define BHND_PCIE_DMA64_TRANSLATION _BHND_PCIE_DMA64(TRANSLATION) /**< PCIe-Gen1 DMA64 address tran…
39 #define BHND_PCIE_DMA64_MASK _BHND_PCIE_DMA64(MASK) /**< PCIe-Gen1 DMA64 translation mask */
76 /* BHND_PCI_ARB_CTL - ParkID (>= rev8) */
79 #define BHND_PCI_ARB_PARKID_EXT0 0 /* External master 0 */
80 #define BHND_PCI_ARB_PARKID_EXT1 1 /* External master 1 */
[all …]
/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_radio_2055.h22 Boston, MA 02110-1301, USA.
48 #define B2055_MASTER1 0x11 /* Master control 1 */
49 #define B2055_MASTER2 0x12 /* Master control 2 */
51 #define B2055_PD_PLLTS 0x14 /* PD PLL TS */
81 #define B2055_PLL_LFC1 0x32 /* PLL LF C1 */
82 #define B2055_PLL_CALVTH 0x33 /* PLL CAL VTH */
83 #define B2055_PLL_LFC2 0x34 /* PLL LF C2 */
84 #define B2055_PLL_REF 0x35 /* PLL reference */
85 #define B2055_PLL_LFR1 0x36 /* PLL LF R1 */
86 #define B2055_PLL_PFDCP 0x37 /* PLL PFD CP */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dsim.txt1 Exynos MIPI DSI Master
4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
10 - reg: physical base address and length of the registers set for the device
11 - interrupts: should contain DSI interrupt
12 - clocks: list of clock specifiers, must contain an entry for each required
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi.txt5 - compatible:
6 * "qcom,mdss-dsi-ctrl"
7 - reg: Physical base address and length of the registers of controller
8 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the DSI block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: Phandles to device clocks.
13 - clock-names: the following clocks are required:
25 - assigned-clocks: Parents of "byte" and "pixel" for the given platform.
26 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
[all …]
H A Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
[all …]
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
H A Dvexpress-v2p-ca15_a7.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipc.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
47 CHIPC_PFLASH_CFI = 1, /**< CFI-compatible parallel flash */
50 CHIPC_QSFLASH_ST = 4, /**< ST quad-SPI flash */
51 CHIPC_QSFLASH_AT = 5, /**< Atmel quad-SPI flash */
60 uint8_t num_uarts; /**< Number of attached UARTS (1-3) */
61 bool mipseb; /**< MIPS is big-endian */
63 uint8_t uart_gpio; /**< UARTs own GPIO pins 12-15 */
77 uint8_t pll_type; /**< PLL type */
[all …]
H A Dchipcreg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2010-2015 Broadcom Corporation
10 * distributed with the Asus RT-N16 firmware source code release.
77 /* siba backplane configuration broadcast (siba-only) */
81 #define CHIPC_GPIOPU 0x58 /**< pull-up mask (rev >= 20) */
97 #define CHIPC_GPIOTIMERVAL 0x88 /**< gpio-based LED duty cycle (rev >= 16) */
100 /* clock control registers (non-PMU devices) */
111 /* pll/slowclk clock control registers (rev >= 4) */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dregulator-max77620.txt3 Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The input supply
6 sub-node "regulators" which is child node of device node.
14 -------
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8150-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/usb/pd.h>
18 compatible = "qcom,sm8150-hdk", "qcom,sm8150";
19 chassis-type = "embedded";
26 stdout-path = "serial0:115200n8";
29 vph_pwr: vph-pwr-regulator {
30 compatible = "regulator-fixed";
[all …]
H A Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
[all …]
H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include "sdm845-wcd9340.dtsi"
21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>;
[all …]
/freebsd/sys/dev/sound/pci/
H A Dcsa.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
9 * Copyright (c) 1996-1998 Crystal Semiconductor Corp.
192 subcard = card->cards; in csa_findsubcard()
211 device_set_desc(dev, card->name); in csa_probe()
229 scp->dev = dev; in csa_attach()
234 resp = &scp->res; in csa_attach()
235 scp->card = csa_findsubcard(dev); in csa_attach()
236 scp->binfo.card = scp->card; in csa_attach()
237 printf("csa: card is %s\n", scp->card->name); in csa_attach()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dthine,thp7312.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Elder <paul.elder@@ideasonboard.com>
17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
23 - $ref: /schemas/media/video-interface-devices.yaml#
36 thine,boot-mode:
43 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from
46 reset-gpios:
52 vddcore-supply:
[all …]

123