Lines Matching +full:pll +full:- +full:master
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
28 - enum:
29 - fsl,imx8mm-sai
30 - fsl,imx8mn-sai
31 - fsl,imx8mp-sai
32 - const: fsl,imx8mq-sai
34 - items:
35 - enum:
36 - fsl,imx6sx-sai
37 - fsl,imx7ulp-sai
38 - fsl,imx8mq-sai
39 - fsl,imx8qm-sai
40 - fsl,imx8ulp-sai
41 - fsl,imx93-sai
42 - fsl,vf610-sai
49 - description: The ipg clock for register access
50 - description: master clock source 0 (obsoleted)
51 - description: master clock source 1
52 - description: master clock source 2
53 - description: master clock source 3
54 - description: PLL clock source for 8kHz series
55 - description: PLL clock source for 11kHz series
58 clock-names:
60 - items:
61 - const: bus
62 - const: mclk0
63 - const: mclk1
64 - const: mclk2
65 - const: mclk3
66 - const: pll8k
67 - const: pll11k
69 - items:
70 - const: bus
71 - const: mclk1
72 - const: mclk2
73 - const: mclk3
74 - const: pll8k
75 - const: pll11k
80 - description: DMA controller phandle and request line for RX
81 - description: DMA controller phandle and request line for TX
83 dma-names:
85 - const: rx
86 - const: tx
90 - description: receive and transmit interrupt
92 big-endian:
94 required if all the SAI registers are big-endian rather than little-endian.
98 $ref: /schemas/types.yaml#/definitions/uint32-matrix
104 - description: format Default(0), I2S(1) or PDM(2)
106 - description: dataline mask for 'rx'
107 - description: dataline mask for 'tx'
109 fsl,sai-mclk-direction-output:
113 fsl,sai-synchronous-rx:
120 fsl,sai-asynchronous:
125 If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
131 fsl,shared-interrupt:
135 lsb-first:
143 "#sound-dai-cells":
148 - $ref: dai-common.yaml#
149 - if:
151 - fsl,sai-asynchronous
154 fsl,sai-synchronous-rx: false
157 - compatible
158 - reg
159 - clocks
160 - clock-names
161 - dmas
162 - dma-names
163 - interrupts
168 - |
169 #include <dt-bindings/interrupt-controller/arm-gic.h>
170 #include <dt-bindings/clock/vf610-clock.h>
172 compatible = "fsl,vf610-sai";
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_sai2_1>;
180 clock-names = "bus", "mclk1", "mclk2", "mclk3";
181 dma-names = "rx", "tx";
183 big-endian;
184 lsb-first;
187 - |
188 #include <dt-bindings/interrupt-controller/arm-gic.h>
189 #include <dt-bindings/clock/imx8mm-clock.h>
191 compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
198 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
200 dma-names = "rx", "tx";
202 #sound-dai-cells = <0>;