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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,pch-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCH MSI Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson LS7A family of PCH for
14 transforming interrupts from PCIe MSI into HyperTransport vectorized
19 const: loongson,pch-msi-1.0
22 maxItems: 1
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/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片組的主中
16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在這種模型裏面，IPI（Inter-Processor Interrupt）和CPU本地時鐘中斷直接發送到CPUINTC，
27 CPU串口（UARTs）中斷髮送到LIOINTC，而其他所有設備的中斷則分別發送到所連接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
30 +-----+ +---------+ +-------+
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/linux/arch/mips/boot/dts/loongson/
H A Dloongson64c_4core_ls7a.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "loongson64c-package.dtsi"
6 #include "ls7a-pch.dtsi"
9 compatible = "loongson,loongson64c-4core-ls7a";
13 htvec: interrupt-controller@efdfb000080 {
14 compatible = "loongson,htvec-1.0";
16 interrupt-controller;
17 #interrupt-cells = <1>;
19 interrupt-parent = <&liointc>;
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H A Dloongson64g_4core_ls7a.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "loongson64g-package.dtsi"
6 #include "ls7a-pch.dtsi"
9 compatible = "loongson,loongson64g-4core-ls7a";
13 htvec: interrupt-controller@efdfb000080 {
14 compatible = "loongson,htvec-1.0";
16 interrupt-controller;
17 #interrupt-cells = <1>;
19 interrupt-parent = <&liointc>;
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/linux/drivers/irqchip/
H A Dirq-loongson-pch-msi.c1 // SPDX-License-Identifier: GPL-2.0
4 * Loongson PCH MSI support
7 #define pr_fmt(fmt) "pch-msi: " fmt
10 #include <linux/msi.h>
18 #include <linux/irqchip/irq-msi-lib.h>
19 #include "irq-loongson.h"
37 mutex_lock(&priv->msi_map_lock); in pch_msi_allocate_hwirq()
39 first = bitmap_find_free_region(priv->msi_map, priv->num_irqs, in pch_msi_allocate_hwirq()
42 mutex_unlock(&priv->msi_map_lock); in pch_msi_allocate_hwirq()
43 return -ENOSPC; in pch_msi_allocate_hwirq()
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/linux/Documentation/PCI/
H A Dboot-interrupts.rst1 .. SPDX-License-Identifier: GPL-2.0
7 :Author: - Sean V Kelley <sean.v.kelley@linux.intel.com>
12 On PCI Express, interrupts are represented with either MSI or inbound
13 interrupt messages (Assert_INTx/Deassert_INTx). The integrated IO-APIC in a
15 MSI interrupts. If the IO-APIC is disabled (via the mask bits in the
16 IO-APIC table entries), the messages are routed to the legacy PCH. This
17 in-band interrupt mechanism was traditionally necessary for systems that
18 did not support the IO-APIC and for boot. Intel in the past has used the
20 protocol describes this in-band legacy wire-interrupt INTx mechanism for
21 I/O devices to signal PCI-style level interrupts. The subsequent paragraphs
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/linux/drivers/ata/
H A Dahci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ahci.c - AHCI SATA support
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
25 #include <linux/dma-mapping.h>
32 #include <linux/ahci-remap.h>
33 #include <linux/io-64-nonatomic-lo-hi.h>
272 { PCI_VDEVICE(INTEL, 0x06d6), board_ahci_pcs_quirk }, /* Comet Lake PCH-H RAID */
282 { PCI_VDEVICE(INTEL, 0x27c6), board_ahci_pcs_quirk }, /* ICH7-M DH */
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H A Data_piix.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ata_piix.c - Intel PATA/SATA controllers
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2005 Red Hat Inc
10 * Copyright 2003-2005 Jeff Garzik
14 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
15 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
19 * as Documentation/driver-api/libata.rst
40 * PIIX4 errata #9 - Only on ultra obscure hw
41 * ICH3 errata #13 - Not observed to affect real hw
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/linux/arch/loongarch/boot/dts/
H A Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu0: cpu@1 {
34 ref_100m: clock-ref-100m {
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/linux/drivers/pci/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
22 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
41 if (test_bit(PCI_LINK_LBMS_SEEN, &dev->priv_flags)) in pcie_lbms_seen()
102 int ret = -ENOTTY; in pcie_failed_link_retrain()
105 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
112 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
173 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
174 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
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/linux/sound/hda/controllers/
H A Dintel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * hda_intel.c - Implementation of primary alsa driver code base
27 #include <linux/dma-mapping.h>
51 #include <sound/intel-dsp-config.h>
54 #include <linux/apple-gmu
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/linux/Documentation/hid/
H A Dintel-thc-hid.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Touch Host Controller is the name of the IP block in PCH that interface with Touch Devices (ex:
10 - A natively half-duplex Quad I/O capable SPI master
11 - Low latency I2C interface to support HIDI2C compliant devices
12 - A HW sequencer with RW DMA capability to system memory
25 1. Overview
29 -------------------------------
31 Below diagram illustrates the high-level architecture of THC software/hardware stack, which is fully
36 ----------------------------------------------
37 | +-----------------------------------+ |
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/linux/drivers/platform/x86/
H A Dintel_ips.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2009-2010 Intel Corporation
10 * Some Intel Ibex Peak based platforms support so-called "intelligent
34 * - dual MCP configs
37 * - handle CPU hotplug
38 * - provide turbo enable/disable api
41 * - CDI 403777, 403778 - Auburndale EDS vol 1 & 2
42 * - CDI 401376 - Ibex Peak EDS
43 * - ref 26037, 26641 - IPS BIOS spec
44 * - ref 26489 - Nehalem BIOS writer's guide
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/linux/arch/x86/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
26 # Options that are inherently 64-bit kernel only:
56 # ported to 32-bit as well. )
158 # Word-size accesses may read uninitialized data past the trailing \0
342 default "elf32-i386" if X86_32
343 default "elf64-x86-64" if X86_64
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/linux/Documentation/sound/
H A Dalsa-configuration.rst2 Advanced Linux Sound Architecture - Driver Configuration guide
38 ----------
47 limiting card index for auto-loading (1-8);
48 Default: 1;
49 For auto-loading more than one card, specify this option
50 together with snd-card-X aliases.
57 (0 = disable debug prints, 1 = normal debug messages,
63 Module snd-pcm-oss
64 ------------------
70 PCM device number maps assigned to the 1st OSS device;
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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