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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmstar,mst-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark-PK Tsai <mark-pk.tsai@mediatek.com>
21 const: mstar,mst-intc
23 interrupt-controller: true
25 "#interrupt-cells":
33 mstar,irqs-map-range:
35 The range <start, end> of parent interrupt controller's interrupt
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/freebsd/sys/x86/include/
H A Dintr_machdep.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
36 * indices into a interrupt source array to map I/O interrupts to a
38 * controller or an MSI interrupt. The 16 ISA IRQs are assigned fixed
42 * the IRQs are not used, so the total number of IRQ values reserved
45 * The first 16 IRQs (0 - 15) are reserved for ISA IRQs. Interrupt
46 * pins on I/O APICs for non-ISA interrupts use IRQ values starting at
52 * of the I/O APIC range. When running under the Xen Hypervisor, an
53 * additional range of IRQ values are available for binding to event
101 * An interrupt source. The upper-layer code uses the PIC methods to
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/freebsd/sys/contrib/device-tree/src/arm/sigmastar/
H A Dmstar-v7.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
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/freebsd/sys/x86/x86/
H A Dnexus.c1 /*-
190 * - IRQ resource creation should be moved to the PIC/APIC driver. in nexus_init_resources()
191 * - DRQ resource creation should be moved to the DMAC driver. in nexus_init_resources()
192 * - The above should be sorted to probe earlier than any child buses. in nexus_init_resources()
194 * - Leave I/O and memory creation here, as child probes may need them. in nexus_init_resources()
200 * of PCI->ISA bridges. There would be multiple sets of IRQs on in nexus_init_resources()
201 * multi-ISA-bus systems. PCI interrupts are routed to the ISA in nexus_init_resources()
208 irq_rman.rm_end = num_io_irqs - 1; in nexus_init_resources()
213 * We search for regions of existing IRQs and add those to the IRQ in nexus_init_resources()
223 * PCI->ISA bridge and the channels can be duplicated if there are in nexus_init_resources()
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H A Dlocal_apic.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
15 * 3. Neither the name of the author nor the names of any co-contributors
98 * I/O interrupts use non-negative IRQ values. These values are used
99 * to mark unused IDT entries or IDT entries reserved for a non-I/O
102 #define IRQ_FREE -1
103 #define IRQ_TIMER -2
104 #define IRQ_SYSCALL -3
105 #define IRQ_DTRACE_RET -4
106 #define IRQ_EVTCHN -5
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H A Dmptable.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
110 /* From MP spec v1.4, table 4-8. */
133 /* From MP spec v1.4, table 5-1. */
163 static int pci0 = -1;
224 return (-1); in search_for_sig()
244 u_char *end = (u_char *)(mpct) + mpct->base_table_length; in compute_entry_count()
263 mpct->entry_count = (uint16_t)(nentries); in compute_entry_count()
285 target = (u_int32_t) ((basemem * 1024) - 0x400); in mptable_probe()
299 * address is present in the system memory map. Some VM systems in mptable_probe()
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/freebsd/usr.sbin/bhyve/aarch64/
H A Dfdt.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
97 fdt_property_string(fdt, "enable-method", "psci"); in add_cpu()
107 /* XXX: Needed given the root #address-cells? */ in add_cpus()
108 fdt_property_u32(fdt, "#address-cells", 2); in add_cpus()
109 fdt_property_u32(fdt, "#size-cells", 0); in add_cpus()
129 /* Add the memory reserve map (needed even if none is reserved) */ in fdt_init()
136 fdt_property_u32(fdt, "#address-cells", 2); in fdt_init()
137 fdt_property_u32(fdt, "#size-cells", 2); in fdt_init()
140 fdt_property_string(fdt, "stdout-path", "serial0:115200n8"); in fdt_init()
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/freebsd/sys/contrib/dev/athk/ath11k/
H A Dahb.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
11 #include <linux/dma-mapping.h>
27 { .compatible = "qcom,ipq8074-wifi",
30 { .compatible = "qcom,ipq6018-wifi",
33 { .compatible = "qcom,wcn6750-wifi",
36 { .compatible = "qcom,ipq5018-wifi",
47 "misc-pulse1",
48 "misc-latch",
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/freebsd/sys/dev/pci/
H A Dpci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
88 (((cfg)->hdrtype == PCIM_HDRTYPE_NORMAL && reg == PCIR_BIOS) || \
89 ((cfg)->hdrtype == PCIM_HDRTYPE_BRIDGE && reg == PCIR_BIOS_1))
236 #define PCI_QUIRK_MAP_REG 1 /* PCI map register in weird place */
237 #define PCI_QUIRK_DISABLE_MSI 2 /* Neither MSI nor MSI-X work */
239 #define PCI_QUIRK_UNMAP_REG 4 /* Ignore PCI map register */
240 #define PCI_QUIRK_DISABLE_MSIX 5 /* MSI-X doesn't work */
243 #define PCI_QUIRK_DISABLE_FLR 8 /* Function-Level Reset (FLR) not working. */
249 /* The Intel 82371AB and 82443MX have a map register at offset 0x90. */
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H A Dpci_dw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
64 #define DBI_WR1(sc, reg, val) pci_dw_dbi_wr1((sc)->dev, reg, val)
65 #define DBI_WR2(sc, reg, val) pci_dw_dbi_wr2((sc)->dev, reg, val)
66 #define DBI_WR4(sc, reg, val) pci_dw_dbi_wr4((sc)->dev, reg, val)
67 #define DBI_RD1(sc, reg) pci_dw_dbi_rd1((sc)->dev, reg)
68 #define DBI_RD2(sc, reg) pci_dw_dbi_rd2((sc)->dev, reg)
69 #define DBI_RD4(sc, reg) pci_dw_dbi_rd4((sc)->dev, reg)
72 bus_write_4((sc)->iatu_ur_res, (sc)->iatu_ur_offset + (reg), (val))
74 bus_read_4((sc)->iatu_ur_res, (sc)->iatu_ur_offset + (reg))
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H A Dpci_pci.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
147 "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
151 * sub-allocated from one of our window resource managers.
158 if (rman_is_region_manager(r, &sc->io.rman)) in pcib_get_resource_window()
159 return (&sc->io); in pcib_get_resource_window()
164 rman_is_region_manager(r, &sc->pmem.rman)) in pcib_get_resource_window()
165 return (&sc->pmem); in pcib_get_resource_window()
166 if (rman_is_region_manager(r, &sc->mem.rman)) in pcib_get_resource_window()
167 return (&sc->mem); in pcib_get_resource_window()
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/freebsd/sys/arm/mv/
H A Dmv_pci.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
6 * Copyright (c) 2010-2015 Semihalf
40 * Marvell integrated PCI/PCI-Express controller driver.
87 * Code and data related to fdt-based PCI configuration.
90 * always Marvell-specific so that was deleted and the code now lives here.
103 mv_pci_range_dump(struct mv_pci_range *range) in mv_pci_range_dump() argument
107 printf(" base_pci = 0x%08lx\n", range->base_pci); in mv_pci_range_dump()
108 printf(" base_par = 0x%08lx\n", range->base_parent); in mv_pci_range_dump()
109 printf(" len = 0x%08lx\n", range->len); in mv_pci_range_dump()
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/freebsd/sys/dev/vmd/
H A Dvmd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
81 * By default all VMD devices remap children MSI/MSI-X interrupts into their
99 * MSI-X can use different addresses, but we have limited number of MSI-X
104 "Maximum number of MSI-X vectors per device");
126 for (t = vmd_devs; t->vmd_name != NULL; t++) { in vmd_probe()
127 if (vid == t->vmd_vid && did == t->vmd_did) { in vmd_probe()
128 device_set_desc(dev, t->vmd_name); in vmd_probe()
142 if (sc->psc.bus.rman.rm_end != 0) in vmd_free()
143 rman_fini(&sc->psc.bus.rman); in vmd_free()
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/freebsd/sys/dev/xilinx/
H A Dxlnx_pcib.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
98 { -1, 0 }
113 reg = bus_read_4(sc->res, XLNX_PCIE_RPERRFRR); in xlnx_pcib_clear_err_interrupts()
116 device_printf(sc->dev, "Requested ID: %x\n", in xlnx_pcib_clear_err_interrupts()
118 bus_write_4(sc->res, XLNX_PCIE_RPERRFRR, ~0U); in xlnx_pcib_clear_err_interrupts()
131 fdt_sc = &xlnx_sc->fdt_sc; in xlnx_pcib_intr()
132 sc = &fdt_sc->base; in xlnx_pcib_intr()
134 val = bus_read_4(sc->res, XLNX_PCIE_IDR); in xlnx_pcib_intr()
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/freebsd/sys/arm/arm/
H A Dgic.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
104 ((_sc->typer & GICD_TYPER_SECURITYEXT) == GICD_TYPER_SECURITYEXT)
117 /* be used for MSI/MSI-X interrupts */
119 /* for a MSI/MSI-X interrupt */
127 static u_int sgi_to_ipi[GIC_LAST_SGI - GIC_FIRST_SGI + 1];
131 #define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc)
137 { -1, 0 }
153 bus_read_4((_sc)->gic_res[GIC_RES_CPU], (_reg))
155 bus_write_4((_sc)->gic_res[GIC_RES_CPU], (_reg), (_val))
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/freebsd/sys/arm64/cavium/
H A Dthunder_pcie_pem.c1 /*-
110 * as we want. To support 32-bit cards let's assume
113 * 0x00000000 - 0x000FFFFF IO
114 * 0x00100000 - 0xFFFFFFFF Memory
217 * ARM64TODO Workaround - otherwise an em(4) interface appears to be in thunder_pem_maxslots()
239 *result = sc->id; in thunder_pem_read_ivar()
262 return (pci_domain_activate_bus(sc->id, child, r)); in thunder_pem_activate_resource()
280 return (pci_domain_deactivate_bus(sc->id, child, r)); in thunder_pem_deactivate_resource()
291 struct resource_map_request *argsp, struct resource_map *map) in thunder_pem_map_resource() argument
316 start = range_addr_pci_to_phys(sc->ranges, start); in thunder_pem_map_resource()
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/freebsd/sys/powerpc/mpc85xx/
H A Dpci_mpc85xx.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright 2006-2007 by Juniper Networks.
94 #define REG_PITAR(n) (0x0e00 - 0x20 * (n))
95 #define REG_PIWBAR(n) (0x0e08 - 0x20 * (n))
96 #define REG_PIWBEAR(n) (0x0e0c - 0x20 * (n))
97 #define REG_PIWAR(n) (0x0e10 - 0x20 * (n))
138 #define FSL_NUM_MSIS 256 /* 8 registers of 32 bits (8 hardware IRQs) */
139 #define PCI_SLOT_FIRST 0x1 /* used to be 0x11 but qemu-ppce500 starts from 0x1 */
163 uint8_t sc_pcie_capreg; /* PCI-E Capability Reg Set */
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/freebsd/sys/arm64/rockchip/
H A Drk_pcie.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 #define ATU_OB_REGION_0_SIZE (( ATU_OB_REGIONS - 1) * ATU_OB_REGION_SIZE)
179 #define APB_WR4(_sc, _r, _v) bus_write_4((_sc)->apb_mem_res, (_r), (_v))
180 #define APB_RD4(_sc, _r) bus_read_4((_sc)->apb_mem_res, (_r))
240 {"rockchip,rk3399-pcie", 1},
258 val = bus_read_4(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read()
261 val = bus_read_2(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read()
264 val = bus_read_1(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read()
286 bus_write_4(sc->apb_mem_res, base + reg, val); in rk_pcie_local_cfg_write()
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cell
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/freebsd/sys/dev/acpica/
H A Dacpi_hpet.c1 /*-
2 * Copyright (c) 2005 Poul-Henning Kamp
142 sc = tc->tc_priv; in hpet_get_timecount()
143 return (bus_read_4(sc->mem_res, HPET_MAIN_COUNTER)); in hpet_get_timecount()
151 sc = tc->tc_priv; in hpet_vdso_timehands()
152 vdso_th->th_algo = VDSO_TH_ALGO_X86_HPET; in hpet_vdso_timehands()
153 vdso_th->th_x86_shift = 0; in hpet_vdso_timehands()
154 vdso_th->th_x86_hpet_idx = device_get_unit(sc->dev); in hpet_vdso_timehands()
155 vdso_th->th_x86_pvc_last_systime = 0; in hpet_vdso_timehands()
156 vdso_th->th_x86_pvc_stable_mask = 0; in hpet_vdso_timehands()
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/freebsd/sys/dev/dpaa2/
H A Ddpaa2_rc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2022 Dmitry Salychev
112 if (dinfo->portal) in dpaa2_rc_detach()
113 dpaa2_mcp_free_portal(dinfo->portal); in dpaa2_rc_detach()
130 sc->dev = dev; in dpaa2_rc_attach()
131 sc->unit = device_get_unit(dev); in dpaa2_rc_attach()
133 if (sc->unit == 0) { in dpaa2_rc_attach()
155 dinfo->pdev = pdev; in dpaa2_rc_attach()
156 dinfo->dev = dev; in dpaa2_rc_attach()
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/freebsd/sys/kern/
H A Dsubr_intr.c1 /*-
2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
5 * Copyright (c) 2015-2016 The FreeBSD Foundation
35 * New-style Interrupt Framework
37 * TODO: - add support for disconnected PICs.
38 * - to support IPI (PPI) enabling on other CPUs if already started.
39 * - to complete things for removable PICs.
172 "Number of IRQs");
201 * - 2 counters for each I/O interrupt. in intr_irq_init()
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
29 Frame Processing Manager memory map (0xc3000 from the
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/freebsd/sys/contrib/dev/athk/ath12k/
H A Dpci.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
38 * 4K - 32 = 0xFE0
68 "mhi-er0",
69 "mhi-er1",
86 "host2wbm-desc-feed",
87 "host2reo-re-injection",
88 "host2reo-command",
89 "host2rxdma-monitor-ring3",
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dsocrates.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <0x8000>; // L1, 32K
35 i-cache-size = <0x8000>; // L1, 32K
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