Lines Matching +full:irqs +full:- +full:map +full:- +full:range

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
36  * indices into a interrupt source array to map I/O interrupts to a
38  * controller or an MSI interrupt.  The 16 ISA IRQs are assigned fixed
42  * the IRQs are not used, so the total number of IRQ values reserved
45  * The first 16 IRQs (0 - 15) are reserved for ISA IRQs.  Interrupt
46  * pins on I/O APICs for non-ISA interrupts use IRQ values starting at
52  * of the I/O APIC range.  When running under the Xen Hypervisor, an
53  * additional range of IRQ values are available for binding to event
101  * An interrupt source.  The upper-layer code uses the PIC methods to
102  * control a given source.  The lower-layer PIC drivers can store additional
156 int	msi_alloc(device_t dev, int count, int maxcount, int *irqs);
159 int	msi_release(int *irqs, int count);