Home
last modified time | relevance | path

Searched full:ipq5332 (Results 1 – 25 of 26) sorted by relevance

12

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,ipq5332-gcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424
14 domains on IPQ5332 and IPQ5424.
17 include/dt-bindings/clock/qcom,gcc-ipq5332.h
23 - qcom,ipq5332-gcc
51 const: qcom,ipq5332-gcc
73 compatible = "qcom,ipq5332-gcc";
H A Dqcom,a53pll.yaml21 - qcom,ipq5332-a53pll
H A Dqcom,ipq9574-cmn-pll.yaml28 - qcom,ipq5332-cmn-pll
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,ipq5332-uniphy-pcie-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,ipq5332-uniphy-pcie-phy.yaml#
14 PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs
20 - qcom,ipq5332-uniphy-pcie-phy
76 - qcom,ipq5332-uniphy-pcie-phy
91 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
94 compatible = "qcom,ipq5332-uniphy-pcie-phy";
H A Dqcom,ipq5332-usb-hsphy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
15 IPQ5018, IPQ5332 SoCs.
22 - qcom,ipq5332-usb-hsphy
48 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
50 compatible = "qcom,ipq5332-usb-hsphy";
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332-rdp474.dts3 * IPQ5332 RDP474 board device tree source
10 #include "ipq5332-rdp-common.dtsi"
13 model = "Qualcomm Technologies, Inc. IPQ5332 MI01.9";
14 compatible = "qcom,ipq5332-ap-mi01.9", "qcom,ipq5332";
H A Dipq5332-rdp468.dts3 * IPQ5332 RDP468 board device tree source
10 #include "ipq5332-rdp-common.dtsi"
13 model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6";
14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
/linux/include/dt-bindings/clock/
H A Dqcom,ipq5332-cmn-pll.h12 /* The output clocks from CMN PLL of IPQ5332. */
/linux/Documentation/devicetree/bindings/thermal/
H A Dqcom-tsens.yaml96 - qcom,ipq5332-tsens
307 - qcom,ipq5332-tsens
324 - qcom,ipq5332-tsens
/linux/drivers/clk/qcom/
H A Dapss-ipq-pll.c50 * The register offsets of the Stromer Plus PLL used in IPQ5332
229 { .compatible = "qcom,ipq5332-a53pll", .data = &ipq5332_pll_data },
H A Dipq-cmn-pll.c23 * On the IPQ5332 SoC, the CMN PLL provides a single 50 MHZ clock output to
58 #include <dt-bindings/clock/qcom,ipq5332-cmn-pll.h>
486 { .compatible = "qcom,ipq5332-cmn-pll", .data = &ipq5332_output_clks },
H A DMakefile67 obj-$(CONFIG_IPQ_GCC_5332) += gcc-ipq5332.o
H A Dgcc-ipq5332.c12 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
13 #include <dt-bindings/interconnect/qcom,ipq5332.h>
3299 { .compatible = "qcom,ipq5332-gcc" },
3307 .name = "gcc-ipq5332",
3325 MODULE_DESCRIPTION("QTI GCC IPQ5332 Driver");
H A DKconfig546 tristate "IPQ5332 Global Clock Controller"
550 Support for the global clock controller on ipq5332 devices.
/linux/drivers/net/wireless/ath/ath12k/
H A DKconfig23 Enable support for Ath12k AHB bus chipsets, example IPQ5332.
/linux/Documentation/devicetree/bindings/spi/
H A Dqcom,spi-qpic-snand.yaml29 - qcom,ipq5332-snand
/linux/drivers/net/wireless/ath/ath12k/wifi7/
H A Dahb.c47 { .compatible = "qcom,ipq5332-wifi",
H A Dhw.c634 .name = "ipq5332 hw1.0",
637 .dir = "IPQ5332/hw1.0",
/linux/drivers/pinctrl/qcom/
H A DKconfig.msm89 tristate "Qualcomm IPQ5332 pin controller driver"
95 Technologies Inc IPQ5332 platform.
H A DMakefile13 obj-$(CONFIG_PINCTRL_IPQ5332) += pinctrl-ipq5332.o
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dqcom-cpufreq-nvmem.yaml30 - qcom,ipq5332
/linux/drivers/phy/qualcomm/
H A DKconfig167 is used with PCIe controllers on Qualcomm IPQ5332 chips. It
H A Dphy-qcom-m31.c332 { .compatible = "qcom,ipq5332-usb-hsphy", .data = &m31_ipq5332_data },
H A Dphy-qcom-uniphy-pcie-28lp.c260 .compatible = "qcom,ipq5332-uniphy-pcie-phy",
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml23 - qcom,ipq5332-apcs-apps-global

12