1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_IPQ5332_CMN_PLL_H 7 #define _DT_BINDINGS_CLK_QCOM_IPQ5332_CMN_PLL_H 8 9 /* CMN PLL core clock. */ 10 #define IPQ5332_CMN_PLL_CLK 0 11 12 /* The output clocks from CMN PLL of IPQ5332. */ 13 #define IPQ5332_XO_24MHZ_CLK 1 14 #define IPQ5332_SLEEP_32KHZ_CLK 2 15 #define IPQ5332_PCS_31P25MHZ_CLK 3 16 #define IPQ5332_NSS_300MHZ_CLK 4 17 #define IPQ5332_PPE_200MHZ_CLK 5 18 #define IPQ5332_ETH_50MHZ_CLK 6 19 #endif 20