xref: /linux/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml (revision 5722a6cecfff3e381b96bbbd7e9b3911731e80d9) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QPIC NAND controller
8
9maintainers:
10  - Md sadre Alam <quic_mdalam@quicinc.com>
11
12description:
13  The QCOM QPIC-SPI-NAND flash controller is an extended version of
14  the QCOM QPIC NAND flash controller. It can work both in serial
15  and parallel mode. It supports typical SPI-NAND page cache
16  operations in single, dual or quad IO mode with pipelined ECC
17  encoding/decoding using the QPIC ECC HW engine.
18
19allOf:
20  - $ref: /schemas/spi/spi-controller.yaml#
21
22properties:
23  compatible:
24    oneOf:
25      - items:
26          - enum:
27              - qcom,ipq5018-snand
28          - const: qcom,ipq9574-snand
29      - const: qcom,ipq9574-snand
30
31  reg:
32    maxItems: 1
33
34  clocks:
35    maxItems: 3
36
37  clock-names:
38    items:
39      - const: core
40      - const: aon
41      - const: iom
42
43  dmas:
44    items:
45      - description: tx DMA channel
46      - description: rx DMA channel
47      - description: cmd DMA channel
48
49  dma-names:
50    items:
51      - const: tx
52      - const: rx
53      - const: cmd
54
55required:
56  - compatible
57  - reg
58  - clocks
59  - clock-names
60
61unevaluatedProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
66    spi@79b0000 {
67        compatible = "qcom,ipq9574-snand";
68        reg = <0x1ac00000 0x800>;
69
70        clocks = <&gcc GCC_QPIC_CLK>,
71                 <&gcc GCC_QPIC_AHB_CLK>,
72                 <&gcc GCC_QPIC_IO_MACRO_CLK>;
73        clock-names = "core", "aon", "iom";
74
75        #address-cells = <1>;
76        #size-cells = <0>;
77
78        flash@0 {
79            compatible = "spi-nand";
80            reg = <0>;
81            #address-cells = <1>;
82            #size-cells = <1>;
83            nand-ecc-engine = <&qpic_nand>;
84            nand-ecc-strength = <4>;
85            nand-ecc-step-size = <512>;
86        };
87    };
88