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Revision tags: v7.2, v7.2-rc7, v7.2-rc6, v7.2-rc5, v7.2-rc4 |
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b2128290 |
| 18-Jul-2026 |
Rob Clark <robin.clark@oss.qualcomm.com> |
Merge remote-tracking branch 'drm/drm-next' into msm-next-backmerge
Backmerge of drm-next, mainly to pick up dt bindings docs updates to avoid conflicts.
Signed-off-by: Rob Clark <robin.clark@oss.q
Merge remote-tracking branch 'drm/drm-next' into msm-next-backmerge
Backmerge of drm-next, mainly to pick up dt bindings docs updates to avoid conflicts.
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
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502d4577 |
| 26-Aug-2026 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Mostly the usual clk driver updates and new SoC additions plus non-critic
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Mostly the usual clk driver updates and new SoC additions plus non-critical data fixes for things that weren't used yet.
One thing that's new here in the core is SSC spread spectrum support (SSC) in the clk provider API. The idea is that DT authors will configure SSC for certain clks and they'll be configured at clk provider registration time or when a consumer device is probed, similar to how we handle assigned clk rates or parents.
On the clk driver side we have Qualcomm adding almost half the diff because they add support for 4 different SoCs and then a long tail of other SoCs like Mediatek, Renesas, Rockchip, SpaceMiT, etc. add more SoC support this time around. Luckily it's mostly clk data for these new SoCs because the actual clk_ops are already there. Beyond the new drivers we get all the little fixups for more compilation coverage or usage of more modern APIs. That all looks normal.
Finally, I kinda buried the lede, I'm bringing on Brian and Jerome to help out with maintaining the clk subsystem. The current working model is already semi-distributed in that silicon vendors typically take care of their drivers and send me pull requests but I'm becoming a bottleneck for new drivers and core framework review because this has become a 100% volunteer effort on my part.
Mike is stepping down after all these years (thanks Mike!) and that jump started the conversation around finding co-maintainers. Brian and Jerome have graciously offered to help me with the work load, meaning in the future they'll be sending pull requests and committing directly to the clk.git tree. They've both been around on the list for a while, I've met them both in person, and they've been making changes to the core clk framework along with helping review patches so I'm pretty confident this will work well.
Core: - devm_clk_bulk_get_enable() consumer API - devm_clk_hw_register_composite_pdata() provider API - Spread Spectrum Clock (SSC) support via DT bindings and provider APIs - Divider clk rounding improved (and tested)
New Drivers: - Cix Sky1 audio subsystem (AUDSS) - UltraRISC DP1000 - MediaTek MT8173 MFG_TOP - Si549 - Aspeed AST2700 PECI - Airoha EN7523 PCIe - Rockchip RV1106 - Mobileye EyeQ7H - Qualcomm Maili GCC, TCSR, RPMh, and video clks - Qualcomm Shikra GCC, RPM, GPU, display, and audio clks - Qualcomm Nord display and graphics clks - Qualcomm Glymur camera and EVA clks - Qualcomm Hawi video clks - Amlogic A9 AO and peripheral clks - Renesas R-Car X5H (R8A78000) CPG"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (269 commits) clk: microchip: mpfs: fix regmap_update_bits() mask/val order clk: visconti: Make sure clk_init_data is fully initialized clk: ti: Make sure clk_init_data is fully initialized MAINTAINERS: Add Brian Masney and Jerome Brunet as co-maintainers for clk subsystem Drop Michael Turquette's clk maintainer entry clk: ti: composite: resolve parent clocks by DT index, not by name clk: ti: mux: resolve parent clocks by DT index, not by name clk: devres: fix cleanup in devm_clk_get_optional_enabled_with_rate() dt-bindings: clock: ti,keystone-gate: Convert to DT schema dt-bindings: clock: ti: Convert APLL clock to DT schema clk: zynq: pll: Fix kernel-doc after determine_rate() conversion dt-bindings: clock: ti,clockdomain: Convert to DT schema dt-bindings: clock: Correct white-space style clk: samsung: Don't include <linux/mod_devicetable.h> clk: at91: Read "reg" with helper clk: renesas: Add R-Car X5H CPG driver clk: rockchip: rk3576: fix source muxes for SPI0..SPI4 clk: rockchip: Add clock controller for the RV1106 dt-bindings: clock: rockchip: Add RV1106 CRU support dt-bindings: clock: Document Renesas R-Car X5H Clock Pulse Generator ...
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5d650f82 |
| 21-Aug-2026 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-imx', 'clk-rockchip', 'clk-samsung', 'clk-qcom' and 'clk-allwinner' into clk-next
* clk-imx: clk: imx95-blk-ctl: Fix REFCLK rise-fall mismatch on i.MX95 clk: imx95-blk-ctl: A
Merge branches 'clk-imx', 'clk-rockchip', 'clk-samsung', 'clk-qcom' and 'clk-allwinner' into clk-next
* clk-imx: clk: imx95-blk-ctl: Fix REFCLK rise-fall mismatch on i.MX95 clk: imx95-blk-ctl: Add func_out_en clock for i.MX9x PCIe clk: imx: imx8qxp: add missing MODULE_DEVICE_TABLE() clk: imx: imx8qxp-lpcg: add missing MODULE_DEVICE_TABLE() clk: imx: Add audio PLL debugfs for K-divider control
* clk-rockchip: clk: rockchip: rk3576: fix source muxes for SPI0..SPI4 clk: rockchip: Add clock controller for the RV1106 dt-bindings: clock: rockchip: Add RV1106 CRU support clk: rockchip: Fractional PLL coefficient on RK3588/RK3576 is two's complement clk: rockchip: Fix the fractional part denominator on RK3588/RK3576 PLLs clk: rockchip: rk3588: Allow VP2 the same sourcing options as other VPs clk: rockchip: rk3588: Don't change PLL rates when setting dclk_vop2_src
* clk-samsung: clk: samsung: Don't include <linux/mod_devicetable.h> clk: samsung: pll: use kzalloc_flex clk: samsung: cpu: use kzalloc_flex clk: samsung: use kzalloc_flex clk: samsung: exynos990: Fix PERIS gate clock parents clk: samsung: exynos990: Add PERIS TMU_SUB_PCLK gate dt-bindings: clock: exynos990: Add CLK_GOUT_PERIS_TMU_SUB_PCLK
* clk-qcom: (94 commits) clk: qcom: Add support for Qualcomm GPU Clock Controller on Shikra clk: qcom: Return expected ENOMEM error on dynamic allocation failure clk: qcom: apss-ipq-pll: Add IPQ5210 support dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible clk: qcom: Add support for videocc driver on Qualcomm Maili SoC dt-bindings: clock: qcom: Add Qualcomm Maili video clock controller dt-bindings: clock: qcom: Add Qualcomm Shikra GPU clock controller dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controller clk: qcom: gpucc-qcm2290: Park RCG's clk source at XO during disable clk: qcom: gpucc-qcm2290: Keep the critical clocks always-on from probe clk: qcom: gpucc-qcm2290: Move to the latest common qcom_cc_probe() model clk: qcom: gpucc-qcm2290: Drop pm_clk handling clk: qcom: qcm2290: Update DISPCC and GPUCC GDSC *wait_val values clk: qcom: qcm2290: Add RETAIN_FF_ENABLE flag for DISPCC and GPUCC GDSCs clk: qcom: qcm2290: Set POLL_CFG_GDSCR flag for DISPCC and GPUCC GDSCs clk: qcom: dispcc-qcm2290: Enable runtime PM support clk: qcom: dispcc-qcm2290: Move to the latest common qcom_cc_probe() model clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe dt-bindings: clock: qcom,qcm2290-dispcc: Add missing power-domains property clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC ...
* clk-allwinner: clk: sunxi-ng: sun6i-rtc: add a733 support clk: sunxi-ng: sun6i-rtc: split main oscillator div and gate clk: sunxi-ng: div: add read-only operation support clk: sunxi-ng: mux: fix determine helper rate propagation clk: sunxi-ng: mux: remove unneeded export clk: sunxi-ng: sun6i-rtc: Add feature bit for IOSC calibration clk: sunxi-ng: sun6i-rtc: clean up DT usage clk: sunxi-ng: fix ccu probe clock unregister on error dt-bindings: rtc: sun6i: add sun60i-a733 support dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
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79b64c74 |
| 12-Aug-2026 |
Stephen Boyd <sboyd@kernel.org> |
Merge tag 'qcom-clk-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson:
Add global, TCSR, RPMh, and video clo
Merge tag 'qcom-clk-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson:
Add global, TCSR, RPMh, and video clock controller support for Maili. Add global, RPM, GPU, display, and audio core clock controller support for Shikra. Add display and graphics clock controllers for Nord.
Add Glymur camera and EVA clock controllers, the IPQ9650 REFGEN clocks, and Hawi video clock controller support. Extend the IPQ5210 APSS PLL and RPM clock support for Agatti.
Enable runtime PM and regulator-backed reference clock handling where needed. Update QCM2290 clock and power-domain handling, critical clock definitions, and arm architecture Kconfig defaults.
Correct MDM9607, MSM8916, MSM8939, SM6115, QCS8300, Kaanapali, and Glymur clock and power-domain handling. Improve GDSC error propagation and teardown.
Update bindings for the added controllers and required power and OPP properties.
* tag 'qcom-clk-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits) clk: qcom: Add support for Qualcomm GPU Clock Controller on Shikra clk: qcom: Return expected ENOMEM error on dynamic allocation failure clk: qcom: apss-ipq-pll: Add IPQ5210 support dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible clk: qcom: Add support for videocc driver on Qualcomm Maili SoC dt-bindings: clock: qcom: Add Qualcomm Maili video clock controller dt-bindings: clock: qcom: Add Qualcomm Shikra GPU clock controller dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controller clk: qcom: gpucc-qcm2290: Park RCG's clk source at XO during disable clk: qcom: gpucc-qcm2290: Keep the critical clocks always-on from probe clk: qcom: gpucc-qcm2290: Move to the latest common qcom_cc_probe() model clk: qcom: gpucc-qcm2290: Drop pm_clk handling clk: qcom: qcm2290: Update DISPCC and GPUCC GDSC *wait_val values clk: qcom: qcm2290: Add RETAIN_FF_ENABLE flag for DISPCC and GPUCC GDSCs clk: qcom: qcm2290: Set POLL_CFG_GDSCR flag for DISPCC and GPUCC GDSCs clk: qcom: dispcc-qcm2290: Enable runtime PM support clk: qcom: dispcc-qcm2290: Move to the latest common qcom_cc_probe() model clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe dt-bindings: clock: qcom,qcm2290-dispcc: Add missing power-domains property clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC ...
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77814921 |
| 17-Jul-2026 |
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> |
clk: qcom: Add support for videocc driver on Qualcomm Maili SoC
Add support for Qualcomm Maili video clock controller driver for video clients to be able to request for videocc clocks.
Reviewed-by:
clk: qcom: Add support for videocc driver on Qualcomm Maili SoC
Add support for Qualcomm Maili video clock controller driver for video clients to be able to request for videocc clocks.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260717-maili_videocc-v3-2-6656694b06a7@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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3e7b0080 |
| 24-Jul-2026 |
Imran Shaik <imran.shaik@oss.qualcomm.com> |
clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC
Add support for Audio Core Clock Controller (AUDIOCORECC) and Audio Core CSR resets on Qualcomm Shikra SoC.
Reviewed-by: Ko
clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC
Add support for Audio Core Clock Controller (AUDIOCORECC) and Audio Core CSR resets on Qualcomm Shikra SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260724-shikra-audiocorecc-v4-2-0a89bb13d817@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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47f2e6e1 |
| 24-Jul-2026 |
Taniya Das <taniya.das@oss.qualcomm.com> |
clk: qcom: gpucc: Add Nord graphics clock controller support
Add support for the GPU clock controllers (GPUCC) on the Qualcomm Nord platform.
The platform includes two GPU clock controller instance
clk: qcom: gpucc: Add Nord graphics clock controller support
Add support for the GPU clock controllers (GPUCC) on the Qualcomm Nord platform.
The platform includes two GPU clock controller instances,GPUCC and GPU2CC. Register support for both controllers, which provide clocks required for the graphics subsystem.
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-6-32b45232217f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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9dcc782e |
| 24-Jul-2026 |
Taniya Das <taniya.das@oss.qualcomm.com> |
clk: qcom: Add Nord display clock controller support
Add support for the display clock controllers (DISPCC) on the Qualcomm Nord platform.
The platform includes two display clock controller instanc
clk: qcom: Add Nord display clock controller support
Add support for the display clock controllers (DISPCC) on the Qualcomm Nord platform.
The platform includes two display clock controller instances, display0 and display1. Register support for both controllers.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-4-32b45232217f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Revision tags: v7.2-rc3, v7.2-rc2 |
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6b150572 |
| 03-Jul-2026 |
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> |
clk: qcom: Add defaults for desired arm64 drivers
Clock controller drivers are essential for booting up SoCs and are not really optional for a given platform. Kernel should not ask users choice of
clk: qcom: Add defaults for desired arm64 drivers
Clock controller drivers are essential for booting up SoCs and are not really optional for a given platform. Kernel should not ask users choice of drivers when that choice is obvious and known to the developers that answer should be 'yes' or 'module'.
Enable drivers for upstreamed or being upstreamed SoCs, which are not yed enabled in defconfig: Glymur, Hawi, Nord, MSM8976, MSM8998 (GPU CC), SC7180, SC8180X, SC8280XP, SC7280, SDM660, QDU1000, SM4450, SM7150, SM8150, SM8450, SM6125, SM6375. Note that main GCC clock controller drivers are usually already enabled for these.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-5-78894525e54a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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d643934c |
| 03-Jul-2026 |
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> |
clk: qcom: Make important ARM32 drivers default
Clock controller drivers are essential for booting up SoCs and are not really optional for a given platform. Kernel should not ask users choice of dr
clk: qcom: Make important ARM32 drivers default
Clock controller drivers are essential for booting up SoCs and are not really optional for a given platform. Kernel should not ask users choice of drivers when that choice is obvious and known to the developers that answer should be 'yes' or 'module'.
Switch all Qualcomm clock controller drivers which are chosen in ARM 32-bit qcom defconfig to a default 'yes'.
This has no impact on ARM32 qcom defconfig and ARM64 defconfig include/generated/autoconf.h, however enables a few drivers for ARM32 multi_v7 defconfig: IPQ_GCC_4019, QCOM_CLK_APCS_SDX55, MSM_LCC_8960, SDX_GCC_55, QCOM_CLK_RPMH as module, IPQ_GCC_806X, IPQ_LCC_806X and QCOM_A7PLL. Enabling these on multi_v7 is expected to properly boot these SoCs with defconfig.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-4-78894525e54a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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5c38f9b7 |
| 03-Jul-2026 |
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> |
clk: qcom: Make important ARM64 drivers default
Clock controller drivers are essential for booting up SoCs and are not really optional for a given platform. Kernel should not ask users choice of dr
clk: qcom: Make important ARM64 drivers default
Clock controller drivers are essential for booting up SoCs and are not really optional for a given platform. Kernel should not ask users choice of drivers when that choice is obvious and known to the developers that answer should be 'yes' or 'module'.
Switch all Qualcomm clock controller drivers which are chosen in defconfig to respective default 'yes' or 'module'.
This has no impact on ARM64 defconfig include/generated/autoconf.h, however changes few drivers for ARM 32-bit:
1. multi_v7_defconfig: Enable QCOM_CLK_RPMH as module, because SDX55 (ARM 32-bit) uses it.
2. qcom_defconfig: Enable QCOM_A53PLL, QCOM_CLK_APCS_MSM8916 and MSM_GCC_8916 as built-in, because MSM8916 is also used ARM 32-bit.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-3-78894525e54a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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9904402c |
| 03-Jul-2026 |
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> |
clk: qcom: Restrict A7PLL and IPQ4019 GCC to ARM
IPQ4019 is ARM 32-bit only SoC and QCOM_A7PLL is used only on SDX55 and SDX65, which are 32-bit as well.
Do not allow building them for ARM64 to mak
clk: qcom: Restrict A7PLL and IPQ4019 GCC to ARM
IPQ4019 is ARM 32-bit only SoC and QCOM_A7PLL is used only on SDX55 and SDX65, which are 32-bit as well.
Do not allow building them for ARM64 to make built kernels smaller and user choices easier.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-2-78894525e54a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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2ce505b4 |
| 03-Jul-2026 |
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> |
clk: qcom: Restrict IPQ5424, IPQ6018,IPQ9574, QCM2290 and others to ARM64
Some clock drivers for IPQ5424, IPQ9574, QCM2290, QDU1000 and SA8775 already depend on ARM64. IPQ6018 is ARM64 only SoC (at
clk: qcom: Restrict IPQ5424, IPQ6018,IPQ9574, QCM2290 and others to ARM64
Some clock drivers for IPQ5424, IPQ9574, QCM2290, QDU1000 and SA8775 already depend on ARM64. IPQ6018 is ARM64 only SoC (at least upstream) so should not be a choice for ARM 32-bit builds, to make kernels smaller and user choices easier.
IPQ_CMN_PLL is used only by the SoCs already having clock controllers restricted to ARM64
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-1-78894525e54a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Revision tags: v7.2-rc1 |
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| #
97255eed |
| 24-Jun-2026 |
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> |
clk: qcom: camcc-glymur: Add camera clock controller driver
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on Glymur platform.
Reviewed-by: Ta
clk: qcom: camcc-glymur: Add camera clock controller driver
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on Glymur platform.
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260624-glymur_camcc-v5-2-a321df74b1a1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Revision tags: v7.1 |
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| #
01cf3e27 |
| 08-Jun-2026 |
Imran Shaik <imran.shaik@oss.qualcomm.com> |
clk: qcom: Add Global clock controller support on Qualcomm Shikra SoC
Add support for Global clock controller (GCC) on Qualcomm Shikra SoC.
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Rev
clk: qcom: Add Global clock controller support on Qualcomm Shikra SoC
Add support for Global clock controller (GCC) on Qualcomm Shikra SoC.
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608-shikra-gcc-rpmcc-clks-v5-4-94cefe092ee3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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edbd5d32 |
| 02-Jul-2026 |
Lin Li <zhuolin.li@oss.qualcomm.com> |
clk: qcom: Add support for VideoCC driver for Hawi
Enable Hawi video clock driver for video SW to be able to control the clocks from the Video SW driver.
Reviewed-by: Konrad Dybcio <konrad.dybcio@o
clk: qcom: Add support for VideoCC driver for Hawi
Enable Hawi video clock driver for video SW to be able to control the clocks from the Video SW driver.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Lin Li <zhuolin.li@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260702-hawi-videocc-v1-2-6c1e640b0954@oss.qualcomm.com [bjorn: Added default m, per request from Krzysztof] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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| #
e291ec81 |
| 17-Jun-2026 |
Taniya Das <taniya.das@oss.qualcomm.com> |
clk: qcom: Add EVA clock controller driver for Glymur SoC
Add the Enhanced Video Analytics (EVA) clock controller driver for the Glymur SoC. The EVACC manages the PLL, RCGs, branch clocks, GDSCs and
clk: qcom: Add EVA clock controller driver for Glymur SoC
Add the Enhanced Video Analytics (EVA) clock controller driver for the Glymur SoC. The EVACC manages the PLL, RCGs, branch clocks, GDSCs and resets for the EVA subsystem which handles vision processing workloads.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260617-evacc_glymur-v2-3-905108dacaaa@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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| #
027dc284 |
| 01-Jul-2026 |
Luca Weiss <luca.weiss@fairphone.com> |
clk: qcom: Don't use all caps for Glymur GPUCC
All other Glymur driver use "Glymur" and not all caps "GLYMUR". Align the prompt and help text.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> R
clk: qcom: Don't use all caps for Glymur GPUCC
All other Glymur driver use "Glymur" and not all caps "GLYMUR". Align the prompt and help text.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260701-glymur-uncaps-v1-1-5f7065348eb2@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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637315cb |
| 18-Aug-2026 |
Paolo Bonzini <pbonzini@redhat.com> |
Merge tag 'kvm-riscv-7.3-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv changes for 7.3
- Svadu/Zicfiss/Zicfilp FWFT support for Guest - Use try_cmpxchg for IMSIC MRIF RMW - More arch
Merge tag 'kvm-riscv-7.3-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv changes for 7.3
- Svadu/Zicfiss/Zicfilp FWFT support for Guest - Use try_cmpxchg for IMSIC MRIF RMW - More arch-specific tracepoints in KVM RISC-V - Eager Page Splitting for KVM RISC-V - Optimize hfence request handling for SMP Guests - Improve dirty log clearing by skipping zero bits in mask - Guard HFENCE range loops against overflow - CPU PM notifiers in KVM RISC-V for non-retentive idle states - Fix kernel-mode vector context save/restore for Guest
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efe86f08 |
| 14-Jul-2026 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
Merge drm/drm-next into drm-xe-next
Sync some i915/display changes
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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6d177908 |
| 30-Jun-2026 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync with v7.2-rc1.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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827b9aab |
| 30-Jun-2026 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next
Backmerging to get drm-misc-next to v7.2-rc1.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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7dd19ada |
| 28-Jun-2026 |
Danilo Krummrich <dakr@kernel.org> |
Merge tag 'v7.2-rc1' into drm-rust-next
Merge v7.2-rc1 into drm-rust-next to start the next cycle.
Devres now requires T: 'static, which conflicts with shmem::Object using Devres<SGTableMap<T, C>>
Merge tag 'v7.2-rc1' into drm-rust-next
Merge v7.2-rc1 into drm-rust-next to start the next cycle.
Devres now requires T: 'static, which conflicts with shmem::Object using Devres<SGTableMap<T, C>> without that bound. Resolve by adding 'static as a supertrait to DriverObject and DeviceContext, which does not restrict any current use cases since DriverObject is always implemented on owned, refcounted types and DeviceContext is a sealed marker trait with only unit-type implementors.
If DriverObject (or DeviceContext) ever becomes lifetime-parameterized (e.g. via a GAT for TTM backed objects), the 'static supertrait can be relaxed at that point.
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
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fab183d6 |
| 17-Aug-2026 |
Tejun Heo <tj@kernel.org> |
sched_ext: Merge branch 'for-7.3-arena-args' into for-7.3
Pull to receive the __arena argument conversion:
67f1f4a48c24 ("sched_ext: Pass kernel arena pointers to ops_cid callbacks") a8dc810968af
sched_ext: Merge branch 'for-7.3-arena-args' into for-7.3
Pull to receive the __arena argument conversion:
67f1f4a48c24 ("sched_ext: Pass kernel arena pointers to ops_cid callbacks") a8dc810968af ("sched_ext: Convert sub-cap kfuncs to __arena cmask arguments") a05c5b5cb5cf ("sched_ext: Convert scx_bpf_cid_override() to __arena array arguments")
along with the bpf-next branch carrying the __arena argument support they depend on.
Conflict in kernel/sched/ext/ext.c between:
c384ab8a0b13 ("sched_ext: Move the config-off sub-cap kfunc stubs into sub.c")
and:
a8dc810968af ("sched_ext: Convert sub-cap kfuncs to __arena cmask arguments")
which updated the stubs in their old ext.c location. Resolved by keeping ext.c without the stubs and applying the prototype conversion to the relocated stubs in sub.c.
Signed-off-by: Tejun Heo <tj@kernel.org>
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872a8f6b |
| 11-Aug-2026 |
Tejun Heo <tj@kernel.org> |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next into for-7.3-arena-args
Pull bpf-next d114bb989367 ("Merge branch 'add-arena-argument-support-to-kfuncs-and-struct
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next into for-7.3-arena-args
Pull bpf-next d114bb989367 ("Merge branch 'add-arena-argument-support-to-kfuncs-and-struct_ops'") to make the __arena and __arena__nullable kfunc and struct_ops argument suffixes available. The suffixed arguments will be used to convert sched_ext kfuncs and struct_ops callbacks that currently pass arena pointers as scalars and rebase them by hand.
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