| /freebsd/sys/dev/mii/ |
| H A D | rgephyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
55 #define RGEPHY_BMCR_FDX 0x0100 /* Duplex mode */
64 #define RGEPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
65 #define RGEPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
66 #define RGEPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
67 #define RGEPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
68 #define RGEPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
69 #define RGEPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
[all …]
|
| H A D | mii.h | 3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
58 #define BMCR_FDX 0x0100 /* Set duplex mode */
69 #define BMSR_100T4 0x8000 /* 100 base T4 capable */
70 #define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
71 #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
72 #define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
73 #define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
74 #define BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
75 #define BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */
[all …]
|
| H A D | ciphyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
51 #define CIPHY_BMCR_FDX 0x0100 /* Duplex mode */
61 #define CIPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
62 #define CIPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
63 #define CIPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
64 #define CIPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
65 #define CIPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
66 #define CIPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
[all …]
|
| H A D | xmphyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
49 #define XMPHY_BMCR_FDX 0x0100 /* Duplex mode */
55 #define XMPHY_BMSR_ANEG 0x0008 /* Autoneg capable */
64 #define XMPHY_ANAR_HDX 0x0040 /* Select half duplex */
65 #define XMPHY_ANAR_FDX 0x0020 /* Select full duplex */
72 #define XMPHY_ANLPAR_HDX 0x0040 /* Select half duplex */
73 #define XMPHY_ANLPAR_FDX 0x0020 /* Select full duplex */
75 #define XMPHY_RF_OK 0x0000 /* No error -- link is good */
[all …]
|
| H A D | brgphyreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
50 #define BRGPHY_BMCR_FDX 0x0100 /* Duplex mode */
63 #define BRGPHY_BMSR_ANEG 0x0008 /* Autoneg capable */
72 #define BRGPHY_ANAR_PC 0x0400 /* Pause capable */
79 #define BRGPHY_ANLPAR_PC 0x0400 /* Pause capable */
89 #define BRGPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */
100 #define BRGPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */
101 #define BRGPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */
[all …]
|
| /freebsd/share/man/man4/ |
| H A D | re.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 NICs based on the 8139C+ and 810xE are capable of 10 and 100Mbps speeds
61 NICs based on the 8169, 816xS, 811xS, 8168 and 8111 are capable of 10, 100
67 features, and use a descriptor-based DMA mechanism.
69 capable of TCP large send (TCP segmentation offload).
71 The 8139C+ is a single-chip solution combining both a 10/100 MAC and PHY.
73 The 816xS, 811xS, 8168 and 8111 are single-chip devices containing both a
76 in both 32-bit PCI and 64-bit PCI models.
[all …]
|
| H A D | bge.4 | 16 .\" 4. Neither the name of the author nor the names of any co-contributors
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
60 All of these NICs are capable of 10, 100 and 1000Mbps speeds over CAT5
61 copper cable, except for the SysKonnect SK-9D41 which supports only
64 It has two R4000 CPU cores and is PCI v2.2 and PCI-X v1.0 compliant.
67 multiple RX and TX DMA rings for QoS applications, rules-based
69 a 256-bit multicast hash filter.
71 provided via value-add firmware updates.
78 Most BCM5700-based cards also use the Broadcom BCM5401 or BCM5411 10/100/1000
[all …]
|
| H A D | xl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
57 and "tornado" bus-master Etherlink XL chips.
59 The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
63 NS 83840A 10/100 PHY for 10/100 Mbps support in full or half-duplex.
64 The 3c905B adapters have built-in autonegotiation logic mapped onto
67 adapters such as the 3c905-TX and 3c905B-TX are capable of 10 or
68 100Mbps data rates in either full or half duplex and can be manually
75 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
[all …]
|
| /freebsd/sys/dev/e1000/ |
| H A D | e1000_defines.h | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
257 #define E1000_CTRL_FD 0x00000001 /* Full duplex.0=half; 1=full */
261 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
263 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
269 #define E1000_CTRL_FRCDPX 0x00001000 /* Force Duplex */
[all …]
|
| H A D | e1000_phy.c | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
65 * e1000_init_phy_ops_generic - Initialize PHY function pointers
68 * Setups up the function pointers to no-op functions
72 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_ops_generic()
76 phy->ops.init_params = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
77 phy->ops.acquire = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
78 phy->ops.check_polarity = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
79 phy->ops.check_reset_block = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
80 phy->ops.commit = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
[all …]
|
| H A D | e1000_mac.c | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * e1000_init_mac_ops_generic - Initialize MAC function pointers
45 * Setups up the function pointers to no-op functions
49 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_ops_generic()
53 mac->ops.init_params = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
54 mac->ops.init_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
55 mac->ops.reset_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
56 mac->ops.setup_physical_interface = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
57 mac->ops.get_bus_info = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
[all …]
|
| H A D | e1000_ich8lan.c | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
36 * 82562G-2 10/100 Network Connection
38 * 82562GT-2 10/100 Network Connection
40 * 82562V-2 10/100 Network Connection
41 * 82566DC-2 Gigabit Network Connection
43 * 82566DM-2 Gigabit Network Connection
50 * 82567LM-2 Gigabit Network Connection
51 * 82567LF-2 Gigabit Network Connection
52 * 82567V-2 Gigabit Network Connection
[all …]
|
| /freebsd/sys/dev/igc/ |
| H A D | igc_defines.h | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */
127 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
128 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
210 #define IGC_CTRL_FD 0x00000001 /* Full duplex.0=half; 1=full */
214 #define IGC_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
216 #define IGC_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
222 #define IGC_CTRL_FRCDPX 0x00001000 /* Force Duplex */
[all …]
|
| H A D | igc_phy.c | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_phy_ops_generic - Initialize PHY function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_ops_generic()
24 phy->ops.init_params = igc_null_ops_generic; in igc_init_phy_ops_generic()
25 phy->ops.acquire = igc_null_ops_generic; in igc_init_phy_ops_generic()
26 phy->ops.check_reset_block = igc_null_ops_generic; in igc_init_phy_ops_generic()
27 phy->ops.force_speed_duplex = igc_null_ops_generic; in igc_init_phy_ops_generic()
28 phy->ops.get_info = igc_null_ops_generic; in igc_init_phy_ops_generic()
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | ti,icssg-prueth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
19 - ti,am642-icssg-prueth # for AM64x SoC family
20 - ti,am654-icssg-prueth # for AM65x SoC family
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
32 dma-names:
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am65-iot2050-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2024
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/net/ti-dp83867.h>
36 stdout-path = "serial3:115200n8";
39 reserved-memory {
40 #address-cells = <2>;
41 #size-cells = <2>;
44 secure_ddr: secure-ddr@9e800000 {
[all …]
|
| /freebsd/contrib/tcpdump/ |
| H A D | print-cdp.c | 31 #include "netdissect-stdinc.h"
56 { 0x10, "L3 capable" },
58 { 0x40, "L1 capable" },
133 ND_PRINT("%s", GET_U_1(cp) ? "full": "half"); in cdp_print_duplex()
141 * appear to be a 1-byte application type followed by a
142 * 2-byte VLAN ID; the 2 bytes of value are unknown
179 (void)nd_printn(ndo, cp + 1, len - 1, NULL); in cdp_print_phys_loc()
193 [ T_DEV_ID ] = { "Device-ID", cdp_print_string, -1, -1 },
194 [ 0x02 ] = { "Address", cdp_print_addr, -1, -1 },
195 [ 0x03 ] = { "Port-ID", cdp_print_string, -1, -1 },
[all …]
|
| /freebsd/sbin/ifconfig/ |
| H A D | ifconfig.8 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-3-Clause
93 .Bl -tag -width indent
120 The format is specified as a comma-separated list of
141 .Bl -tag -width default
145 .Bl -tag -width default -compact
158 Adjust the display of link-level ethernet (MAC) addresses:
160 .Bl -tag -width default -compact
175 .Bl -tag -width default -compact
192 .Bl -tag -width default -compact
[all …]
|
| /freebsd/sys/dev/ixgbe/ |
| H A D | ixgbe_type.h | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * - IXGBE_ERROR_INVALID_STATE
48 * - IXGBE_ERROR_POLLING
53 * - IXGBE_ERROR_CAUTION
58 * - IXGBE_ERROR_SOFTWARE
64 * - IXGBE_ERROR_ARGUMENT
69 * - IXGBE_ERROR_UNSUPPORTED
162 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
419 (0x012300 + (((_i) - 24) * 4)))
[all …]
|
| /freebsd/sys/dev/axgbe/ |
| H A D | xgbe-phy-v2.c | 116 #include "xgbe-common.h"
142 /* Rate-change complete wait/retry count */
275 * Optical specification compliance - denotes wavelength
306 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
307 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
314 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
315 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
334 /* Re-driver related definitions */
407 /* Re-driver support */
429 return (pdata->i2c_if.i2c_xfer(pdata, i2c_op)); in xgbe_phy_i2c_xfer()
[all …]
|
| /freebsd/share/dict/ |
| H A D | web2a | 12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
[all …]
|
| /freebsd/sys/dev/bnxt/bnxt_en/ |
| H A D | hsi_struct_def.h | 1 /*-
34 * Copyright(c) 2001-2025, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
[all …]
|
| /freebsd/contrib/ncurses/misc/ |
| H A D | terminfo.src | 7 # bug-ncurses@gnu.org
19 # under the ncurses MIT-style license. That was the effect of the agreement
30 # In any case, note that almost half of this file is not data but annotations
33 # some portions of the data are derivative work under a compatible MIT-style
36 #------------------------------------------------------------------------------
37 # https://invisible-island.net/ncurses/ncurses.faq.html#terminfo_copying
38 # https://invisible-island.net/personal/copyrights.html#removing_notes
39 #------------------------------------------------------------------------------
48 # Please e-mail changes to terminfo@thyrsus.com; the old termcap@berkeley.edu
54 # This file describes the capabilities of various character-cell terminals,
[all …]
|
| /freebsd/sys/contrib/alpine-hal/eth/ |
| H A D | al_hal_eth_main.c | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
98 /* tx Meta Descriptor defines - MacSec */
105 #define AL_ETH_TX_MACSEC_SECURED_PYLD_LEN_LSB_SHIFT 10 /* Secure Payload Length (0x3FFF for non-S…
364 al_warn("[%s] warn: failed to change state, error %d\n", dma->name, rc); in al_udma_state_set_wait()
376 if (count-- == 0) { in al_udma_state_set_wait()
378 dma->name, al_udma_states_name[new_state]); in al_udma_state_set_wait()
379 return -ETIMEDOUT; in al_udma_state_set_wait()
389 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_data, reg_entry->data); in al_eth_epe_entry_set()
390 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_mask, reg_entry->mask); in al_eth_epe_entry_set()
[all …]
|