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/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,mdp3-rsz.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
19 - enum:
20 - mediatek,mt8183-mdp3-rsz
21 - items:
22 - enum:
[all …]
H A Dmediatek,mdp3-wrot.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
19 - enum:
20 - mediatek,mt8183-mdp3-wrot
21 - items:
22 - enum:
[all …]
H A Dmediatek,mdp3-rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
24 - enum:
25 - mediatek,mt8183-mdp3-rdma
26 - mediatek,mt8188-mdp3-rdma
27 - mediatek,mt8195-mdp3-rdma
[all …]
H A Dmediatek,mdp3-tdshp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Media Data Path 3 Two-Dimensional Sharpness
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
14 Two-Dimensional Sharpness (TDSHP) is a Media Profile Path 3 (MDP3) component
20 - mediatek,mt8195-mdp3-tdshp
22 reg:
[all …]
H A Dmediatek,mdp3-fg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
20 - mediatek,mt8195-mdp3-fg
22 reg:
25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
[all …]
H A Dmediatek,mdp3-hdr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-hdr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
20 - mediatek,mt8195-mdp3-hdr
22 reg:
25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
[all …]
H A Dmediatek,mdp3-stitch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
20 - mediatek,mt8195-mdp3-stitch
22 reg:
25 mediatek,gce-client-reg:
27 The register of display function block to be set by gce. There are 4 arguments,
[all …]
H A Dmediatek,mdp3-tcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
21 - mediatek,mt8195-mdp3-tcc
23 reg:
26 mediatek,gce-client-reg:
28 The register of display function block to be set by gce. There are 4 arguments,
29 such as gce node, subsys id, offset and register size. The subsys id that is
[all …]
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,ccorr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
19 - enum:
20 - mediatek,mt8183-mdp3-ccorr
22 reg:
25 mediatek,gce-client-reg:
26 $ref: /schemas/types.yaml#/definitions/phandle-array
[all …]
H A Dmediatek,wdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
20 - enum:
21 - mediatek,mt8183-mdp3-wdma
23 reg:
26 mediatek,gce-client-reg:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
[all …]
H A Dmediatek,mutex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt6795-disp-mutex
30 - mediatek,mt8167-disp-mutex
[all …]
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,padding.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
24 - mediatek,mt8188-disp-padding
25 - mediatek,mt8195-mdp3-padding
27 reg:
30 power-domains:
[all …]
H A Dmediatek,wdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-wdma
26 - items:
27 - const: mediatek,mt6795-disp-wdma
28 - const: mediatek,mt8173-disp-wdma
[all …]
H A Dmediatek,split.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-split
26 - mediatek,mt8195-mdp3-split
27 - items:
28 - const: mediatek,mt6795-disp-split
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
12 #include <dt-bindings/gce/mediatek,mt6795-gce.h>
13 #include <dt-bindings/memory/mt6795-larb-port.h>
14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
15 #include <dt-bindings/power/mt6795-power.h>
16 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
20 interrupt-parent = <&sysirq>;
[all …]
H A Dmt8173.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mt8173-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/memory/mt8173-larb-port.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mt8173-power.h>
13 #include <dt-bindings/reset/mt8173-resets.h>
14 #include <dt-bindings/gce/mt8173-gce.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
[all …]
/linux/include/linux/soc/mediatek/
H A Dmtk-cmdq.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/mailbox/mtk-cmdq-mailbox.h>
19 * so there are 4 * N (threads) SPRs in GCE that shares the same indexes below.
44 bool reg; member
60 struct mbox_client client; member
67 * cmdq_dev_get_client_reg() - parse cmdq client re
415 cmdq_mbox_destroy(struct cmdq_client * client) cmdq_mbox_destroy() argument
417 cmdq_pkt_create(struct cmdq_client * client,struct cmdq_pkt * pkt,size_t size) cmdq_pkt_create() argument
422 cmdq_pkt_destroy(struct cmdq_client * client,struct cmdq_pkt * pkt) cmdq_pkt_destroy() argument
[all...]
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_padding.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
27 * struct mtk_padding - Basic information of the Padding
29 * @reg: Virtual address of the Padding for CPU to access
37 void __iomem *reg; member
45 return clk_prepare_enable(padding->clk); in mtk_padding_clk_enable()
52 clk_disable_unprepare(padding->clk); in mtk_padding_clk_disable()
60 padding->reg + PADDING_CONTROL_REG); in mtk_padding_start()
67 writel(0, padding->reg + PADDING_PIC_SIZE_REG); in mtk_padding_start()
68 writel(0, padding->reg + PADDING_H_REG); in mtk_padding_start()
[all …]
H A Dmtk_disp_color.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
22 #define DISP_COLOR_START(comp) ((comp)->data->color_offset)
34 * struct mtk_disp_color - DISP_COLOR driver structure
50 return clk_prepare_enable(color->clk); in mtk_color_clk_enable()
57 clk_disable_unprepare(color->clk); in mtk_color_clk_disable()
66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config()
67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
75 color->regs + DISP_COLOR_CFG_MAIN); in mtk_color_start()
76 writel(0x1, color->regs + DISP_COLOR_START(color)); in mtk_color_start()
[all …]
H A Dmtk_disp_aal.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
40 * struct mtk_disp_aal - Display Adaptive Ambient Light driver structure
43 * @cmdq_reg: CMDQ Client register
57 return clk_prepare_enable(aal->clk); in mtk_aal_clk_enable()
64 clk_disable_unprepare(aal->clk); in mtk_aal_clk_disable()
77 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
78 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
82 * mtk_aal_gamma_get_lut_size() - Get gamma LUT size for AAL
91 if (aal->data && aal->data->has_gamma) in mtk_aal_gamma_get_lut_size()
[all …]
H A Dmtk_disp_ccorr.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
47 return clk_prepare_enable(ccorr->clk); in mtk_ccorr_clk_enable()
54 clk_disable_unprepare(ccorr->clk); in mtk_ccorr_clk_disable()
63 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
65 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
73 writel(CCORR_EN, ccorr->regs + DISP_CCORR_EN); in mtk_ccorr_start()
80 writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN); in mtk_ccorr_stop()
92 /* identity value 0x100000000 -> 0x400(mt8183), */ in mtk_ctm_s31_32_to_s1_n()
93 /* identity value 0x100000000 -> 0x800(mt8192), */ in mtk_ctm_s31_32_to_s1_n()
[all …]
H A Dmtk_disp_rdma.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/soc/mediatek/mtk-cmdq.h>
52 #define RDMA_FIFO_SIZE(rdma) ((rdma)->data->fifo_size)
78 * struct mtk_disp_rdma - DISP_RDMA driver structure
96 writel(0x0, priv->regs + DISP_REG_RDMA_INT_STATUS); in mtk_disp_rdma_irq_handler()
98 if (!priv->vblank_cb) in mtk_disp_rdma_irq_handler()
101 priv->vblank_cb(priv->vblank_cb_data); in mtk_disp_rdma_irq_handler()
106 static void rdma_update_bits(struct device *dev, unsigned int reg, in rdma_update_bits() argument
110 unsigned int tmp = readl(rdma->regs + reg); in rdma_update_bits()
113 writel(tmp, rdma->regs + reg); in rdma_update_bits()
[all …]
H A Dmtk_disp_gamma.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
54 * struct mtk_disp_gamma - Display Gamma driver structure
57 * @cmdq_reg: CMDQ Client register
71 return clk_prepare_enable(gamma->clk); in mtk_gamma_clk_enable()
78 clk_disable_unprepare(gamma->clk); in mtk_gamma_clk_disable()
85 if (gamma && gamma->data) in mtk_gamma_get_lut_size()
86 return gamma->data->lut_size; in mtk_gamma_get_lut_size()
93 int last_entry = lut_size - 1; in mtk_gamma_lut_is_descending()
102 * SoCs supporting 12-bits LUTs are using a new register layout that does
[all …]
/linux/drivers/soc/mediatek/
H A Dmtk-mutex.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
14 #include <linux/soc/mediatek/mtk-cmdq.h>
681 * So that MUTEX can not only send a STREAM_DONE event to GCE
814 if (!mtx->mutex[i].claimed) { in mtk_mutex_get()
815 mtx->mutex[i].claimed = true; in mtk_mutex_get()
816 return &mtx->mutex[i]; in mtk_mutex_get()
819 return ERR_PTR(-EBUSY); in mtk_mutex_get()
826 mutex[mutex->id]); in mtk_mutex_put()
[all …]

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