xref: /linux/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml (revision 06d07429858317ded2db7986113a9e0129cd599b)
1*8bf482afSMoudy Ho# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*8bf482afSMoudy Ho%YAML 1.2
3*8bf482afSMoudy Ho---
4*8bf482afSMoudy Ho$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
5*8bf482afSMoudy Ho$schema: http://devicetree.org/meta-schemas/core.yaml#
6*8bf482afSMoudy Ho
7*8bf482afSMoudy Hotitle: MediaTek Media Data Path 3 Two-Dimensional Sharpness
8*8bf482afSMoudy Ho
9*8bf482afSMoudy Homaintainers:
10*8bf482afSMoudy Ho  - Matthias Brugger <matthias.bgg@gmail.com>
11*8bf482afSMoudy Ho  - Moudy Ho <moudy.ho@mediatek.com>
12*8bf482afSMoudy Ho
13*8bf482afSMoudy Hodescription:
14*8bf482afSMoudy Ho  Two-Dimensional Sharpness (TDSHP) is a Media Profile Path 3 (MDP3) component
15*8bf482afSMoudy Ho  used to perform image edge sharpening and enhance vividness and contrast.
16*8bf482afSMoudy Ho
17*8bf482afSMoudy Hoproperties:
18*8bf482afSMoudy Ho  compatible:
19*8bf482afSMoudy Ho    enum:
20*8bf482afSMoudy Ho      - mediatek,mt8195-mdp3-tdshp
21*8bf482afSMoudy Ho
22*8bf482afSMoudy Ho  reg:
23*8bf482afSMoudy Ho    maxItems: 1
24*8bf482afSMoudy Ho
25*8bf482afSMoudy Ho  mediatek,gce-client-reg:
26*8bf482afSMoudy Ho    description:
27*8bf482afSMoudy Ho      The register of display function block to be set by gce. There are 4 arguments,
28*8bf482afSMoudy Ho      such as gce node, subsys id, offset and register size. The subsys id that is
29*8bf482afSMoudy Ho      mapping to the register of display function blocks is defined in the gce header
30*8bf482afSMoudy Ho      include/dt-bindings/gce/<chip>-gce.h of each chips.
31*8bf482afSMoudy Ho    $ref: /schemas/types.yaml#/definitions/phandle-array
32*8bf482afSMoudy Ho    items:
33*8bf482afSMoudy Ho      items:
34*8bf482afSMoudy Ho        - description: phandle of GCE
35*8bf482afSMoudy Ho        - description: GCE subsys id
36*8bf482afSMoudy Ho        - description: register offset
37*8bf482afSMoudy Ho        - description: register size
38*8bf482afSMoudy Ho    maxItems: 1
39*8bf482afSMoudy Ho
40*8bf482afSMoudy Ho  clocks:
41*8bf482afSMoudy Ho    maxItems: 1
42*8bf482afSMoudy Ho
43*8bf482afSMoudy Horequired:
44*8bf482afSMoudy Ho  - compatible
45*8bf482afSMoudy Ho  - reg
46*8bf482afSMoudy Ho  - mediatek,gce-client-reg
47*8bf482afSMoudy Ho  - clocks
48*8bf482afSMoudy Ho
49*8bf482afSMoudy HoadditionalProperties: false
50*8bf482afSMoudy Ho
51*8bf482afSMoudy Hoexamples:
52*8bf482afSMoudy Ho  - |
53*8bf482afSMoudy Ho    #include <dt-bindings/clock/mt8195-clk.h>
54*8bf482afSMoudy Ho    #include <dt-bindings/gce/mt8195-gce.h>
55*8bf482afSMoudy Ho
56*8bf482afSMoudy Ho    display@14007000 {
57*8bf482afSMoudy Ho        compatible = "mediatek,mt8195-mdp3-tdshp";
58*8bf482afSMoudy Ho        reg = <0x14007000 0x1000>;
59*8bf482afSMoudy Ho        mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
60*8bf482afSMoudy Ho        clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>;
61*8bf482afSMoudy Ho    };
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