1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek Display Padding 8 9maintainers: 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 12 13description: 14 Padding provides ability to add pixels to width and height of a layer with 15 specified colors. Due to hardware design, Mixer in VDOSYS1 requires 16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, 17 we need Padding to deal with odd width. 18 Please notice that even if the Padding is in bypass mode, settings in 19 register must be cleared to 0, or undefined behaviors could happen. 20 21properties: 22 compatible: 23 enum: 24 - mediatek,mt8188-disp-padding 25 - mediatek,mt8195-mdp3-padding 26 27 reg: 28 maxItems: 1 29 30 power-domains: 31 maxItems: 1 32 33 clocks: 34 items: 35 - description: Padding's clocks 36 37 mediatek,gce-client-reg: 38 description: 39 GCE (Global Command Engine) is a multi-core micro processor that helps 40 its clients to execute commands without interrupting CPU. This property 41 describes GCE client's information that is composed by 4 fields. 42 1. Phandle of the GCE (there may be several GCE processors) 43 2. Sub-system ID defined in the dt-binding like a user ID 44 (Please refer to include/dt-bindings/gce/<chip>-gce.h) 45 3. Offset from base address of the subsys you are at 46 4. Size of the register the client needs 47 $ref: /schemas/types.yaml#/definitions/phandle-array 48 items: 49 items: 50 - description: Phandle of the GCE 51 - description: Subsys ID defined in the dt-binding 52 - description: Offset from base address of the subsys 53 - description: Size of register 54 maxItems: 1 55 56required: 57 - compatible 58 - reg 59 - power-domains 60 - clocks 61 - mediatek,gce-client-reg 62 63additionalProperties: false 64 65examples: 66 - | 67 #include <dt-bindings/interrupt-controller/arm-gic.h> 68 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 69 #include <dt-bindings/power/mediatek,mt8188-power.h> 70 #include <dt-bindings/gce/mt8195-gce.h> 71 72 soc { 73 #address-cells = <2>; 74 #size-cells = <2>; 75 76 padding0: padding@1c11d000 { 77 compatible = "mediatek,mt8188-disp-padding"; 78 reg = <0 0x1c11d000 0 0x1000>; 79 clocks = <&vdosys1 CLK_VDO1_PADDING0>; 80 power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>; 81 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>; 82 }; 83 }; 84