Lines Matching +full:gce +full:- +full:client +full:- +full:reg
1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
14 #include <linux/soc/mediatek/mtk-cmdq.h>
31 * are present, hence requiring multiple 32-bits registers.
44 _mutex->data->mutex_mod_reg : \
45 _mutex->data->mutex_mod1_reg; \
705 * So that MUTEX can not only send a STREAM_DONE event to GCE
854 if (!mtx->mutex[i].claimed) { in mtk_mutex_get()
855 mtx->mutex[i].claimed = true; in mtk_mutex_get()
856 return &mtx->mutex[i]; in mtk_mutex_get()
859 return ERR_PTR(-EBUSY); in mtk_mutex_get()
866 mutex[mutex->id]); in mtk_mutex_put()
868 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_put()
870 mutex->claimed = false; in mtk_mutex_put()
877 mutex[mutex->id]); in mtk_mutex_prepare()
878 return clk_prepare_enable(mtx->clk); in mtk_mutex_prepare()
885 mutex[mutex->id]); in mtk_mutex_unprepare()
886 clk_disable_unprepare(mtx->clk); in mtk_mutex_unprepare()
894 mutex[mutex->id]); in mtk_mutex_add_comp()
895 unsigned int reg; in mtk_mutex_add_comp() local
899 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_add_comp()
927 offset = DISP_REG_MUTEX_MOD(mtx, mtx->data->mutex_mod[id], mutex->id); in mtk_mutex_add_comp()
928 mod_id = mtx->data->mutex_mod[id] % 32; in mtk_mutex_add_comp()
929 reg = readl_relaxed(mtx->regs + offset); in mtk_mutex_add_comp()
930 reg |= BIT(mod_id); in mtk_mutex_add_comp()
931 writel_relaxed(reg, mtx->regs + offset); in mtk_mutex_add_comp()
935 writel_relaxed(mtx->data->mutex_sof[sof_id], in mtk_mutex_add_comp()
936 mtx->regs + in mtk_mutex_add_comp()
937 DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id)); in mtk_mutex_add_comp()
945 mutex[mutex->id]); in mtk_mutex_remove_comp()
946 unsigned int reg; in mtk_mutex_remove_comp() local
950 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_remove_comp()
962 mtx->regs + in mtk_mutex_remove_comp()
963 DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, in mtk_mutex_remove_comp()
964 mutex->id)); in mtk_mutex_remove_comp()
967 offset = DISP_REG_MUTEX_MOD(mtx, mtx->data->mutex_mod[id], mutex->id); in mtk_mutex_remove_comp()
968 mod_id = mtx->data->mutex_mod[id] % 32; in mtk_mutex_remove_comp()
969 reg = readl_relaxed(mtx->regs + offset); in mtk_mutex_remove_comp()
970 reg &= ~BIT(mod_id); in mtk_mutex_remove_comp()
971 writel_relaxed(reg, mtx->regs + offset); in mtk_mutex_remove_comp()
980 mutex[mutex->id]); in mtk_mutex_enable()
982 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_enable()
984 writel(1, mtx->regs + DISP_REG_MUTEX_EN(mutex->id)); in mtk_mutex_enable()
991 mutex[mutex->id]); in mtk_mutex_enable_by_cmdq()
994 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_enable_by_cmdq()
996 if (!mtx->cmdq_reg.size) { in mtk_mutex_enable_by_cmdq()
997 dev_err(mtx->dev, "mediatek,gce-client-reg hasn't been set"); in mtk_mutex_enable_by_cmdq()
998 return -ENODEV; in mtk_mutex_enable_by_cmdq()
1001 cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys, in mtk_mutex_enable_by_cmdq()
1002 mtx->addr + DISP_REG_MUTEX_EN(mutex->id), 1); in mtk_mutex_enable_by_cmdq()
1010 mutex[mutex->id]); in mtk_mutex_disable()
1012 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_disable()
1014 writel(0, mtx->regs + DISP_REG_MUTEX_EN(mutex->id)); in mtk_mutex_disable()
1021 mutex[mutex->id]); in mtk_mutex_acquire()
1024 writel(1, mtx->regs + DISP_REG_MUTEX_EN(mutex->id)); in mtk_mutex_acquire()
1025 writel(1, mtx->regs + DISP_REG_MUTEX(mutex->id)); in mtk_mutex_acquire()
1026 if (readl_poll_timeout_atomic(mtx->regs + DISP_REG_MUTEX(mutex->id), in mtk_mutex_acquire()
1028 pr_err("could not acquire mutex %d\n", mutex->id); in mtk_mutex_acquire()
1035 mutex[mutex->id]); in mtk_mutex_release()
1037 writel(0, mtx->regs + DISP_REG_MUTEX(mutex->id)); in mtk_mutex_release()
1045 mutex[mutex->id]); in mtk_mutex_write_mod()
1046 unsigned int reg; in mtk_mutex_write_mod() local
1049 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_write_mod()
1053 dev_err(mtx->dev, "Not supported MOD table index : %d", idx); in mtk_mutex_write_mod()
1054 return -EINVAL; in mtk_mutex_write_mod()
1057 offset = DISP_REG_MUTEX_MOD(mtx, mtx->data->mutex_table_mod[idx], mutex->id); in mtk_mutex_write_mod()
1058 mod_id = mtx->data->mutex_table_mod[idx] % 32; in mtk_mutex_write_mod()
1060 reg = readl_relaxed(mtx->regs + offset); in mtk_mutex_write_mod()
1062 reg &= ~BIT(mod_id); in mtk_mutex_write_mod()
1064 reg |= BIT(mod_id); in mtk_mutex_write_mod()
1066 writel_relaxed(reg, mtx->regs + offset); in mtk_mutex_write_mod()
1076 mutex[mutex->id]); in mtk_mutex_write_sof()
1078 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_write_sof()
1082 dev_err(mtx->dev, "Not supported SOF index : %d", idx); in mtk_mutex_write_sof()
1083 return -EINVAL; in mtk_mutex_write_sof()
1086 writel_relaxed(idx, mtx->regs + in mtk_mutex_write_sof()
1087 DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id)); in mtk_mutex_write_sof()
1095 struct device *dev = &pdev->dev; in mtk_mutex_probe()
1102 return -ENOMEM; in mtk_mutex_probe()
1105 mtx->mutex[i].id = i; in mtk_mutex_probe()
1107 mtx->data = of_device_get_match_data(dev); in mtk_mutex_probe()
1109 if (!mtx->data->no_clk) { in mtk_mutex_probe()
1110 mtx->clk = devm_clk_get(dev, NULL); in mtk_mutex_probe()
1111 if (IS_ERR(mtx->clk)) in mtk_mutex_probe()
1112 return dev_err_probe(dev, PTR_ERR(mtx->clk), "Failed to get clock\n"); in mtk_mutex_probe()
1115 mtx->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s); in mtk_mutex_probe()
1116 if (IS_ERR(mtx->regs)) { in mtk_mutex_probe()
1118 return PTR_ERR(mtx->regs); in mtk_mutex_probe()
1120 mtx->addr = regs->start; in mtk_mutex_probe()
1123 ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0); in mtk_mutex_probe()
1125 dev_dbg(dev, "No mediatek,gce-client-reg!\n"); in mtk_mutex_probe()
1133 { .compatible = "mediatek,mt2701-disp-mutex", .data = &mt2701_mutex_driver_data },
1134 { .compatible = "mediatek,mt2712-disp-mutex", .data = &mt2712_mutex_driver_data },
1135 { .compatible = "mediatek,mt6795-disp-mutex", .data = &mt6795_mutex_driver_data },
1136 { .compatible = "mediatek,mt8167-disp-mutex", .data = &mt8167_mutex_driver_data },
1137 { .compatible = "mediatek,mt8173-disp-mutex", .data = &mt8173_mutex_driver_data },
1138 { .compatible = "mediatek,mt8183-disp-mutex", .data = &mt8183_mutex_driver_data },
1139 { .compatible = "mediatek,mt8186-disp-mutex", .data = &mt8186_mutex_driver_data },
1140 { .compatible = "mediatek,mt8186-mdp3-mutex", .data = &mt8186_mdp_mutex_driver_data },
1141 { .compatible = "mediatek,mt8188-disp-mutex", .data = &mt8188_mutex_driver_data },
1142 { .compatible = "mediatek,mt8188-vpp-mutex", .data = &mt8188_vpp_mutex_driver_data },
1143 { .compatible = "mediatek,mt8192-disp-mutex", .data = &mt8192_mutex_driver_data },
1144 { .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data },
1145 { .compatible = "mediatek,mt8195-vpp-mutex", .data = &mt8195_vpp_mutex_driver_data },
1146 { .compatible = "mediatek,mt8365-disp-mutex", .data = &mt8365_mutex_driver_data },
1154 .name = "mediatek-mutex",