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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxbb.dtsi10 #include <dt-bindings/clock/gxbb-clkc.h>
23 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
33 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
42 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
54 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
66 clocks = <&clkc CLKID_AIU_GLUE>,
67 <&clkc CLKID_I2S_OUT>,
68 <&clkc CLKID_AOCLK_GATE>,
69 <&clkc CLKID_CTS_AMCLK>,
70 <&clkc CLKID_MIXER_IFACE>,
[all …]
H A Dmeson-gxl.dtsi8 #include <dt-bindings/clock/gxbb-clkc.h>
25 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
38 clocks = <&clkc CLKID_USB1>;
62 clocks = <&clkc CLKID_ACODEC>;
73 clocks = <&clkc CLKID_BLKMV>;
82 clocks = <&clkc CLKID_AIU_GLUE>,
83 <&clkc CLKID_I2S_OUT>,
84 <&clkc CLKID_AOCLK_GATE>,
85 <&clkc CLKID_CTS_AMCLK>,
86 <&clkc CLKID_MIXER_IFACE>,
[all …]
H A Dmeson-g12-common.dtsi8 #include <dt-bindings/clock/g12a-clkc.h>
36 clocks = <&clkc CLKID_HDMI>,
37 <&clkc CLKID_HTX_PCLK>,
38 <&clkc CLKID_VPU_INTR>;
46 clocks = <&clkc CLKID_HDMI>,
47 <&clkc CLKID_HTX_PCLK>,
48 <&clkc CLKID_VPU_INTR>;
55 clocks = <&clkc CLKID_EFUSE>;
153 clocks = <&clkc CLKID_PCIE_PHY
154 &clkc CLKID_PCIE_COMB
[all …]
H A Dmeson-axg.dtsi7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
127 clocks = <&clkc CLKID_EFUSE>;
201 clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
227 clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
245 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
258 clocks = <&clkc CLKID_USB1>;
285 clocks = <&clkc CLKID_ETH>,
286 <&clkc CLKID_FCLK_DIV2>,
287 <&clkc CLKID_MPLL2>,
[all …]
H A Dmeson-khadas-vim3-ts050.dtso8 #include <dt-bindings/clock/g12a-clkc.h>
55 assigned-clocks = <&clkc CLKID_GP0_PLL>,
56 <&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
57 <&clkc CLKID_MIPI_DSI_PXCLK>,
58 <&clkc CLKID_CTS_ENCL_SEL>,
59 <&clkc CLKID_VCLK2_SEL>;
61 <&clkc CLKID_GP0_PLL>,
63 <&clkc CLKID_VCLK2_DIV1>,
64 <&clkc CLKID_GP0_PLL>;
H A Dmeson-g12b-bananapi-cm4-mnt-reform2.dts82 clocks = <&clkc CLKID_MPLL2>,
83 <&clkc CLKID_MPLL0>,
84 <&clkc CLKID_MPLL1>;
86 assigned-clocks = <&clkc CLKID_MPLL2>,
87 <&clkc CLKID_MPLL0>,
88 <&clkc CLKID_MPLL1>;
233 assigned-clocks = <&clkc CLKID_GP0_PLL>,
234 <&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
235 <&clkc CLKID_MIPI_DSI_PXCLK>,
236 <&clkc CLKID_CTS_ENCL_SEL>,
[all …]
H A Dmeson-gxbb-wetek-hub.dts19 clocks = <&clkc CLKID_MPLL0>,
20 <&clkc CLKID_MPLL1>,
21 <&clkc CLKID_MPLL2>;
23 assigned-clocks = <&clkc CLKID_MPLL0>,
24 <&clkc CLKID_MPLL1>,
25 <&clkc CLKID_MPLL2>;
H A Dmeson-gxbb-p201.dts20 clocks = <&clkc CLKID_MPLL0>,
21 <&clkc CLKID_MPLL1>,
22 <&clkc CLKID_MPLL2>;
24 assigned-clocks = <&clkc CLKID_MPLL0>,
25 <&clkc CLKID_MPLL1>,
26 <&clkc CLKID_MPLL2>;
H A Dmeson-sm1-bananapi-m2-pro.dts25 clocks = <&clkc CLKID_MPLL2>,
26 <&clkc CLKID_MPLL0>,
27 <&clkc CLKID_MPLL1>;
29 assigned-clocks = <&clkc CLKID_MPLL2>,
30 <&clkc CLKID_MPLL0>,
31 <&clkc CLKID_MPLL1>;
H A Dmeson-g12b-khadas-vim3.dtsi53 clocks = <&clkc CLKID_CPU_CLK>;
60 clocks = <&clkc CLKID_CPU_CLK>;
67 clocks = <&clkc CLKID_CPUB_CLK>;
74 clocks = <&clkc CLKID_CPUB_CLK>;
81 clocks = <&clkc CLKID_CPUB_CLK>;
88 clocks = <&clkc CLKID_CPUB_CLK>;
H A Dmeson-sm1-a95xf3-air.dts25 clocks = <&clkc CLKID_MPLL2>,
26 <&clkc CLKID_MPLL0>,
27 <&clkc CLKID_MPLL1>;
29 assigned-clocks = <&clkc CLKID_MPLL2>,
30 <&clkc CLKID_MPLL0>,
31 <&clkc CLKID_MPLL1>;
/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-7000.dtsi19 clocks = <&clkc 3>;
33 clocks = <&clkc 3>;
64 clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
107 clocks = <&clkc 12>;
113 clocks = <&clkc 19>, <&clkc 36>;
125 clocks = <&clkc 20>, <&clkc 37>;
137 clocks = <&clkc 42>;
149 clocks = <&clkc 38>;
161 clocks = <&clkc 39>;
196 clocks = <&clkc 23>, <&clkc 40>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8b.dtsi7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
27 resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
29 clocks = <&clkc CLKID_CPUCLK>;
39 resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
41 clocks = <&clkc CLKID_CPUCLK>;
51 resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
53 clocks = <&clkc CLKID_CPUCLK>;
63 resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
[all …]
H A Dmeson8.dtsi6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
29 resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
31 clocks = <&clkc CLKID_CPUCLK>;
41 resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
43 clocks = <&clkc CLKID_CPUCLK>;
53 resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
55 clocks = <&clkc CLKID_CPUCLK>;
65 resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
[all …]
H A Dmeson8m2.dtsi13 &clkc {
14 compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
31 clocks = <&clkc CLKID_ETH>,
32 <&clkc CLKID_MPLL2>,
33 <&clkc CLKID_MPLL2>,
34 <&clkc CLKID_FCLK_DIV2>;
79 assigned-clocks = <&clkc CLKID_VPU>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Damlogic,axg-audio-clkc.txt9 - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D,
10 "amlogic,g12a-audio-clkc" for G12A,
11 "amlogic,sm1-audio-clkc" for S905X3.
30 preprocessor macros in the dt-bindings/clock/axg-audio-clkc.h header and can be
36 compatible = "amlogic,axg-audio-clkc";
40 clocks = <&clkc CLKID_AUDIO>,
41 <&clkc CLKID_MPLL0>,
42 <&clkc CLKID_MPLL1>,
43 <&clkc CLKID_MPLL2>,
44 <&clkc CLKID_MPLL3>,
[all …]
H A Damlogic,axg-audio-clkc.yaml4 $id: http://devicetree.org/schemas/clock/amlogic,axg-audio-clkc.yaml#
21 - amlogic,axg-audio-clkc
22 - amlogic,g12a-audio-clkc
23 - amlogic,sm1-audio-clkc
117 - amlogic,g12a-audio-clkc
118 - amlogic,sm1-audio-clkc
130 #include <dt-bindings/clock/axg-clkc.h>
137 compatible = "amlogic,axg-audio-clkc";
141 clocks = <&clkc CLKID_AUDIO>,
142 <&clkc CLKID_MPLL0>,
[all …]
H A Damlogic,gxbb-clkc.txt9 "amlogic,gxbb-clkc" for GXBB SoC,
10 "amlogic,gxl-clkc" for GXL and GXM SoC,
11 "amlogic,axg-clkc" for AXG SoC.
12 "amlogic,g12a-clkc" for G12A SoC.
13 "amlogic,g12b-clkc" for G12B SoC.
14 "amlogic,sm1-clkc" for SM1 SoC.
23 preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
37 clkc: clock-controller {
39 compatible = "amlogic,gxbb-clkc";
52 clocks = <&clkc CLKID_CLK81>;
H A Damlogic,meson8b-clkc.txt9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
26 preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
30 dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
36 clkc: clock-controller {
37 compatible = "amlogic,meson8b-clkc";
50 clocks = <&clkc CLKID_CLK81>;
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Damlogic,aiu.yaml87 #include <dt-bindings/clock/gxbb-clkc.h>
99 clocks = <&clkc CLKID_AIU_GLUE>,
100 <&clkc CLKID_I2S_OUT>,
101 <&clkc CLKID_AOCLK_GATE>,
102 <&clkc CLKID_CTS_AMCLK>,
103 <&clkc CLKID_MIXER_IFACE>,
104 <&clkc CLKID_IEC958>,
105 <&clkc CLKID_IEC958_GATE>,
106 <&clkc CLKID_CTS_MCLK_I958>,
107 <&clkc CLKID_CTS_I958>;
/freebsd/sys/contrib/device-tree/src/arm/sunplus/
H A Dsunplus-sp7021.dtsi8 #include <dt-bindings/clock/sunplus,sp7021-clkc.h>
36 clkc: clock-controller@4 { label
37 compatible = "sunplus,sp7021-clkc";
56 clocks = <&clkc CLK_OTPRX>;
84 clocks = <&clkc CLK_GPIO>;
182 clocks = <&clkc CLK_RTC>;
195 clocks = <&clkc CLK_SPI_COMBO_0>;
212 clocks = <&clkc CLK_SPI_COMBO_1>;
225 clocks = <&clkc CLK_SPI_COMBO_2>;
238 clocks = <&clkc CLK_SPI_COMBO_3>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Dxilinx,can.yaml126 clocks = <&clkc 19>, <&clkc 36>;
138 clocks = <&clkc 0>, <&clkc 1>;
151 clocks = <&clkc 0>, <&clkc 1>;
163 clocks = <&clkc 0>, <&clkc 1>;
H A Dxilinx_can.txt32 clocks = <&clkc 19>, <&clkc 36>;
43 clocks = <&clkc 0>, <&clkc 1>;
54 clocks = <&clkc 0>, <&clkc 1>;
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dallegro.txt29 <&clkc 71>, <&clkc 71>, <&clkc 71>;
40 <&clkc 71>, <&clkc 71>, <&clkc 71>;
H A Dallegro,al5e.yaml82 <&clkc 71>, <&clkc 71>, <&clkc 71>;
99 <&clkc 71>, <&clkc 71>, <&clkc 71>;

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