Lines Matching full:clkc

6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
29 			resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
31 			clocks = <&clkc CLKID_CPUCLK>;
41 			resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
43 			clocks = <&clkc CLKID_CPUCLK>;
53 			resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
55 			clocks = <&clkc CLKID_CPUCLK>;
65 			resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
67 			clocks = <&clkc CLKID_CPUCLK>;
254 			compatible = "amlogic,meson8-ddr-clkc";
308 			clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
311 			assigned-clocks = <&clkc CLKID_MALI>;
322 	clocks = <&clkc CLKID_AIU_GLUE>,
323 		 <&clkc CLKID_I2S_OUT>,
324 		 <&clkc CLKID_AOCLK_GATE>,
325 		 <&clkc CLKID_CTS_AMCLK>,
326 		 <&clkc CLKID_MIXER_IFACE>,
327 		 <&clkc CLKID_IEC958>,
328 		 <&clkc CLKID_IEC958_GATE>,
329 		 <&clkc CLKID_CTS_MCLK_I958>,
330 		 <&clkc CLKID_CTS_I958>;
436 	clocks = <&clkc CLKID_AO_MEDIA_CPU>;
455 			 <&clkc CLKID_FCLK_DIV4>,
456 			 <&clkc CLKID_FCLK_DIV3>;
626 	clocks = <&clkc CLKID_EFUSE>;
636 	clocks = <&clkc CLKID_ETH>;
648 	clkc: clock-controller {  label
649 		compatible = "amlogic,meson8-clkc";
660 		clocks = <&clkc CLKID_VPU>;
662 		assigned-clocks = <&clkc CLKID_VPU>;
668 	clocks = <&clkc CLKID_RNG0>;
673 	clocks = <&clkc CLKID_CLK81>;
677 	clocks = <&clkc CLKID_CLK81>;
681 	clocks = <&clkc CLKID_CLK81>;
706 		clocks = <&clkc CLKID_PERIPH>;
719 		clocks = <&clkc CLKID_PERIPH>;
727 		 <&clkc CLKID_FCLK_DIV4>,
728 		 <&clkc CLKID_FCLK_DIV3>;
735 		 <&clkc CLKID_FCLK_DIV4>,
736 		 <&clkc CLKID_FCLK_DIV3>;
746 	clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
756 		 <&clkc CLKID_FCLK_DIV4>,
757 		 <&clkc CLKID_FCLK_DIV3>,
758 		 <&clkc CLKID_FCLK_DIV5>,
759 		 <&clkc CLKID_SDHC>;
772 	clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
777 	clocks = <&clkc CLKID_CLK81>;
781 	clocks = <&xtal>, <&clkc CLKID_CLK81>;
787 	clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
793 	clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
799 	clocks = <&xtal>, <&clkc CLKID_UART1>, <&clkc CLKID_CLK81>;
805 	clocks = <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
811 	clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
817 	clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
823 	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
830 	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;