1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com> 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/clock/loongson,ls1x-clk.h> 9#include <dt-bindings/interrupt-controller/irq.h> 10 11/ { 12 #address-cells = <1>; 13 #size-cells = <1>; 14 15 xtal: clock { 16 compatible = "fixed-clock"; 17 clock-output-names = "xtal"; 18 #clock-cells = <0>; 19 }; 20 21 cpus { 22 #address-cells = <1>; 23 #size-cells = <0>; 24 25 cpu0: cpu@0 { 26 reg = <0>; 27 device_type = "cpu"; 28 clocks = <&clkc LS1X_CLKID_CPU>; 29 #clock-cells = <1>; 30 }; 31 }; 32 33 cpu_intc: interrupt-controller { 34 compatible = "mti,cpu-interrupt-controller"; 35 interrupt-controller; 36 #interrupt-cells = <1>; 37 #address-cells = <0>; 38 }; 39 40 soc: bus@1fd00000 { 41 compatible = "simple-bus"; 42 #address-cells = <1>; 43 #size-cells = <1>; 44 ranges = <0x0 0x1fd00000 0x130000>; 45 46 intc0: interrupt-controller@1040 { 47 compatible = "loongson,ls1x-intc"; 48 reg = <0x1040 0x18>; 49 interrupt-controller; 50 interrupt-parent = <&cpu_intc>; 51 interrupts = <2>; 52 #interrupt-cells = <2>; 53 }; 54 55 intc1: interrupt-controller@1058 { 56 compatible = "loongson,ls1x-intc"; 57 reg = <0x1058 0x18>; 58 interrupt-controller; 59 interrupt-parent = <&cpu_intc>; 60 interrupts = <3>; 61 #interrupt-cells = <2>; 62 }; 63 64 intc2: interrupt-controller@1070 { 65 compatible = "loongson,ls1x-intc"; 66 reg = <0x1070 0x18>; 67 interrupt-controller; 68 interrupt-parent = <&cpu_intc>; 69 interrupts = <4>; 70 #interrupt-cells = <2>; 71 }; 72 73 intc3: interrupt-controller@1088 { 74 compatible = "loongson,ls1x-intc"; 75 reg = <0x1088 0x18>; 76 interrupt-controller; 77 interrupt-parent = <&cpu_intc>; 78 interrupts = <5>; 79 #interrupt-cells = <2>; 80 }; 81 82 gpio0: gpio@10c0 { 83 compatible = "loongson,ls1x-gpio"; 84 reg = <0x10c0 0x4>; 85 gpio-controller; 86 #gpio-cells = <2>; 87 }; 88 89 gpio1: gpio@10c4 { 90 compatible = "loongson,ls1x-gpio"; 91 reg = <0x10c4 0x4>; 92 gpio-controller; 93 #gpio-cells = <2>; 94 }; 95 }; 96 97 apb: bus@1fe40000 { 98 compatible = "simple-bus"; 99 #address-cells = <1>; 100 #size-cells = <1>; 101 ranges = <0x0 0x1fe40000 0xc0000>; 102 103 uart0: serial@0 { 104 compatible = "ns16550a"; 105 reg = <0x0 0x8>; 106 clocks = <&clkc LS1X_CLKID_APB>; 107 interrupt-parent = <&intc0>; 108 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 109 status = "disabled"; 110 }; 111 112 uart1: serial@4000 { 113 compatible = "ns16550a"; 114 reg = <0x4000 0x8>; 115 clocks = <&clkc LS1X_CLKID_APB>; 116 interrupt-parent = <&intc0>; 117 status = "disabled"; 118 }; 119 120 uart2: serial@8000 { 121 compatible = "ns16550a"; 122 reg = <0x8000 0x8>; 123 clocks = <&clkc LS1X_CLKID_APB>; 124 interrupt-parent = <&intc0>; 125 status = "disabled"; 126 }; 127 128 uart3: serial@c000 { 129 compatible = "ns16550a"; 130 reg = <0xc000 0x8>; 131 clocks = <&clkc LS1X_CLKID_APB>; 132 interrupt-parent = <&intc0>; 133 status = "disabled"; 134 }; 135 }; 136}; 137