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/linux/arch/mips/boot/dts/brcm/
H A Dbcm97435svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
H A Dbcm97425svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
119 flash@0 {
121 reg = <0>;
133 flash0.cfe@0 {
134 reg = <0x0 0x200000>;
138 reg = <0x200000 0x40000>;
142 reg = <0x240000 0x10000>;
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62p.dtsi53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62.dtsi55 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
56 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
57 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
58 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
59 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
60 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
61 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
62 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
63 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
64 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62a.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-j722s.dtsi24 #size-cells = <0>;
46 cpu0: cpu@0 {
48 reg = <0x000>;
51 i-cache-size = <0x8000>;
54 d-cache-size = <0x8000>;
58 clocks = <&k3_clks 135 0>;
64 reg = <0x001>;
67 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
74 clocks = <&k3_clks 136 0>;
[all …]
H A Dk3-am64.dtsi54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
H A Dk3-am65-wakeup.dtsi19 reg = <0x44083000 0x1000>;
44 ranges = <0x0 0x43000000 0x20000>;
48 reg = <0x14 0x4>;
55 reg = <0x4301c000 0x118>;
58 pinctrl-single,function-mask = <0xffffffff>;
63 reg = <0x42300000 0x100>;
72 reg = <0x42120000 0x100>;
75 #size-cells = <0>;
84 reg = <0x42200000 0x200>;
91 ti,interrupt-ranges = <0 712 16>;
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dxilinx-versal-cpm.yaml57 const: 0
88 interrupts = <0 72 4>;
90 interrupt-map-mask = <0 0 0 7>;
91 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
92 <0 0 0 2 &pcie_intc_0 1>,
93 <0 0 0 3 &pcie_intc_0 2>,
94 <0 0 0 4 &pcie_intc_0 3>;
95 bus-range = <0x00 0xff>;
96 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
97 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
[all …]
H A Dsophgo,sg2044-pcie.yaml53 const: 0
94 reg = <0x6c 0x00400000 0x0 0x00001000>,
95 <0x6c 0x00700000 0x0 0x00004000>,
96 <0x40 0x00000000 0x0 0x00001000>,
97 <0x6c 0x00780c00 0x0 0x00000400>;
101 bus-range = <0x00 0xff>;
102 clocks = <&clk 0>;
105 linux,pci-domain = <0>;
107 ranges = <0x01000000 0x0 0x00000000 0x40 0x10000000 0x0 0x00200000>,
108 <0x42000000 0x0 0x00000000 0x0 0x00000000 0x0 0x04000000>,
[all …]
H A Dxlnx,xdma-host.yaml50 - const: 0
51 - const: 0
52 - const: 0
68 const: 0
124 reg = <0x0 0xa0000000 0x0 0x10000000>;
125 ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>,
126 <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>;
135 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
136 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
137 <0 0 0 2 &pcie_intc_0 1>,
[all …]
H A Dqcom,pcie-sa8255p.yaml26 no "bus-range" is specified, this will be bus 0 (the default).
81 reg = <0x4 0x00000000 0 0x10000000>;
85 ranges = <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>,
86 <0x43000000 0x4 0x10100000 0x4 0x10100000 0x0 0x40000000>;
87 bus-range = <0x00 0xff>;
89 linux,pci-domain = <0>;
90 power-domains = <&scmi5_pd 0>;
91 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
92 <0x100 &pcie_smmu 0x0001 0x1>;
106 interrupt-map-mask = <0 0 0 0x7>;
[all …]
H A Dxlnx,nwl-pcie.yaml50 - const: 0
51 - const: 0
52 - const: 0
87 const: 0
125 reg = <0x0 0xfd0e0000 0x0 0x1000>,
126 <0x0 0xfd480000 0x0 0x1000>,
127 <0x80 0x00000000 0x0 0x10000000>;
129 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
130 <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
141 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
H A Dapple,pcie.yaml133 reg = <0x6 0x90000000 0x0 0x1000000>,
134 <0x6 0x80000000 0x0 0x100000>,
135 <0x6 0x81000000 0x0 0x4000>,
136 <0x6 0x82000000 0x0 0x4000>,
137 <0x6 0x83000000 0x0 0x4000>;
149 iommu-map = <0x100 &dart0 1 1>,
150 <0x200 &dart1 1 1>,
151 <0x300 &dart2 1 1>;
152 iommu-map-mask = <0xff00>;
154 bus-range = <0 3>;
[all …]
H A Dnvidia,tegra194-pcie.yaml85 - const: p2u-0
123 0: C0
132 0 : C0
260 bus@0 {
263 ranges = <0x0 0x0 0x0 0x8 0x0>;
268 reg = <0x0 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
269 <0x0 0x38000000 0x0 0x00040000>, /* configuration space (256K) */
270 <0x0 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
271 <0x0 0x38080000 0x0 0x00040000>; /* DBI reg space (256K) */
278 linux,pci-domain = <0>;
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>;
26 #clock-cells = <0>;
37 reg = <0x6c 0x00000000 0x0 0x00001000>,
38 <0x6c 0x00300000 0x0 0x00004000>,
39 <0x48 0x00000000 0x0 0x00001000>,
40 <0x6c 0x000c0000 0x0 0x00001000>;
48 interrupt-map-mask = <0 0 0 7>;
49 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
50 <0 0 0 2 &pcie_intc0 1>,
51 <0 0 0 3 &pcie_intc0 2>,
[all …]
/linux/drivers/of/unittest-data/
H A Dtests-address.dtsi17 ranges = <0x70000000 0x70000000 0x50000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Dfaraday,fttmr010.yaml83 reg = <0x43000000 0x1000>;
/linux/arch/arm/boot/dts/arm/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Dpci1de4,1.yaml36 - IO BANK0: 0
67 - USB HOST0-0: 31
72 - USB HOST1-0: 36
114 rp1@0,0 {
116 ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>;
124 ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>;
125 dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>;
131 reg = <0x00 0x40018000 0x0 0x10038>;
/linux/arch/arm64/boot/dts/cavium/
H A Dthunder2-99xx.dtsi21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
27 reg = <0x0 0x0>;
34 reg = <0x0 0x1>;
41 reg = <0x0 0x2>;
48 reg = <0x0 0x3>;
66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
[all …]
/linux/arch/powerpc/boot/
H A Dcuboot-pq2.c73 if (!dt_xlate_reg(bus_node, 0, (unsigned long *)&ctrl_addr, in update_cs_ranges()
79 for (i = 0; i < len / sizeof(struct cs_range); i++) { in update_cs_ranges()
85 if (cs_ranges_buf[i].base != 0) in update_cs_ranges()
94 base &= 0x7fff; in update_cs_ranges()
95 option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; in update_cs_ranges()
97 base = 0x1801; in update_cs_ranges()
98 option = 0x10; in update_cs_ranges()
101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
134 for (i = 0; i < 3; i++) in fixup_pci()
158 for (i = 0; i < len / sizeof(struct pci_range); i++) { in fixup_pci()
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-soc.dtsi22 reg = <0x0 0xe1110000 0 0x1000>,
23 <0x0 0xe112f000 0 0x2000>,
24 <0x0 0xe1140000 0 0x2000>,
25 <0x0 0xe1160000 0 0x2000>;
26 interrupts = <1 9 0xf04>;
27 ranges = <0 0 0 0xe1100000 0 0x100000>;
31 reg = <0x0 0x00080000 0 0x1000>;
37 interrupts = <1 13 0xff04>,
38 <1 14 0xff04>,
39 <1 11 0xff04>,
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234.dtsi31 bus@0 {
36 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
40 reg = <0x0 0x00100000 0x0 0xf000>,
41 <0x0 0x0010f000 0x0 0x1000>;
47 reg = <0x0 0x02080000 0x0 0x00121000>;
48 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
70 reg = <0x0 0x02200000 0x0 0x10000>,
71 <0x0 0x02210000 0x0 0x10000>;
124 gpio-ranges = <&pinmux 0 0 164>;
129 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x0 0xf000>,
30 <0x0 0x0010f000 0x0 0x1000>;
36 reg = <0x0 0x2200000 0x0 0x10000>,
37 <0x0 0x2210000 0x0 0x10000>;
90 gpio-ranges = <&pinmux 0 0 169>;
95 reg = <0x0 0x02300000 0x0 0x1000>;
105 reg = <0x0 0x2390000 0x0 0x1000>,
106 <0x0 0x23a0000 0x0 0x1000>,
[all …]

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