| /linux/arch/mips/boot/dts/brcm/ |
| H A D | bcm97435svmb.dts | 11 memory@0 { 13 reg = <0x00000000 0x10000000>, 14 <0x20000000 0x30000000>, 15 <0x90000000 0x40000000>; 135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>; 136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000 137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000 138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
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| H A D | bcm97425svmb.dts | 11 memory@0 { 13 reg = <0x00000000 0x10000000>, 14 <0x20000000 0x30000000>, 15 <0x90000000 0x40000000>; 119 flash@0 { 121 reg = <0>; 133 flash0.cfe@0 { 134 reg = <0x0 0x200000>; 138 reg = <0x200000 0x40000>; 142 reg = <0x240000 0x10000>; [all …]
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am62.dtsi | 77 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */ 78 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ 79 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ 80 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */ 81 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */ 82 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ 83 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */ 84 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ 85 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */ 86 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */ [all …]
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| H A D | k3-am62a.dtsi | 81 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */ 82 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ 83 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ 84 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */ 85 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */ 86 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ 87 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */ 88 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ 89 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */ 90 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */ [all …]
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| H A D | k3-am64.dtsi | 54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */ 55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ 56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ 57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ 58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ 59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */ 60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ 61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */ 62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */ 63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */ [all …]
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| H A D | k3-am65-wakeup.dtsi | 19 reg = <0x44083000 0x1000>; 44 ranges = <0x0 0x43000000 0x20000>; 48 reg = <0x14 0x4>; 55 reg = <0x4301c000 0x118>; 58 pinctrl-single,function-mask = <0xffffffff>; 63 reg = <0x42300000 0x100>; 72 reg = <0x42120000 0x100>; 75 #size-cells = <0>; 84 reg = <0x42200000 0x200>; 91 ti,interrupt-ranges = <0 712 16>; [all …]
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| H A D | k3-j721e-mcu-wakeup.dtsi | 19 reg = <0x00 0x44083000 0x0 0x1000>; 44 ranges = <0x0 0x0 0x40f00000 0x20000>; 48 reg = <0x200 0x8>; 53 reg = <0x4040 0x4>; 62 ranges = <0x0 0x00 0x43000000 0x20000>; 66 reg = <0x14 0x4>; 73 /* Proxy 0 addressing */ 74 reg = <0x00 0x4301c000 0x00 0x178>; 77 pinctrl-single,function-mask = <0xffffffff>; 83 reg = <0x00 0x40f04200 0x00 0x28>; [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | xilinx-versal-cpm.yaml | 57 const: 0 88 interrupts = <0 72 4>; 90 interrupt-map-mask = <0 0 0 7>; 91 interrupt-map = <0 0 0 1 &pcie_intc_0 0>, 92 <0 0 0 2 &pcie_intc_0 1>, 93 <0 0 0 3 &pcie_intc_0 2>, 94 <0 0 0 4 &pcie_intc_0 3>; 95 bus-range = <0x00 0xff>; 96 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>, 97 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; [all …]
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| H A D | sophgo,sg2044-pcie.yaml | 53 const: 0 94 reg = <0x6c 0x00400000 0x0 0x00001000>, 95 <0x6c 0x00700000 0x0 0x00004000>, 96 <0x40 0x00000000 0x0 0x00001000>, 97 <0x6c 0x00780c00 0x0 0x00000400>; 101 bus-range = <0x00 0xff>; 102 clocks = <&clk 0>; 105 linux,pci-domain = <0>; 107 ranges = <0x01000000 0x0 0x00000000 0x40 0x10000000 0x0 0x00200000>, 108 <0x42000000 0x0 0x00000000 0x0 0x00000000 0x0 0x04000000>, [all …]
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| H A D | xlnx,xdma-host.yaml | 50 - const: 0 51 - const: 0 52 - const: 0 68 const: 0 124 reg = <0x0 0xa0000000 0x0 0x10000000>; 125 ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>, 126 <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>; 135 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 136 interrupt-map = <0 0 0 1 &pcie_intc_0 0>, 137 <0 0 0 2 &pcie_intc_0 1>, [all …]
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| H A D | amd,versal2-mdb-host.yaml | 45 - const: 0 46 - const: 0 47 - const: 0 64 const: 0 75 '^pcie@[0-2],0$': 108 reg = <0x0 0xed931000 0x0 0x2000>, 109 <0x1000 0x100000 0x0 0xff00000>, 110 <0x1000 0x0 0x0 0x1000>, 111 <0x0 0xed860000 0x0 0x2000>; 113 ranges = <0x2000000 0x00 0xa0000000 0x00 0xa0000000 0x00 0x10000000>, [all …]
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| H A D | xlnx,nwl-pcie.yaml | 50 - const: 0 51 - const: 0 52 - const: 0 87 const: 0 125 reg = <0x0 0xfd0e0000 0x0 0x1000>, 126 <0x0 0xfd480000 0x0 0x1000>, 127 <0x80 0x00000000 0x0 0x10000000>; 129 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, 130 <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>; 141 interrupt-map-mask = <0x0 0x0 0x0 0x7>; [all …]
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| H A D | apple,pcie.yaml | 133 reg = <0x6 0x90000000 0x0 0x1000000>, 134 <0x6 0x80000000 0x0 0x100000>, 135 <0x6 0x81000000 0x0 0x4000>, 136 <0x6 0x82000000 0x0 0x4000>, 137 <0x6 0x83000000 0x0 0x4000>; 149 iommu-map = <0x100 &dart0 1 1>, 150 <0x200 &dart1 1 1>, 151 <0x300 &dart2 1 1>; 152 iommu-map-mask = <0xff00>; 154 bus-range = <0 3>; [all …]
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| /linux/arch/riscv/boot/dts/sophgo/ |
| H A D | sg2044.dtsi | 20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>; 26 #clock-cells = <0>; 37 reg = <0x6c 0x00000000 0x0 0x00001000>, 38 <0x6c 0x00300000 0x0 0x00004000>, 39 <0x48 0x00000000 0x0 0x00001000>, 40 <0x6c 0x000c0000 0x0 0x00001000>; 48 interrupt-map-mask = <0 0 0 7>; 49 interrupt-map = <0 0 0 1 &pcie_intc0 0>, 50 <0 0 0 2 &pcie_intc0 1>, 51 <0 0 0 3 &pcie_intc0 2>, [all …]
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| /linux/drivers/of/unittest-data/ |
| H A D | tests-address.dtsi | 17 ranges = <0x70000000 0x70000000 0x50000000>, 18 <0x00000000 0xd0000000 0x20000000>; 19 dma-ranges = <0x0 0x20000000 0x40000000>; 22 reg = <0x70000000 0x1000>; 28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>; 29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>; 32 reg = <0x0 0x1000 0x0 0x1000>; 40 reg = <0x90000000 0x1000>; 41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>; 42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>, [all …]
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| /linux/arch/arm64/boot/dts/broadcom/ |
| H A D | bcm2712.dtsi | 17 #clock-cells = <0>; 24 #clock-cells = <0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #clock-cells = <0>; 53 #size-cells = <0>; 62 cpu0: cpu@0 { 65 reg = <0x000>; 67 d-cache-size = <0x10000>; 70 i-cache-size = <0x10000>; [all …]
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| /linux/arch/arm64/boot/dts/cix/ |
| H A D | sky1.dtsi | 22 #size-cells = <0>; 24 cpu0: cpu@0 { 27 reg = <0x0 0x0>; 38 reg = <0x0 0x100>; 49 reg = <0x0 0x200>; 60 reg = <0x0 0x300>; 71 reg = <0x0 0x400>; 82 reg = <0x0 0x500>; 93 reg = <0x0 0x600>; 104 reg = <0x0 0x700>; [all …]
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | faraday,fttmr010.yaml | 83 reg = <0x43000000 0x1000>;
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | versatile-pb.dts | 11 clear-mask = <0xffffffff>; 16 valid-mask = <0x7fe003ff>; 21 reg = <0x101e6000 0x1000>; 33 reg = <0x101e7000 0x1000>; 46 reg = <0x10001000 0x1000 47 0x41000000 0x10000 48 0x42000000 0x100000>; 49 bus-range = <0 0xff>; 54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */ 55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */ [all …]
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| /linux/Documentation/devicetree/bindings/misc/ |
| H A D | pci1de4,1.yaml | 40 - IO BANK0: 0 71 - USB HOST0-0: 31 76 - USB HOST1-0: 36 119 dev@0,0 { 121 reg = <0x10000 0x0 0x0 0x0 0x0>; 122 ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>; 130 ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>; 131 dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>; 137 reg = <0x00 0x40018000 0x0 0x10038>;
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| /linux/arch/powerpc/boot/ |
| H A D | cuboot-pq2.c | 73 if (!dt_xlate_reg(bus_node, 0, (unsigned long *)&ctrl_addr, in update_cs_ranges() 79 for (i = 0; i < len / sizeof(struct cs_range); i++) { in update_cs_ranges() 85 if (cs_ranges_buf[i].base != 0) in update_cs_ranges() 94 base &= 0x7fff; in update_cs_ranges() 95 option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; in update_cs_ranges() 97 base = 0x1801; in update_cs_ranges() 98 option = 0x10; in update_cs_ranges() 101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges() 134 for (i = 0; i < 3; i++) in fixup_pci() 158 for (i = 0; i < len / sizeof(struct pci_range); i++) { in fixup_pci() [all …]
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| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra234.dtsi | 32 bus@0 { 37 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; 41 reg = <0x0 0x00100000 0x0 0xf000>, 42 <0x0 0x0010f000 0x0 0x1000>; 47 reg = <0x0 0x02080000 0x0 0x00121000>; 48 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 69 reg = <0x0 0x02200000 0x0 0x10000>, 70 <0x0 0x02210000 0x0 0x10000>; 123 gpio-ranges = <&pinmux 0 0 164>; 128 reg = <0x0 0x2430000 0x0 0x19100>; [all …]
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| /linux/drivers/scsi/sym53c8xx_2/ |
| H A D | sym_defs.h | 45 #define FE_LED0 (1<<0) 88 #define ISCON 0x10 /* connected to scsi */ 89 #define CRST 0x08 /* force reset */ 90 #define IARB 0x02 /* immediate arbitration */ 93 #define SDU 0x80 /* cmd: disconnect will raise error */ 94 #define CHM 0x40 /* sta: chained mode */ 95 #define WSS 0x08 /* sta: wide scsi send [W]*/ 96 #define WSR 0x01 /* sta: wide scsi received [W]*/ 99 #define EWS 0x08 /* cmd: enable wide scsi [W]*/ 100 #define ULTRA 0x80 /* cmd: ULTRA enable */ [all …]
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210-aries.dtsi | 27 reg = <0x30000000 0x05000000>, 28 <0x40000000 0x10000000>, 29 <0x50000000 0x08000000>; 40 reg = <0x43000000 0x2000000>; 46 reg = <0x51000000 0x2000000>; 50 pmic_ap_clk: clock-0 { 53 #clock-cells = <0>; 59 #sound-dai-cells = <0>; 62 vibrator_pwr: regulator-fixed-0 { 69 pinctrl-0 = <&vibrator_ena>; [all …]
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 12 reg = <0x0 0x2a810000 0x0 0x10000>; 15 ranges = <0 0x0 0x2a820000 0x20000>; 20 reg = <0x10000 0x10000>; 26 reg = <0x0 0x2b1f0000 0x0 0x1000>; 37 reg = <0x0 0x2b400000 0x0 0x10000>; 49 reg = <0x0 0x2b500000 0x0 0x10000>; 60 reg = <0x0 0x2b600000 0x0 0x10000>; 66 power-domains = <&scpi_devpd 0>; 71 reg = <0x0 0x2c010000 0 0x1000>, 72 <0x0 0x2c02f000 0 0x2000>, [all …]
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