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/linux/arch/mips/boot/dts/brcm/
H A Dbcm97435svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
H A Dbcm97425svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
119 flash@0 {
121 reg = <0>;
133 flash0.cfe@0 {
134 reg = <0x0 0x200000>;
138 reg = <0x200000 0x40000>;
142 reg = <0x240000 0x10000>;
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62l.dtsi35 arm,smc-id = <0x82004000>;
38 #size-cells = <0>;
41 reg = <0x14>;
47 reg = <0x11>;
69 ranges = <0x00 0x00600000 0x00 0x00600000 0x00 0x00010100>, /* GPIO */
70 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First Peripheral Window */
71 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000400>, /* Timesync Router */
72 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* CPSW */
73 <0x00 0x09000000 0x00 0x09000000 0x00 0x00400000>, /* CTRL MMRs */
74 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x1a001400>, /* Second Peripheral Window */
[all …]
H A Dk3-am62p.dtsi80 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
81 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
82 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
83 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
84 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
85 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
86 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
87 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
88 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
89 <0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */
[all …]
H A Dk3-am62.dtsi77 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
78 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
79 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
80 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
81 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
82 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
83 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
84 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
85 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
86 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-am62a.dtsi81 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
82 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
83 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
84 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
85 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
86 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
87 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
88 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
89 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
90 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
H A Dk3-j722s.dtsi24 #size-cells = <0>;
46 cpu0: cpu@0 {
48 reg = <0x000>;
51 i-cache-size = <0x8000>;
54 d-cache-size = <0x8000>;
58 clocks = <&k3_clks 135 0>;
64 reg = <0x001>;
67 i-cache-size = <0x8000>;
70 d-cache-size = <0x8000>;
74 clocks = <&k3_clks 136 0>;
[all …]
H A Dk3-am64.dtsi54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
H A Dk3-am65-wakeup.dtsi19 reg = <0x44083000 0x1000>;
44 ranges = <0x0 0x43000000 0x20000>;
48 reg = <0x14 0x4>;
55 reg = <0x4301c000 0x118>;
58 pinctrl-single,function-mask = <0xffffffff>;
63 reg = <0x42300000 0x100>;
72 reg = <0x42120000 0x100>;
75 #size-cells = <0>;
84 reg = <0x42200000 0x200>;
91 ti,interrupt-ranges = <0 712 16>;
[all …]
H A Dk3-am62l-wakeup.dtsi14 reg = <0x00 0xb00000 0x00 0x400>,
15 <0x00 0xb01000 0x00 0x400>;
22 reg = <0x00 0x4084000 0x00 0x24c>;
24 pinctrl-single,function-mask = <0xffffffff>;
30 reg = <0x00 0x04201000 0x00 0x100>;
48 ti,davinci-gpio-unbanked = <0>;
54 reg = <0x00 0x2b100000 0x00 0x400>;
64 reg = <0x00 0x2b110000 0x00 0x400>;
74 reg = <0x00 0x2b200000 0x00 0x100>;
77 #size-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dxilinx-versal-cpm.yaml57 const: 0
88 interrupts = <0 72 4>;
90 interrupt-map-mask = <0 0 0 7>;
91 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
92 <0 0 0 2 &pcie_intc_0 1>,
93 <0 0 0 3 &pcie_intc_0 2>,
94 <0 0 0 4 &pcie_intc_0 3>;
95 bus-range = <0x00 0xff>;
96 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
97 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
[all …]
H A Dsophgo,sg2044-pcie.yaml53 const: 0
94 reg = <0x6c 0x00400000 0x0 0x00001000>,
95 <0x6c 0x00700000 0x0 0x00004000>,
96 <0x40 0x00000000 0x0 0x00001000>,
97 <0x6c 0x00780c00 0x0 0x00000400>;
101 bus-range = <0x00 0xff>;
102 clocks = <&clk 0>;
105 linux,pci-domain = <0>;
107 ranges = <0x01000000 0x0 0x00000000 0x40 0x10000000 0x0 0x00200000>,
108 <0x42000000 0x0 0x00000000 0x0 0x00000000 0x0 0x04000000>,
[all …]
H A Dxlnx,xdma-host.yaml50 - const: 0
51 - const: 0
52 - const: 0
68 const: 0
124 reg = <0x0 0xa0000000 0x0 0x10000000>;
125 ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>,
126 <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>;
135 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
136 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
137 <0 0 0 2 &pcie_intc_0 1>,
[all …]
H A Damd,versal2-mdb-host.yaml45 - const: 0
46 - const: 0
47 - const: 0
64 const: 0
75 '^pcie@[0-2],0$':
108 reg = <0x0 0xed931000 0x0 0x2000>,
109 <0x1000 0x100000 0x0 0xff00000>,
110 <0x1000 0x0 0x0 0x1000>,
111 <0x0 0xed860000 0x0 0x2000>;
113 ranges = <0x2000000 0x00 0xa0000000 0x00 0xa0000000 0x00 0x10000000>,
[all …]
H A Dxlnx,nwl-pcie.yaml50 - const: 0
51 - const: 0
52 - const: 0
87 const: 0
125 reg = <0x0 0xfd0e0000 0x0 0x1000>,
126 <0x0 0xfd480000 0x0 0x1000>,
127 <0x80 0x00000000 0x0 0x10000000>;
129 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
130 <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
141 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
H A Dapple,pcie.yaml133 reg = <0x6 0x90000000 0x0 0x1000000>,
134 <0x6 0x80000000 0x0 0x100000>,
135 <0x6 0x81000000 0x0 0x4000>,
136 <0x6 0x82000000 0x0 0x4000>,
137 <0x6 0x83000000 0x0 0x4000>;
149 iommu-map = <0x100 &dart0 1 1>,
150 <0x200 &dart1 1 1>,
151 <0x300 &dart2 1 1>;
152 iommu-map-mask = <0xff00>;
154 bus-range = <0 3>;
[all …]
/linux/arch/arm64/boot/dts/cix/
H A Dsky1.dtsi17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0x0 0x0>;
30 reg = <0x0 0x100>;
38 reg = <0x0 0x200>;
46 reg = <0x0 0x300>;
54 reg = <0x0 0x400>;
62 reg = <0x0 0x500>;
70 reg = <0x0 0x600>;
78 reg = <0x0 0x700>;
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>;
26 #clock-cells = <0>;
37 reg = <0x6c 0x00000000 0x0 0x00001000>,
38 <0x6c 0x00300000 0x0 0x00004000>,
39 <0x48 0x00000000 0x0 0x00001000>,
40 <0x6c 0x000c0000 0x0 0x00001000>;
48 interrupt-map-mask = <0 0 0 7>;
49 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
50 <0 0 0 2 &pcie_intc0 1>,
51 <0 0 0 3 &pcie_intc0 2>,
[all …]
H A Dsg2042.dtsi24 distance-matrix = <0 0 10>,
25 <0 1 15>,
26 <0 2 25>,
27 <0 3 30>,
28 <1 0 15>,
32 <2 0 25>,
36 <3 0 30>,
49 #clock-cells = <0>;
55 #clock-cells = <0>;
61 #clock-cells = <0>;
[all …]
/linux/drivers/of/unittest-data/
H A Dtests-address.dtsi17 ranges = <0x70000000 0x70000000 0x50000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
/linux/arch/arm64/boot/dts/broadcom/
H A Dbcm2712.dtsi16 #clock-cells = <0>;
23 #clock-cells = <0>;
30 #clock-cells = <0>;
37 #clock-cells = <0>;
44 #clock-cells = <0>;
52 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
66 d-cache-size = <0x10000>;
69 i-cache-size = <0x10000>;
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Dfaraday,fttmr010.yaml83 reg = <0x43000000 0x1000>;
/linux/arch/arm/boot/dts/arm/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Dpci1de4,1.yaml40 - IO BANK0: 0
71 - USB HOST0-0: 31
76 - USB HOST1-0: 36
119 dev@0,0 {
121 reg = <0x10000 0x0 0x0 0x0 0x0>;
122 ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>;
130 ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>;
131 dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>;
137 reg = <0x00 0x40018000 0x0 0x10038>;
/linux/arch/arm64/boot/dts/cavium/
H A Dthunder2-99xx.dtsi21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
27 reg = <0x0 0x0>;
34 reg = <0x0 0x1>;
41 reg = <0x0 0x2>;
48 reg = <0x0 0x3>;
66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
[all …]

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